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clk: mediatek: mt8195-infra_ao: Set pwrmcu clocks as critical

The pwrmcu is responsible for power management and idle states in SSPM:
on older SoCs this was managed in Linux drivers like sspm/mcupm/eemgpu
but, at least on MT8195, this functionality was transferred to the ATF
firmware.
For this reason, turning off the pwrmcu related clocks from the kernel
will lead to unability to resume the platform after suspend and other
currently unknown PM related side-effects.

Set the PWRMCU and PWRMCU_BUS_H clocks as critical to prevent the
kernel from turning them off, fixing the aforementioned issue.

Fixes: e2edf59dec0b ("clk: mediatek: Add MT8195 infrastructure clock support")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220719093316.37253-1-angelogioacchino.delregno@collabora.com
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

AngeloGioacchino Del Regno and committed by
Stephen Boyd 3f10f49c c39da7d0

+10 -3
+10 -3
drivers/clk/mediatek/clk-mt8195-infra_ao.c
··· 55 55 #define GATE_INFRA_AO1(_id, _name, _parent, _shift) \ 56 56 GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, 0) 57 57 58 + #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ 59 + GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao2_cg_regs, _shift, \ 60 + &mtk_clk_gate_ops_setclr, _flag) 61 + 58 62 #define GATE_INFRA_AO2(_id, _name, _parent, _shift) \ 59 - GATE_MTK(_id, _name, _parent, &infra_ao2_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 63 + GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, 0) 60 64 61 65 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag) \ 62 66 GATE_MTK_FLAGS(_id, _name, _parent, &infra_ao3_cg_regs, _shift, \ ··· 140 136 GATE_INFRA_AO2(CLK_INFRA_AO_UNIPRO_SYS, "infra_ao_unipro_sys", "top_ufs", 11), 141 137 GATE_INFRA_AO2(CLK_INFRA_AO_UNIPRO_TICK, "infra_ao_unipro_tick", "top_ufs_tick1us", 12), 142 138 GATE_INFRA_AO2(CLK_INFRA_AO_UFS_MP_SAP_B, "infra_ao_ufs_mp_sap_b", "top_ufs_mp_sap_cfg", 13), 143 - GATE_INFRA_AO2(CLK_INFRA_AO_PWRMCU, "infra_ao_pwrmcu", "top_pwrmcu", 15), 144 - GATE_INFRA_AO2(CLK_INFRA_AO_PWRMCU_BUS_H, "infra_ao_pwrmcu_bus_h", "top_axi", 17), 139 + /* pwrmcu is used by ATF for platform PM: clocks must never be disabled by the kernel */ 140 + GATE_INFRA_AO2_FLAGS(CLK_INFRA_AO_PWRMCU, "infra_ao_pwrmcu", "top_pwrmcu", 15, 141 + CLK_IS_CRITICAL), 142 + GATE_INFRA_AO2_FLAGS(CLK_INFRA_AO_PWRMCU_BUS_H, "infra_ao_pwrmcu_bus_h", "top_axi", 17, 143 + CLK_IS_CRITICAL), 145 144 GATE_INFRA_AO2(CLK_INFRA_AO_APDMA_B, "infra_ao_apdma_b", "top_axi", 18), 146 145 GATE_INFRA_AO2(CLK_INFRA_AO_SPI4, "infra_ao_spi4", "top_spi", 25), 147 146 GATE_INFRA_AO2(CLK_INFRA_AO_SPI5, "infra_ao_spi5", "top_spi", 26),