tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'perf-urgent-2025-05-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull misc perf fixes from Ingo Molnar:

- Require group events for branch counter groups and
PEBS counter snapshotting groups to be x86 events.

- Fix the handling of counter-snapshotting of non-precise
events, where counter values may move backwards a bit,
temporarily, confusing the code.

- Restrict perf/KVM PEBS to guest-owned events.

* tag 'perf-urgent-2025-05-04' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: KVM: Mask PEBS_ENABLE loaded for guest with vCPU's value.
perf/x86/intel/ds: Fix counter backwards of non-precise events counters-snapshotting
perf/x86/intel: Check the X86 leader for pebs_counter_event_group
perf/x86/intel: Only check the group flag for X86 leader

Linus Torvalds 3f3041b9 5aac99c6

+30 -6
+1 -1
arch/x86/events/core.c
··· 754 754 } 755 755 } 756 756 757 - static inline int is_x86_event(struct perf_event *event) 757 + int is_x86_event(struct perf_event *event) 758 758 { 759 759 int i; 760 760
+1 -1
arch/x86/events/intel/core.c
··· 4395 4395 arr[pebs_enable] = (struct perf_guest_switch_msr){ 4396 4396 .msr = MSR_IA32_PEBS_ENABLE, 4397 4397 .host = cpuc->pebs_enabled & ~cpuc->intel_ctrl_guest_mask, 4398 - .guest = pebs_mask & ~cpuc->intel_ctrl_host_mask, 4398 + .guest = pebs_mask & ~cpuc->intel_ctrl_host_mask & kvm_pmu->pebs_enable, 4399 4399 }; 4400 4400 4401 4401 if (arr[pebs_enable].host) {
+19 -2
arch/x86/events/intel/ds.c
··· 2379 2379 */ 2380 2380 intel_pmu_save_and_restart_reload(event, count); 2381 2381 } 2382 - } else 2383 - intel_pmu_save_and_restart(event); 2382 + } else { 2383 + /* 2384 + * For a non-precise event, it's possible the 2385 + * counters-snapshotting records a positive value for the 2386 + * overflowed event. Then the HW auto-reload mechanism 2387 + * reset the counter to 0 immediately, because the 2388 + * pebs_event_reset is cleared if the PERF_X86_EVENT_AUTO_RELOAD 2389 + * is not set. The counter backwards may be observed in a 2390 + * PMI handler. 2391 + * 2392 + * Since the event value has been updated when processing the 2393 + * counters-snapshotting record, only needs to set the new 2394 + * period for the counter. 2395 + */ 2396 + if (is_pebs_counter_event_group(event)) 2397 + static_call(x86_pmu_set_period)(event); 2398 + else 2399 + intel_pmu_save_and_restart(event); 2400 + } 2384 2401 } 2385 2402 2386 2403 static __always_inline void
+9 -2
arch/x86/events/perf_event.h
··· 110 110 return is_metric_event(event) || is_slots_event(event); 111 111 } 112 112 113 + int is_x86_event(struct perf_event *event); 114 + 115 + static inline bool check_leader_group(struct perf_event *leader, int flags) 116 + { 117 + return is_x86_event(leader) ? !!(leader->hw.flags & flags) : false; 118 + } 119 + 113 120 static inline bool is_branch_counters_group(struct perf_event *event) 114 121 { 115 - return event->group_leader->hw.flags & PERF_X86_EVENT_BRANCH_COUNTERS; 122 + return check_leader_group(event->group_leader, PERF_X86_EVENT_BRANCH_COUNTERS); 116 123 } 117 124 118 125 static inline bool is_pebs_counter_event_group(struct perf_event *event) 119 126 { 120 - return event->group_leader->hw.flags & PERF_X86_EVENT_PEBS_CNTR; 127 + return check_leader_group(event->group_leader, PERF_X86_EVENT_PEBS_CNTR); 121 128 } 122 129 123 130 struct amd_nb {