+10 -3

arch/arm/mach-exynos/mct.c

reviewed

··· 44 44 char name[10]; 45 45 }; 46 46 47 47 - static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick); 48 48 - 49 47 static void exynos4_mct_write(unsigned int value, void *addr) 50 48 { 51 49 void __iomem *stat_addr; ··· 262 264 } 263 265 264 266 #ifdef CONFIG_LOCAL_TIMERS 267 267 + 268 268 + static DEFINE_PER_CPU(struct mct_clock_event_device, percpu_mct_tick); 269 269 + 265 270 /* Clock event handling */ 266 271 static void exynos4_mct_tick_stop(struct mct_clock_event_device *mevt) 267 272 { ··· 429 428 430 429 void local_timer_stop(struct clock_event_device *evt) 431 430 { 431 431 + unsigned int cpu = smp_processor_id(); 432 432 evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); 433 433 if (mct_int_type == MCT_INT_SPI) 434 434 - disable_irq(evt->irq); 434 434 + if (cpu == 0) 435 435 + remove_irq(evt->irq, &mct_tick0_event_irq); 436 436 + else 437 437 + remove_irq(evt->irq, &mct_tick1_event_irq); 435 438 else 436 439 disable_percpu_irq(IRQ_MCT_LOCALTIMER); 437 440 } ··· 448 443 449 444 clk_rate = clk_get_rate(mct_clk); 450 445 446 446 + #ifdef CONFIG_LOCAL_TIMERS 451 447 if (mct_int_type == MCT_INT_PPI) { 452 448 int err; 453 449 ··· 458 452 WARN(err, "MCT: can't request IRQ %d (%d)\n", 459 453 IRQ_MCT_LOCALTIMER, err); 460 454 } 455 455 + #endif /* CONFIG_LOCAL_TIMERS */ 461 456 } 462 457 463 458 static void __init exynos4_timer_init(void)

+1 -1

arch/arm/mach-mx5/board-mx51_babbage.c

reviewed

··· 362 362 { 363 363 iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; 364 364 iomux_v3_cfg_t power_key = NEW_PAD_CTRL(MX51_PAD_EIM_A27__GPIO2_21, 365 365 - PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); 365 365 + PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH); 366 366 367 367 imx51_soc_init(); 368 368

+1 -1

arch/arm/mach-mx5/board-mx53_evk.c

reviewed

··· 106 106 gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); 107 107 } 108 108 109 109 - static struct fec_platform_data mx53_evk_fec_pdata = { 109 109 + static const struct fec_platform_data mx53_evk_fec_pdata __initconst = { 110 110 .phy = PHY_INTERFACE_MODE_RMII, 111 111 }; 112 112

+1 -1

arch/arm/mach-mx5/board-mx53_loco.c

reviewed

··· 242 242 gpio_set_value(LOCO_FEC_PHY_RST, 1); 243 243 } 244 244 245 245 - static struct fec_platform_data mx53_loco_fec_data = { 245 245 + static const struct fec_platform_data mx53_loco_fec_data __initconst = { 246 246 .phy = PHY_INTERFACE_MODE_RMII, 247 247 }; 248 248

+1 -1

arch/arm/mach-mx5/board-mx53_smd.c

reviewed

··· 104 104 gpio_set_value(SMD_FEC_PHY_RST, 1); 105 105 } 106 106 107 107 - static struct fec_platform_data mx53_smd_fec_data = { 107 107 + static const struct fec_platform_data mx53_smd_fec_data __initconst = { 108 108 .phy = PHY_INTERFACE_MODE_RMII, 109 109 }; 110 110

+1 -1

arch/arm/mach-omap2/board-rx51-peripherals.c

reviewed

··· 193 193 static void __init rx51_charger_init(void) 194 194 { 195 195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, 196 196 - GPIOF_OUT_INIT_LOW, "isp1704_reset")); 196 196 + GPIOF_OUT_INIT_HIGH, "isp1704_reset")); 197 197 198 198 platform_device_register(&rx51_charger_device); 199 199 }

+3 -3

arch/arm/mach-omap2/mcbsp.c

reviewed

··· 145 145 pdata->reg_size = 4; 146 146 pdata->has_ccr = true; 147 147 } 148 148 + pdata->set_clk_src = omap2_mcbsp_set_clk_src; 149 149 + if (id == 1) 150 150 + pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; 148 151 149 152 if (oh->class->rev == MCBSP_CONFIG_TYPE3) { 150 153 if (id == 2) ··· 177 174 name, oh->name); 178 175 return PTR_ERR(pdev); 179 176 } 180 180 - pdata->set_clk_src = omap2_mcbsp_set_clk_src; 181 181 - if (id == 1) 182 182 - pdata->mux_signal = omap2_mcbsp1_mux_rx_clk; 183 177 omap_mcbsp_count++; 184 178 return 0; 185 179 }

+1

arch/arm/mach-s5pv210/mach-smdkv210.c

reviewed

··· 273 273 274 274 static struct platform_pwm_backlight_data smdkv210_bl_data = { 275 275 .pwm_id = 3, 276 276 + .pwm_period_ns = 1000, 276 277 }; 277 278 278 279 static void __init smdkv210_map_io(void)

+1

arch/arm/plat-mxc/cpufreq.c

reviewed

··· 17 17 * the CPU clock speed on the fly. 18 18 */ 19 19 20 20 + #include <linux/module.h> 20 21 #include <linux/cpufreq.h> 21 22 #include <linux/clk.h> 22 23 #include <linux/err.h>

+6 -1

arch/arm/plat-mxc/pwm.c

reviewed

··· 32 32 #define MX3_PWMSAR 0x0C /* PWM Sample Register */ 33 33 #define MX3_PWMPR 0x10 /* PWM Period Register */ 34 34 #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) 35 35 + #define MX3_PWMCR_DOZEEN (1 << 24) 36 36 + #define MX3_PWMCR_WAITEN (1 << 23) 37 37 + #define MX3_PWMCR_DBGEN (1 << 22) 35 38 #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) 36 39 #define MX3_PWMCR_CLKSRC_IPG (1 << 16) 37 40 #define MX3_PWMCR_EN (1 << 0) ··· 80 77 writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); 81 78 writel(period_cycles, pwm->mmio_base + MX3_PWMPR); 82 79 83 83 - cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; 80 80 + cr = MX3_PWMCR_PRESCALER(prescale) | 81 81 + MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | 82 82 + MX3_PWMCR_DBGEN | MX3_PWMCR_EN; 84 83 85 84 if (cpu_is_mx25()) 86 85 cr |= MX3_PWMCR_CLKSRC_IPG;

-1

arch/arm/plat-samsung/dev-backlight.c

reviewed

··· 15 15 #include <linux/slab.h> 16 16 #include <linux/io.h> 17 17 #include <linux/pwm_backlight.h> 18 18 - #include <linux/slab.h> 19 18 20 19 #include <plat/devs.h> 21 20 #include <plat/gpio-cfg.h>