Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pwm/for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"The Rockchip and Mediatek drivers gain support for more chips and the
LPSS driver undergoes some refactoring and receives some improvements.
Other than that there are various cleanups of the core"
* tag 'pwm/for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: sysfs: Replace sprintf() with sysfs_emit()
pwm: core: Replace custom implementation of device_match_fwnode()
pwm: lpss: Add a comment to the bypass field
pwm: lpss: Make use of bits.h macros for all masks
pwm: lpss: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
pwm: lpss: Use device_get_match_data() to get device data
pwm: lpss: Move resource mapping to the glue drivers
pwm: lpss: Move exported symbols to PWM_LPSS namespace
pwm: lpss: Deduplicate board info data structures
dt-bindings: pwm: Add compatible for Mediatek MT8188
dt-bindings: pwm: rockchip: Add rockchip,rk3128-pwm
dt-bindings: pwm: rockchip: Add description for rk3588
pwm: sysfs: Switch to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr()
pwm: rockchip: Convert to use dev_err_probe()
+92
-97
+1
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
+1
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml
+2
Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
+2
Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
···
21
21
- const: rockchip,rk2928-pwm
22
22
- items:
23
23
- enum:
24
+
- rockchip,rk3128-pwm
24
25
- rockchip,rk3368-pwm
25
26
- rockchip,rk3399-pwm
26
27
- rockchip,rv1108-pwm
···
31
30
- rockchip,px30-pwm
32
31
- rockchip,rk3308-pwm
33
32
- rockchip,rk3568-pwm
33
+
- rockchip,rk3588-pwm
34
34
- const: rockchip,rk3328-pwm
35
35
36
36
reg:
+1
-1
drivers/pwm/core.c
+1
-1
drivers/pwm/core.c
+11
-37
drivers/pwm/pwm-lpss-pci.c
+11
-37
drivers/pwm/pwm-lpss-pci.c
···
14
14
15
15
#include "pwm-lpss.h"
16
16
17
-
/* BayTrail */
18
-
static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
19
-
.clk_rate = 25000000,
20
-
.npwm = 1,
21
-
.base_unit_bits = 16,
22
-
};
23
-
24
-
/* Braswell */
25
-
static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
26
-
.clk_rate = 19200000,
27
-
.npwm = 1,
28
-
.base_unit_bits = 16,
29
-
};
30
-
31
-
/* Broxton */
32
-
static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
33
-
.clk_rate = 19200000,
34
-
.npwm = 4,
35
-
.base_unit_bits = 22,
36
-
.bypass = true,
37
-
};
38
-
39
-
/* Tangier */
40
-
static const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
41
-
.clk_rate = 19200000,
42
-
.npwm = 4,
43
-
.base_unit_bits = 22,
44
-
};
45
-
46
17
static int pwm_lpss_probe_pci(struct pci_dev *pdev,
47
18
const struct pci_device_id *id)
48
19
{
···
25
54
if (err < 0)
26
55
return err;
27
56
57
+
err = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
58
+
if (err)
59
+
return err;
60
+
28
61
info = (struct pwm_lpss_boardinfo *)id->driver_data;
29
-
lpwm = pwm_lpss_probe(&pdev->dev, &pdev->resource[0], info);
62
+
lpwm = pwm_lpss_probe(&pdev->dev, pcim_iomap_table(pdev)[0], info);
30
63
if (IS_ERR(lpwm))
31
64
return PTR_ERR(lpwm);
32
65
···
48
73
pm_runtime_get_sync(&pdev->dev);
49
74
}
50
75
51
-
#ifdef CONFIG_PM
52
76
static int pwm_lpss_runtime_suspend_pci(struct device *dev)
53
77
{
54
78
/*
···
61
87
{
62
88
return 0;
63
89
}
64
-
#endif
65
90
66
-
static const struct dev_pm_ops pwm_lpss_pci_pm = {
67
-
SET_RUNTIME_PM_OPS(pwm_lpss_runtime_suspend_pci,
68
-
pwm_lpss_runtime_resume_pci, NULL)
69
-
};
91
+
static DEFINE_RUNTIME_DEV_PM_OPS(pwm_lpss_pci_pm,
92
+
pwm_lpss_runtime_suspend_pci,
93
+
pwm_lpss_runtime_resume_pci,
94
+
NULL);
70
95
71
96
static const struct pci_device_id pwm_lpss_pci_ids[] = {
72
97
{ PCI_VDEVICE(INTEL, 0x0ac8), (unsigned long)&pwm_lpss_bxt_info},
···
87
114
.probe = pwm_lpss_probe_pci,
88
115
.remove = pwm_lpss_remove_pci,
89
116
.driver = {
90
-
.pm = &pwm_lpss_pci_pm,
117
+
.pm = pm_ptr(&pwm_lpss_pci_pm),
91
118
},
92
119
};
93
120
module_pci_driver(pwm_lpss_driver_pci);
94
121
95
122
MODULE_DESCRIPTION("PWM PCI driver for Intel LPSS");
96
123
MODULE_LICENSE("GPL v2");
124
+
MODULE_IMPORT_NS(PWM_LPSS);
+10
-30
drivers/pwm/pwm-lpss-platform.c
+10
-30
drivers/pwm/pwm-lpss-platform.c
···
7
7
* Derived from the original pwm-lpss.c
8
8
*/
9
9
10
-
#include <linux/acpi.h>
11
10
#include <linux/kernel.h>
11
+
#include <linux/mod_devicetable.h>
12
12
#include <linux/module.h>
13
13
#include <linux/platform_device.h>
14
14
#include <linux/pm_runtime.h>
15
+
#include <linux/property.h>
15
16
16
17
#include "pwm-lpss.h"
17
18
18
-
/* BayTrail */
19
-
static const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
20
-
.clk_rate = 25000000,
21
-
.npwm = 1,
22
-
.base_unit_bits = 16,
23
-
};
24
-
25
-
/* Braswell */
26
-
static const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
27
-
.clk_rate = 19200000,
28
-
.npwm = 1,
29
-
.base_unit_bits = 16,
30
-
.other_devices_aml_touches_pwm_regs = true,
31
-
};
32
-
33
-
/* Broxton */
34
-
static const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
35
-
.clk_rate = 19200000,
36
-
.npwm = 4,
37
-
.base_unit_bits = 22,
38
-
.bypass = true,
39
-
};
40
19
41
20
static int pwm_lpss_probe_platform(struct platform_device *pdev)
42
21
{
43
22
const struct pwm_lpss_boardinfo *info;
44
-
const struct acpi_device_id *id;
45
23
struct pwm_lpss_chip *lpwm;
46
-
struct resource *r;
24
+
void __iomem *base;
47
25
48
-
id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
49
-
if (!id)
26
+
info = device_get_match_data(&pdev->dev);
27
+
if (!info)
50
28
return -ENODEV;
51
29
52
-
info = (const struct pwm_lpss_boardinfo *)id->driver_data;
53
-
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
30
+
base = devm_platform_ioremap_resource(pdev, 0);
31
+
if (IS_ERR(base))
32
+
return PTR_ERR(base);
54
33
55
-
lpwm = pwm_lpss_probe(&pdev->dev, r, info);
34
+
lpwm = pwm_lpss_probe(&pdev->dev, base, info);
56
35
if (IS_ERR(lpwm))
57
36
return PTR_ERR(lpwm);
58
37
···
89
110
90
111
MODULE_DESCRIPTION("PWM platform driver for Intel LPSS");
91
112
MODULE_LICENSE("GPL v2");
113
+
MODULE_IMPORT_NS(PWM_LPSS);
92
114
MODULE_ALIAS("platform:pwm-lpss");
+40
-6
drivers/pwm/pwm-lpss.c
+40
-6
drivers/pwm/pwm-lpss.c
···
10
10
* Author: Alan Cox <alan@linux.intel.com>
11
11
*/
12
12
13
+
#include <linux/bits.h>
13
14
#include <linux/delay.h>
14
15
#include <linux/io.h>
15
16
#include <linux/iopoll.h>
···
19
18
#include <linux/pm_runtime.h>
20
19
#include <linux/time.h>
21
20
21
+
#define DEFAULT_SYMBOL_NAMESPACE PWM_LPSS
22
+
22
23
#include "pwm-lpss.h"
23
24
24
25
#define PWM 0x00000000
25
26
#define PWM_ENABLE BIT(31)
26
27
#define PWM_SW_UPDATE BIT(30)
27
28
#define PWM_BASE_UNIT_SHIFT 8
28
-
#define PWM_ON_TIME_DIV_MASK 0x000000ff
29
+
#define PWM_ON_TIME_DIV_MASK GENMASK(7, 0)
29
30
30
31
/* Size of each PWM register space if multiple */
31
32
#define PWM_SIZE 0x400
33
+
34
+
/* BayTrail */
35
+
const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
36
+
.clk_rate = 25000000,
37
+
.npwm = 1,
38
+
.base_unit_bits = 16,
39
+
};
40
+
EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
41
+
42
+
/* Braswell */
43
+
const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
44
+
.clk_rate = 19200000,
45
+
.npwm = 1,
46
+
.base_unit_bits = 16,
47
+
.other_devices_aml_touches_pwm_regs = true,
48
+
};
49
+
EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
50
+
51
+
/* Broxton */
52
+
const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
53
+
.clk_rate = 19200000,
54
+
.npwm = 4,
55
+
.base_unit_bits = 22,
56
+
.bypass = true,
57
+
};
58
+
EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
59
+
60
+
/* Tangier */
61
+
const struct pwm_lpss_boardinfo pwm_lpss_tng_info = {
62
+
.clk_rate = 19200000,
63
+
.npwm = 4,
64
+
.base_unit_bits = 22,
65
+
};
66
+
EXPORT_SYMBOL_GPL(pwm_lpss_tng_info);
32
67
33
68
static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
34
69
{
···
244
207
.owner = THIS_MODULE,
245
208
};
246
209
247
-
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
210
+
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base,
248
211
const struct pwm_lpss_boardinfo *info)
249
212
{
250
213
struct pwm_lpss_chip *lpwm;
···
259
222
if (!lpwm)
260
223
return ERR_PTR(-ENOMEM);
261
224
262
-
lpwm->regs = devm_ioremap_resource(dev, r);
263
-
if (IS_ERR(lpwm->regs))
264
-
return ERR_CAST(lpwm->regs);
265
-
225
+
lpwm->regs = base;
266
226
lpwm->info = info;
267
227
268
228
c = lpwm->info->clk_rate;
+11
-1
drivers/pwm/pwm-lpss.h
+11
-1
drivers/pwm/pwm-lpss.h
···
25
25
unsigned long clk_rate;
26
26
unsigned int npwm;
27
27
unsigned long base_unit_bits;
28
+
/*
29
+
* Some versions of the IP may stuck in the state machine if enable
30
+
* bit is not set, and hence update bit will show busy status till
31
+
* the reset. For the rest it may be otherwise.
32
+
*/
28
33
bool bypass;
29
34
/*
30
35
* On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
···
38
33
bool other_devices_aml_touches_pwm_regs;
39
34
};
40
35
41
-
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
36
+
extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info;
37
+
extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info;
38
+
extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info;
39
+
extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info;
40
+
41
+
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, void __iomem *base,
42
42
const struct pwm_lpss_boardinfo *info);
43
43
44
44
#endif /* __PWM_LPSS_H */
+6
-12
drivers/pwm/pwm-rockchip.c
+6
-12
drivers/pwm/pwm-rockchip.c
···
328
328
else
329
329
pc->pclk = pc->clk;
330
330
331
-
if (IS_ERR(pc->pclk)) {
332
-
ret = PTR_ERR(pc->pclk);
333
-
if (ret != -EPROBE_DEFER)
334
-
dev_err(&pdev->dev, "Can't get APB clk: %d\n", ret);
335
-
return ret;
336
-
}
331
+
if (IS_ERR(pc->pclk))
332
+
return dev_err_probe(&pdev->dev, PTR_ERR(pc->pclk), "Can't get APB clk\n");
337
333
338
334
ret = clk_prepare_enable(pc->clk);
339
-
if (ret) {
340
-
dev_err(&pdev->dev, "Can't prepare enable PWM clk: %d\n", ret);
341
-
return ret;
342
-
}
335
+
if (ret)
336
+
return dev_err_probe(&pdev->dev, ret, "Can't prepare enable PWM clk\n");
343
337
344
338
ret = clk_prepare_enable(pc->pclk);
345
339
if (ret) {
346
-
dev_err(&pdev->dev, "Can't prepare enable APB clk: %d\n", ret);
340
+
dev_err_probe(&pdev->dev, ret, "Can't prepare enable APB clk\n");
347
341
goto err_clk;
348
342
}
349
343
···
354
360
355
361
ret = pwmchip_add(&pc->chip);
356
362
if (ret < 0) {
357
-
dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
363
+
dev_err_probe(&pdev->dev, ret, "pwmchip_add() failed\n");
358
364
goto err_pclk;
359
365
}
360
366
+10
-10
drivers/pwm/sysfs.c
+10
-10
drivers/pwm/sysfs.c
···
42
42
43
43
pwm_get_state(pwm, &state);
44
44
45
-
return sprintf(buf, "%llu\n", state.period);
45
+
return sysfs_emit(buf, "%llu\n", state.period);
46
46
}
47
47
48
48
static ssize_t period_store(struct device *child,
···
77
77
78
78
pwm_get_state(pwm, &state);
79
79
80
-
return sprintf(buf, "%llu\n", state.duty_cycle);
80
+
return sysfs_emit(buf, "%llu\n", state.duty_cycle);
81
81
}
82
82
83
83
static ssize_t duty_cycle_store(struct device *child,
···
112
112
113
113
pwm_get_state(pwm, &state);
114
114
115
-
return sprintf(buf, "%d\n", state.enabled);
115
+
return sysfs_emit(buf, "%d\n", state.enabled);
116
116
}
117
117
118
118
static ssize_t enable_store(struct device *child,
···
171
171
break;
172
172
}
173
173
174
-
return sprintf(buf, "%s\n", polarity);
174
+
return sysfs_emit(buf, "%s\n", polarity);
175
175
}
176
176
177
177
static ssize_t polarity_store(struct device *child,
···
212
212
if (ret)
213
213
return ret;
214
214
215
-
return sprintf(buf, "%u %u\n", result.period, result.duty_cycle);
215
+
return sysfs_emit(buf, "%u %u\n", result.period, result.duty_cycle);
216
216
}
217
217
218
218
static DEVICE_ATTR_RW(period);
···
361
361
{
362
362
const struct pwm_chip *chip = dev_get_drvdata(parent);
363
363
364
-
return sprintf(buf, "%u\n", chip->npwm);
364
+
return sysfs_emit(buf, "%u\n", chip->npwm);
365
365
}
366
366
static DEVICE_ATTR_RO(npwm);
367
367
···
433
433
return ret;
434
434
}
435
435
436
-
static int __maybe_unused pwm_class_suspend(struct device *parent)
436
+
static int pwm_class_suspend(struct device *parent)
437
437
{
438
438
struct pwm_chip *chip = dev_get_drvdata(parent);
439
439
unsigned int i;
···
464
464
return ret;
465
465
}
466
466
467
-
static int __maybe_unused pwm_class_resume(struct device *parent)
467
+
static int pwm_class_resume(struct device *parent)
468
468
{
469
469
struct pwm_chip *chip = dev_get_drvdata(parent);
470
470
471
471
return pwm_class_resume_npwm(parent, chip->npwm);
472
472
}
473
473
474
-
static SIMPLE_DEV_PM_OPS(pwm_class_pm_ops, pwm_class_suspend, pwm_class_resume);
474
+
static DEFINE_SIMPLE_DEV_PM_OPS(pwm_class_pm_ops, pwm_class_suspend, pwm_class_resume);
475
475
476
476
static struct class pwm_class = {
477
477
.name = "pwm",
478
478
.owner = THIS_MODULE,
479
479
.dev_groups = pwm_chip_groups,
480
-
.pm = &pwm_class_pm_ops,
480
+
.pm = pm_sleep_ptr(&pwm_class_pm_ops),
481
481
};
482
482
483
483
static int pwmchip_sysfs_match(struct device *parent, const void *data)