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clk: renesas: rzg2l: Add macro to loop through module clocks

Add a macro to iterate over the module clocks array. This will be useful
in the upcoming commits that move MSTOP support into the clock
enable/disable APIs.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/20250527112403.1254122-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Claudiu Beznea and committed by
Geert Uytterhoeven 3fd4a8bb 065fe720

+9 -9
+9 -9
drivers/clk/renesas/rzg2l-cpg.c
··· 1202 1202 1203 1203 #define to_mod_clock(_hw) container_of(_hw, struct mstp_clock, hw) 1204 1204 1205 + #define for_each_mod_clock(mod_clock, hw, priv) \ 1206 + for (unsigned int i = 0; (priv) && i < (priv)->num_mod_clks; i++) \ 1207 + if ((priv)->clks[(priv)->num_core_clks + i] == ERR_PTR(-ENOENT)) \ 1208 + continue; \ 1209 + else if (((hw) = __clk_get_hw((priv)->clks[(priv)->num_core_clks + i])) && \ 1210 + ((mod_clock) = to_mod_clock(hw))) 1211 + 1205 1212 static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) 1206 1213 { 1207 1214 struct mstp_clock *clock = to_mod_clock(hw); ··· 1321 1314 *rzg2l_mod_clock_get_sibling(struct mstp_clock *clock, 1322 1315 struct rzg2l_cpg_priv *priv) 1323 1316 { 1317 + struct mstp_clock *clk; 1324 1318 struct clk_hw *hw; 1325 - unsigned int i; 1326 1319 1327 - for (i = 0; i < priv->num_mod_clks; i++) { 1328 - struct mstp_clock *clk; 1329 - 1330 - if (priv->clks[priv->num_core_clks + i] == ERR_PTR(-ENOENT)) 1331 - continue; 1332 - 1333 - hw = __clk_get_hw(priv->clks[priv->num_core_clks + i]); 1334 - clk = to_mod_clock(hw); 1320 + for_each_mod_clock(clk, hw, priv) { 1335 1321 if (clock->off == clk->off && clock->bit == clk->bit) 1336 1322 return clk; 1337 1323 }