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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clk: samsung: add Exynos ACPM clock driver
Add the Exynos ACPM clock driver. It provides support for clocks that
are controlled by firmware that implements the ACPM interface.
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Tested-by: Peter Griffin <peter.griffin@linaro.org> # on gs101-oriole
Link: https://patch.msgid.link/20251010-acpm-clk-v6-4-321ee8826fd4@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
authored by
Tudor Ambarus
and committed by
Krzysztof Kozlowski
40498a74
bad0d126
+196
+10
drivers/clk/samsung/Kconfig
+10
drivers/clk/samsung/Kconfig
···
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status of the certains clocks from SoC, but it could also be tied to
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other devices as an input clock.
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config EXYNOS_ACPM_CLK
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tristate "Clock driver controlled via ACPM interface"
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depends on EXYNOS_ACPM_PROTOCOL || (COMPILE_TEST && !EXYNOS_ACPM_PROTOCOL)
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help
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This driver provides support for clocks that are controlled by
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firmware that implements the ACPM interface.
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This driver uses the ACPM interface to interact with the firmware
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providing all the clock controlls.
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config TESLA_FSD_COMMON_CLK
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bool "Tesla FSD clock controller support" if COMPILE_TEST
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depends on COMMON_CLK_SAMSUNG
+1
drivers/clk/samsung/Makefile
+1
drivers/clk/samsung/Makefile
···
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov9.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov920.o
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obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-gs101.o
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obj-$(CONFIG_EXYNOS_ACPM_CLK) += clk-acpm.o
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obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o
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obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210-audss.o
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obj-$(CONFIG_TESLA_FSD_COMMON_CLK) += clk-fsd.o
+185
drivers/clk/samsung/clk-acpm.c
+185
drivers/clk/samsung/clk-acpm.c
···
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Samsung Exynos ACPM protocol based clock driver.
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*
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* Copyright 2025 Linaro Ltd.
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*/
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#include <linux/array_size.h>
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#include <linux/clk-provider.h>
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#include <linux/container_of.h>
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#include <linux/device/devres.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/firmware/samsung/exynos-acpm-protocol.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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+
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struct acpm_clk {
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u32 id;
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struct clk_hw hw;
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unsigned int mbox_chan_id;
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const struct acpm_handle *handle;
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};
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struct acpm_clk_variant {
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const char *name;
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};
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struct acpm_clk_driver_data {
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const struct acpm_clk_variant *clks;
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unsigned int nr_clks;
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unsigned int mbox_chan_id;
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};
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#define to_acpm_clk(clk) container_of(clk, struct acpm_clk, hw)
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#define ACPM_CLK(cname) \
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{ \
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.name = cname, \
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}
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static const struct acpm_clk_variant gs101_acpm_clks[] = {
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ACPM_CLK("mif"),
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ACPM_CLK("int"),
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ACPM_CLK("cpucl0"),
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ACPM_CLK("cpucl1"),
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ACPM_CLK("cpucl2"),
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ACPM_CLK("g3d"),
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ACPM_CLK("g3dl2"),
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ACPM_CLK("tpu"),
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ACPM_CLK("intcam"),
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ACPM_CLK("tnr"),
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ACPM_CLK("cam"),
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ACPM_CLK("mfc"),
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ACPM_CLK("disp"),
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ACPM_CLK("bo"),
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};
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static const struct acpm_clk_driver_data acpm_clk_gs101 = {
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.clks = gs101_acpm_clks,
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.nr_clks = ARRAY_SIZE(gs101_acpm_clks),
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.mbox_chan_id = 0,
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};
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static unsigned long acpm_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct acpm_clk *clk = to_acpm_clk(hw);
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return clk->handle->ops.dvfs_ops.get_rate(clk->handle,
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clk->mbox_chan_id, clk->id);
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}
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static int acpm_clk_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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/*
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* We can't figure out what rate it will be, so just return the
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* rate back to the caller. acpm_clk_recalc_rate() will be called
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* after the rate is set and we'll know what rate the clock is
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* running at then.
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*/
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return 0;
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}
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static int acpm_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct acpm_clk *clk = to_acpm_clk(hw);
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return clk->handle->ops.dvfs_ops.set_rate(clk->handle,
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clk->mbox_chan_id, clk->id, rate);
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}
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static const struct clk_ops acpm_clk_ops = {
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.recalc_rate = acpm_clk_recalc_rate,
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.determine_rate = acpm_clk_determine_rate,
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.set_rate = acpm_clk_set_rate,
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};
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static int acpm_clk_register(struct device *dev, struct acpm_clk *aclk,
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const char *name)
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{
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struct clk_init_data init = {};
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init.name = name;
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init.ops = &acpm_clk_ops;
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aclk->hw.init = &init;
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return devm_clk_hw_register(dev, &aclk->hw);
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}
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static int acpm_clk_probe(struct platform_device *pdev)
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{
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const struct acpm_handle *acpm_handle;
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struct clk_hw_onecell_data *clk_data;
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struct clk_hw **hws;
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struct device *dev = &pdev->dev;
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struct acpm_clk *aclks;
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unsigned int mbox_chan_id;
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int i, err, count;
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acpm_handle = devm_acpm_get_by_node(dev, dev->parent->of_node);
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if (IS_ERR(acpm_handle))
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return dev_err_probe(dev, PTR_ERR(acpm_handle),
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"Failed to get acpm handle\n");
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count = acpm_clk_gs101.nr_clks;
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mbox_chan_id = acpm_clk_gs101.mbox_chan_id;
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, count),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->num = count;
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hws = clk_data->hws;
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aclks = devm_kcalloc(dev, count, sizeof(*aclks), GFP_KERNEL);
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if (!aclks)
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return -ENOMEM;
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for (i = 0; i < count; i++) {
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struct acpm_clk *aclk = &aclks[i];
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/*
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* The code assumes the clock IDs start from zero,
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* are sequential and do not have gaps.
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*/
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aclk->id = i;
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aclk->handle = acpm_handle;
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aclk->mbox_chan_id = mbox_chan_id;
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hws[i] = &aclk->hw;
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err = acpm_clk_register(dev, aclk,
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acpm_clk_gs101.clks[i].name);
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if (err)
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return dev_err_probe(dev, err,
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"Failed to register clock\n");
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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clk_data);
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}
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static const struct platform_device_id acpm_clk_id[] = {
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{ "gs101-acpm-clk" },
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{}
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};
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MODULE_DEVICE_TABLE(platform, acpm_clk_id);
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static struct platform_driver acpm_clk_driver = {
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.driver = {
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.name = "acpm-clocks",
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},
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.probe = acpm_clk_probe,
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.id_table = acpm_clk_id,
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};
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module_platform_driver(acpm_clk_driver);
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MODULE_AUTHOR("Tudor Ambarus <tudor.ambarus@linaro.org>");
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MODULE_DESCRIPTION("Samsung Exynos ACPM clock driver");
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MODULE_LICENSE("GPL");