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dt-bindings: fu540: prci: convert PRCI bindings to json-schema
FU540-C000 SoC from SiFive has a PRCI block, here we convert
the device tree bindings from txt to YAML.
Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/r/1601393531-2402-2-git-send-email-sagar.kadam@sifive.com
Signed-off-by: Rob Herring <robh@kernel.org>
authored by
Sagar Kadam
and committed by
Rob Herring
406171bf
36705c6f
+60
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Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt
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Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt
···
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SiFive FU540 PRCI bindings
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On the FU540 family of SoCs, most system-wide clock and reset integration
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is via the PRCI IP block.
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Required properties:
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- compatible: Should be "sifive,<chip>-prci". Only one value is
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supported: "sifive,fu540-c000-prci"
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- reg: Should describe the PRCI's register target physical address region
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- clocks: Should point to the hfclk device tree node and the rtcclk
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device tree node. The RTC clock here is not a time-of-day clock,
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but is instead a high-stability clock source for system timers
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and cycle counters.
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock via the clock ID
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macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
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These macros begin with PRCI_CLK_.
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The hfclk and rtcclk nodes are required, and represent physical
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crystals or resonators located on the PCB. These nodes should be present
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underneath /, rather than /soc.
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Examples:
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/* under /, in PCB-specific DT data */
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hfclk: hfclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <33333333>;
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clock-output-names = "hfclk";
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};
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rtcclk: rtcclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <1000000>;
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clock-output-names = "rtcclk";
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};
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/* under /soc, in SoC-specific DT data */
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prci: clock-controller@10000000 {
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compatible = "sifive,fu540-c000-prci";
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reg = <0x0 0x10000000 0x0 0x1000>;
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clocks = <&hfclk>, <&rtcclk>;
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#clock-cells = <1>;
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};
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Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
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Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml
···
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2020 SiFive, Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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description:
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On the FU540 family of SoCs, most system-wide clock and reset integration
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is via the PRCI IP block.
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The clock consumer should specify the desired clock via the clock ID
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macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
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These macros begin with PRCI_CLK_.
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The hfclk and rtcclk nodes are required, and represent physical
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crystals or resonators located on the PCB. These nodes should be present
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underneath /, rather than /soc.
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properties:
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compatible:
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const: sifive,fu540-c000-prci
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reg:
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maxItems: 1
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clocks:
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items:
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- description: high frequency clock.
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- description: RTL clock.
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clock-names:
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items:
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- const: hfclk
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- const: rtcclk
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"#clock-cells":
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const: 1
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required:
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- compatible
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- reg
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- clocks
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- "#clock-cells"
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additionalProperties: false
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examples:
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- |
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prci: clock-controller@10000000 {
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compatible = "sifive,fu540-c000-prci";
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reg = <0x10000000 0x1000>;
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clocks = <&hfclk>, <&rtcclk>;
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#clock-cells = <1>;
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};