Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-for-v4.15-rc3' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"This pull is a bit larger than I'd like but a large bunch of it is
license fixes, AMD wanted to fix the licenses for a bunch of files
that were missing them,
Otherwise a bunch of TTM regression fix since the hugepage support,
some i915 and gvt fixes, a core connector free in a safe context fix,
and one bridge fix"
* tag 'drm-fixes-for-v4.15-rc3' of git://people.freedesktop.org/~airlied/linux: (26 commits)
drm/bridge: analogix dp: Fix runtime PM state in get_modes() callback
Revert "drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk"
drm/vc4: Fix false positive WARN() backtrace on refcount_inc() usage
drm/i915: Call i915_gem_init_userptr() before taking struct_mutex
drm/exynos: remove unnecessary function declaration
drm/exynos: remove unnecessary descrptions
drm/exynos: gem: Drop NONCONTIG flag for buffers allocated without IOMMU
drm/exynos: Fix dma-buf import
drm/ttm: swap consecutive allocated pooled pages v4
drm: safely free connectors from connector_iter
drm/i915/gvt: set max priority for gvt context
drm/i915/gvt: Don't mark vgpu context as inactive when preempted
drm/i915/gvt: Limit read hw reg to active vgpu
drm/i915/gvt: Export intel_gvt_render_mmio_to_ring_id()
drm/i915/gvt: Emulate PCI expansion ROM base address register
drm/ttm: swap consecutive allocated cached pages v3
drm/ttm: roundup the shrink request to prevent skip huge pool
drm/ttm: add page order support in ttm_pages_put
drm/ttm: add set_pages_wb for handling page order more than zero
drm/ttm: add page order in page pool
...
+1086
-127
+21
drivers/gpu/drm/amd/acp/Makefile
+21
drivers/gpu/drm/amd/acp/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the ACP, which is a sub-component
3
24
# of AMDSOC/AMDGPU drm driver.
4
25
# It provides the HW control for ACP related functionalities.
+21
-1
drivers/gpu/drm/amd/amdgpu/Makefile
+21
-1
drivers/gpu/drm/amd/amdgpu/Makefile
···
1
-
# SPDX-License-Identifier: GPL-2.0
1
+
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
2
22
#
3
23
# Makefile for the drm device driver. This driver provides support for the
4
24
# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
2
4
* Permission is hereby granted, free of charge, to any person obtaining a
3
5
* copy of this software and associated documentation files (the "Software"),
4
6
* to deal in the Software without restriction, including without limitation
+23
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+23
-1
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
2
24
#if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
3
25
#define _AMDGPU_TRACE_H_
4
26
+21
-1
drivers/gpu/drm/amd/amdkfd/Makefile
+21
-1
drivers/gpu/drm/amd/amdkfd/Makefile
···
1
-
# SPDX-License-Identifier: GPL-2.0
1
+
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
2
22
#
3
23
# Makefile for Heterogenous System Architecture support for AMD GPU devices
4
24
#
+21
drivers/gpu/drm/amd/display/Makefile
+21
drivers/gpu/drm/amd/display/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the DAL (Display Abstract Layer), which is a sub-component
3
24
# of the AMDGPU drm driver.
4
25
# It provides the HW control for display related functionalities.
+21
drivers/gpu/drm/amd/display/amdgpu_dm/Makefile
+21
drivers/gpu/drm/amd/display/amdgpu_dm/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'dm' sub-component of DAL.
3
24
# It provides the control and status of dm blocks.
4
25
+21
drivers/gpu/drm/amd/display/dc/Makefile
+21
drivers/gpu/drm/amd/display/dc/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for Display Core (dc) component.
3
24
#
4
25
+21
drivers/gpu/drm/amd/display/dc/basics/Makefile
+21
drivers/gpu/drm/amd/display/dc/basics/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'utils' sub-component of DAL.
3
24
# It provides the general basic services required by other DAL
4
25
# subcomponents.
+21
drivers/gpu/drm/amd/display/dc/bios/Makefile
+21
drivers/gpu/drm/amd/display/dc/bios/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'bios' sub-component of DAL.
3
24
# It provides the parsing and executing controls for atom bios image.
4
25
+21
drivers/gpu/drm/amd/display/dc/calcs/Makefile
+21
drivers/gpu/drm/amd/display/dc/calcs/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'calcs' sub-component of DAL.
3
24
# It calculates Bandwidth and Watermarks values for HW programming
4
25
#
+22
drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+22
drivers/gpu/drm/amd/display/dc/core/dc_debug.c
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
/*
2
24
* dc_debug.c
3
25
*
4
26
* Created on: Nov 3, 2016
+1
-1
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+1
-1
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+22
drivers/gpu/drm/amd/display/dc/dc_helper.c
+22
drivers/gpu/drm/amd/display/dc/dc_helper.c
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
/*
2
24
* dc_helper.c
3
25
*
4
26
* Created on: Aug 30, 2016
+21
drivers/gpu/drm/amd/display/dc/dce/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for common 'dce' logic
3
24
# HW object file under this folder follow similar pattern for HW programming
4
25
# - register offset and/or shift + mask stored in the dec_hw struct
+21
drivers/gpu/drm/amd/display/dc/dce100/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce100/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'controller' sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+1
-1
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+1
-1
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+23
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
+23
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.h
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*
23
+
*/
24
+
/*
2
25
* dce100_resource.h
3
26
*
4
27
* Created on: 2016-01-20
+21
drivers/gpu/drm/amd/display/dc/dce110/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce110/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'controller' sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+1
-1
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+1
-1
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+23
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
+23
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c
···
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
1
24
#include "dm_services.h"
2
25
3
26
/* include DCE11 register header files */
+21
drivers/gpu/drm/amd/display/dc/dce112/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce112/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'controller' sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+21
drivers/gpu/drm/amd/display/dc/dce120/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce120/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'controller' sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+21
drivers/gpu/drm/amd/display/dc/dce80/Makefile
+21
drivers/gpu/drm/amd/display/dc/dce80/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'controller' sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+21
drivers/gpu/drm/amd/display/dc/dcn10/Makefile
+21
drivers/gpu/drm/amd/display/dc/dcn10/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for DCN.
3
24
4
25
DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \
+21
drivers/gpu/drm/amd/display/dc/dml/Makefile
+21
drivers/gpu/drm/amd/display/dc/dml/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'utils' sub-component of DAL.
3
24
# It provides the general basic services required by other DAL
4
25
# subcomponents.
+21
drivers/gpu/drm/amd/display/dc/gpio/Makefile
+21
drivers/gpu/drm/amd/display/dc/gpio/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'gpio' sub-component of DAL.
3
24
# It provides the control and status of HW GPIO pins.
4
25
+21
drivers/gpu/drm/amd/display/dc/i2caux/Makefile
+21
drivers/gpu/drm/amd/display/dc/i2caux/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'i2c' sub-component of DAL.
3
24
# It provides the control and status of HW i2c engine of the adapter.
4
25
+22
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+22
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
/*
2
24
* link_encoder.h
3
25
*
4
26
* Created on: Oct 6, 2015
+22
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
+22
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
···
1
1
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
/*
2
24
* stream_encoder.h
3
25
*
4
26
*/
+21
drivers/gpu/drm/amd/display/dc/irq/Makefile
+21
drivers/gpu/drm/amd/display/dc/irq/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'audio' sub-component of DAL.
3
24
# It provides the control and status of HW adapter resources,
4
25
# that are global for the ASIC and sharable between pipes.
+21
drivers/gpu/drm/amd/display/dc/virtual/Makefile
+21
drivers/gpu/drm/amd/display/dc/virtual/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the virtual sub-component of DAL.
3
24
# It provides the control and status of HW CRTC block.
4
25
+21
drivers/gpu/drm/amd/display/modules/freesync/Makefile
+21
drivers/gpu/drm/amd/display/modules/freesync/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for the 'freesync' sub-module of DAL.
3
24
#
4
25
+21
drivers/gpu/drm/amd/lib/Makefile
+21
drivers/gpu/drm/amd/lib/Makefile
···
1
1
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
22
+
#
2
23
# Makefile for AMD library routines, which are used by AMD driver
3
24
# components.
4
25
#
+21
-1
drivers/gpu/drm/amd/powerplay/Makefile
+21
-1
drivers/gpu/drm/amd/powerplay/Makefile
···
1
-
# SPDX-License-Identifier: GPL-2.0
1
+
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
2
22
3
23
subdir-ccflags-y += \
4
24
-I$(FULL_AMD_PATH)/powerplay/inc/ \
+21
-1
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile
+21
-1
drivers/gpu/drm/amd/powerplay/hwmgr/Makefile
···
1
-
# SPDX-License-Identifier: GPL-2.0
1
+
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
2
22
#
3
23
# Makefile for the 'hw manager' sub-component of powerplay.
4
24
# It provides the hardware management services for the driver.
+23
-1
drivers/gpu/drm/amd/powerplay/hwmgr/pp_overdriver.c
+23
-1
drivers/gpu/drm/amd/powerplay/hwmgr/pp_overdriver.c
···
1
-
// SPDX-License-Identifier: GPL-2.0
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
2
24
#include "pp_overdriver.h"
3
25
#include <linux/errno.h>
4
26
+23
-1
drivers/gpu/drm/amd/powerplay/inc/smu72.h
+23
-1
drivers/gpu/drm/amd/powerplay/inc/smu72.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
2
24
#ifndef SMU72_H
3
25
#define SMU72_H
4
26
+23
-1
drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h
+23
-1
drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
2
24
#ifndef SMU72_DISCRETE_H
3
25
#define SMU72_DISCRETE_H
4
26
+21
-1
drivers/gpu/drm/amd/powerplay/smumgr/Makefile
+21
-1
drivers/gpu/drm/amd/powerplay/smumgr/Makefile
···
1
-
# SPDX-License-Identifier: GPL-2.0
1
+
#
2
+
# Copyright 2017 Advanced Micro Devices, Inc.
3
+
#
4
+
# Permission is hereby granted, free of charge, to any person obtaining a
5
+
# copy of this software and associated documentation files (the "Software"),
6
+
# to deal in the Software without restriction, including without limitation
7
+
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
# and/or sell copies of the Software, and to permit persons to whom the
9
+
# Software is furnished to do so, subject to the following conditions:
10
+
#
11
+
# The above copyright notice and this permission notice shall be included in
12
+
# all copies or substantial portions of the Software.
13
+
#
14
+
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
# OTHER DEALINGS IN THE SOFTWARE.
21
+
#
2
22
#
3
23
# Makefile for the 'smu manager' sub-component of powerplay.
4
24
# It provides the smu management services for the driver.
+23
-1
drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h
+23
-1
drivers/gpu/drm/amd/scheduler/gpu_sched_trace.h
···
1
-
/* SPDX-License-Identifier: GPL-2.0 */
1
+
/*
2
+
* Copyright 2017 Advanced Micro Devices, Inc.
3
+
*
4
+
* Permission is hereby granted, free of charge, to any person obtaining a
5
+
* copy of this software and associated documentation files (the "Software"),
6
+
* to deal in the Software without restriction, including without limitation
7
+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
+
* and/or sell copies of the Software, and to permit persons to whom the
9
+
* Software is furnished to do so, subject to the following conditions:
10
+
*
11
+
* The above copyright notice and this permission notice shall be included in
12
+
* all copies or substantial portions of the Software.
13
+
*
14
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15
+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16
+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17
+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18
+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19
+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20
+
* OTHER DEALINGS IN THE SOFTWARE.
21
+
*
22
+
*/
23
+
2
24
#if !defined(_GPU_SCHED_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
3
25
#define _GPU_SCHED_TRACE_H_
4
26
+2
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+2
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+26
-2
drivers/gpu/drm/drm_connector.c
+26
-2
drivers/gpu/drm/drm_connector.c
···
152
152
connector->funcs->destroy(connector);
153
153
}
154
154
155
+
static void drm_connector_free_work_fn(struct work_struct *work)
156
+
{
157
+
struct drm_connector *connector =
158
+
container_of(work, struct drm_connector, free_work);
159
+
struct drm_device *dev = connector->dev;
160
+
161
+
drm_mode_object_unregister(dev, &connector->base);
162
+
connector->funcs->destroy(connector);
163
+
}
164
+
155
165
/**
156
166
* drm_connector_init - Init a preallocated connector
157
167
* @dev: DRM device
···
190
180
false, drm_connector_free);
191
181
if (ret)
192
182
return ret;
183
+
184
+
INIT_WORK(&connector->free_work, drm_connector_free_work_fn);
193
185
194
186
connector->base.properties = &connector->properties;
195
187
connector->dev = dev;
···
541
529
}
542
530
EXPORT_SYMBOL(drm_connector_list_iter_begin);
543
531
532
+
/*
533
+
* Extra-safe connector put function that works in any context. Should only be
534
+
* used from the connector_iter functions, where we never really expect to
535
+
* actually release the connector when dropping our final reference.
536
+
*/
537
+
static void
538
+
drm_connector_put_safe(struct drm_connector *conn)
539
+
{
540
+
if (refcount_dec_and_test(&conn->base.refcount.refcount))
541
+
schedule_work(&conn->free_work);
542
+
}
543
+
544
544
/**
545
545
* drm_connector_list_iter_next - return next connector
546
546
* @iter: connectr_list iterator
···
585
561
spin_unlock_irqrestore(&config->connector_list_lock, flags);
586
562
587
563
if (old_conn)
588
-
drm_connector_put(old_conn);
564
+
drm_connector_put_safe(old_conn);
589
565
590
566
return iter->conn;
591
567
}
···
604
580
{
605
581
iter->dev = NULL;
606
582
if (iter->conn)
607
-
drm_connector_put(iter->conn);
583
+
drm_connector_put_safe(iter->conn);
608
584
lock_release(&connector_list_iter_dep_map, 0, _RET_IP_);
609
585
}
610
586
EXPORT_SYMBOL(drm_connector_list_iter_end);
+2
drivers/gpu/drm/drm_mode_config.c
+2
drivers/gpu/drm/drm_mode_config.c
···
431
431
drm_connector_put(connector);
432
432
}
433
433
drm_connector_list_iter_end(&conn_iter);
434
+
/* connector_iter drops references in a work item. */
435
+
flush_scheduled_work();
434
436
if (WARN_ON(!list_empty(&dev->mode_config.connector_list))) {
435
437
drm_connector_list_iter_begin(dev, &conn_iter);
436
438
drm_for_each_connector_iter(connector, &conn_iter)
+22
-24
drivers/gpu/drm/exynos/exynos_drm_drv.c
+22
-24
drivers/gpu/drm/exynos/exynos_drm_drv.c
···
37
37
#define DRIVER_MAJOR 1
38
38
#define DRIVER_MINOR 0
39
39
40
-
static struct device *exynos_drm_get_dma_device(void);
41
-
42
40
int exynos_atomic_check(struct drm_device *dev,
43
41
struct drm_atomic_state *state)
44
42
{
···
146
148
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
147
149
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
148
150
.gem_prime_export = drm_gem_prime_export,
149
-
.gem_prime_import = drm_gem_prime_import,
151
+
.gem_prime_import = exynos_drm_gem_prime_import,
150
152
.gem_prime_get_sg_table = exynos_drm_gem_prime_get_sg_table,
151
153
.gem_prime_import_sg_table = exynos_drm_gem_prime_import_sg_table,
152
154
.gem_prime_vmap = exynos_drm_gem_prime_vmap,
···
297
299
}
298
300
299
301
return match ?: ERR_PTR(-ENODEV);
302
+
}
303
+
304
+
static struct device *exynos_drm_get_dma_device(void)
305
+
{
306
+
int i;
307
+
308
+
for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
309
+
struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
310
+
struct device *dev;
311
+
312
+
if (!info->driver || !(info->flags & DRM_DMA_DEVICE))
313
+
continue;
314
+
315
+
while ((dev = bus_find_device(&platform_bus_type, NULL,
316
+
&info->driver->driver,
317
+
(void *)platform_bus_type.match))) {
318
+
put_device(dev);
319
+
return dev;
320
+
}
321
+
}
322
+
return NULL;
300
323
}
301
324
302
325
static int exynos_drm_bind(struct device *dev)
···
487
468
.pm = &exynos_drm_pm_ops,
488
469
},
489
470
};
490
-
491
-
static struct device *exynos_drm_get_dma_device(void)
492
-
{
493
-
int i;
494
-
495
-
for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
496
-
struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
497
-
struct device *dev;
498
-
499
-
if (!info->driver || !(info->flags & DRM_DMA_DEVICE))
500
-
continue;
501
-
502
-
while ((dev = bus_find_device(&platform_bus_type, NULL,
503
-
&info->driver->driver,
504
-
(void *)platform_bus_type.match))) {
505
-
put_device(dev);
506
-
return dev;
507
-
}
508
-
}
509
-
return NULL;
510
-
}
511
471
512
472
static void exynos_drm_unregister_devices(void)
513
473
{
-5
drivers/gpu/drm/exynos/exynos_drm_drv.h
-5
drivers/gpu/drm/exynos/exynos_drm_drv.h
···
194
194
/*
195
195
* Exynos drm private structure.
196
196
*
197
-
* @da_start: start address to device address space.
198
-
* with iommu, device address space starts from this address
199
-
* otherwise default one.
200
-
* @da_space_size: size of device address space.
201
-
* if 0 then default value is used for it.
202
197
* @pending: the crtcs that have pending updates to finish
203
198
* @lock: protect access to @pending
204
199
* @wait: wait an atomic commit to finish
+15
drivers/gpu/drm/exynos/exynos_drm_gem.c
+15
drivers/gpu/drm/exynos/exynos_drm_gem.c
···
247
247
if (IS_ERR(exynos_gem))
248
248
return exynos_gem;
249
249
250
+
if (!is_drm_iommu_supported(dev) && (flags & EXYNOS_BO_NONCONTIG)) {
251
+
/*
252
+
* when no IOMMU is available, all allocated buffers are
253
+
* contiguous anyway, so drop EXYNOS_BO_NONCONTIG flag
254
+
*/
255
+
flags &= ~EXYNOS_BO_NONCONTIG;
256
+
DRM_WARN("Non-contiguous allocation is not supported without IOMMU, falling back to contiguous buffer\n");
257
+
}
258
+
250
259
/* set memory type and cache attribute from user side. */
251
260
exynos_gem->flags = flags;
252
261
···
515
506
}
516
507
517
508
/* low-level interface prime helpers */
509
+
struct drm_gem_object *exynos_drm_gem_prime_import(struct drm_device *dev,
510
+
struct dma_buf *dma_buf)
511
+
{
512
+
return drm_gem_prime_import_dev(dev, dma_buf, to_dma_dev(dev));
513
+
}
514
+
518
515
struct sg_table *exynos_drm_gem_prime_get_sg_table(struct drm_gem_object *obj)
519
516
{
520
517
struct exynos_drm_gem *exynos_gem = to_exynos_gem(obj);
+2
drivers/gpu/drm/exynos/exynos_drm_gem.h
+2
drivers/gpu/drm/exynos/exynos_drm_gem.h
···
117
117
int exynos_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
118
118
119
119
/* low-level interface prime helpers */
120
+
struct drm_gem_object *exynos_drm_gem_prime_import(struct drm_device *dev,
121
+
struct dma_buf *dma_buf);
120
122
struct sg_table *exynos_drm_gem_prime_get_sg_table(struct drm_gem_object *obj);
121
123
struct drm_gem_object *
122
124
exynos_drm_gem_prime_import_sg_table(struct drm_device *dev,
+21
drivers/gpu/drm/i915/gvt/cfg_space.c
+21
drivers/gpu/drm/i915/gvt/cfg_space.c
···
208
208
return 0;
209
209
}
210
210
211
+
static int emulate_pci_rom_bar_write(struct intel_vgpu *vgpu,
212
+
unsigned int offset, void *p_data, unsigned int bytes)
213
+
{
214
+
u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset);
215
+
u32 new = *(u32 *)(p_data);
216
+
217
+
if ((new & PCI_ROM_ADDRESS_MASK) == PCI_ROM_ADDRESS_MASK)
218
+
/* We don't have rom, return size of 0. */
219
+
*pval = 0;
220
+
else
221
+
vgpu_pci_cfg_mem_write(vgpu, offset, p_data, bytes);
222
+
return 0;
223
+
}
224
+
211
225
static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset,
212
226
void *p_data, unsigned int bytes)
213
227
{
···
314
300
}
315
301
316
302
switch (rounddown(offset, 4)) {
303
+
case PCI_ROM_ADDRESS:
304
+
if (WARN_ON(!IS_ALIGNED(offset, 4)))
305
+
return -EINVAL;
306
+
return emulate_pci_rom_bar_write(vgpu, offset, p_data, bytes);
307
+
317
308
case PCI_BASE_ADDRESS_0 ... PCI_BASE_ADDRESS_5:
318
309
if (WARN_ON(!IS_ALIGNED(offset, 4)))
319
310
return -EINVAL;
···
394
375
pci_resource_len(gvt->dev_priv->drm.pdev, 0);
395
376
vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size =
396
377
pci_resource_len(gvt->dev_priv->drm.pdev, 2);
378
+
379
+
memset(vgpu_cfg_space(vgpu) + PCI_ROM_ADDRESS, 0, 4);
397
380
}
398
381
399
382
/**
+37
-10
drivers/gpu/drm/i915/gvt/handlers.c
+37
-10
drivers/gpu/drm/i915/gvt/handlers.c
···
137
137
return 0;
138
138
}
139
139
140
-
static int render_mmio_to_ring_id(struct intel_gvt *gvt, unsigned int reg)
140
+
/**
141
+
* intel_gvt_render_mmio_to_ring_id - convert a mmio offset into ring id
142
+
* @gvt: a GVT device
143
+
* @offset: register offset
144
+
*
145
+
* Returns:
146
+
* Ring ID on success, negative error code if failed.
147
+
*/
148
+
int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt,
149
+
unsigned int offset)
141
150
{
142
151
enum intel_engine_id id;
143
152
struct intel_engine_cs *engine;
144
153
145
-
reg &= ~GENMASK(11, 0);
154
+
offset &= ~GENMASK(11, 0);
146
155
for_each_engine(engine, gvt->dev_priv, id) {
147
-
if (engine->mmio_base == reg)
156
+
if (engine->mmio_base == offset)
148
157
return id;
149
158
}
150
-
return -1;
159
+
return -ENODEV;
151
160
}
152
161
153
162
#define offset_to_fence_num(offset) \
···
1407
1398
static int mmio_read_from_hw(struct intel_vgpu *vgpu,
1408
1399
unsigned int offset, void *p_data, unsigned int bytes)
1409
1400
{
1410
-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
1401
+
struct intel_gvt *gvt = vgpu->gvt;
1402
+
struct drm_i915_private *dev_priv = gvt->dev_priv;
1403
+
int ring_id;
1404
+
u32 ring_base;
1411
1405
1412
-
mmio_hw_access_pre(dev_priv);
1413
-
vgpu_vreg(vgpu, offset) = I915_READ(_MMIO(offset));
1414
-
mmio_hw_access_post(dev_priv);
1406
+
ring_id = intel_gvt_render_mmio_to_ring_id(gvt, offset);
1407
+
/**
1408
+
* Read HW reg in following case
1409
+
* a. the offset isn't a ring mmio
1410
+
* b. the offset's ring is running on hw.
1411
+
* c. the offset is ring time stamp mmio
1412
+
*/
1413
+
if (ring_id >= 0)
1414
+
ring_base = dev_priv->engine[ring_id]->mmio_base;
1415
+
1416
+
if (ring_id < 0 || vgpu == gvt->scheduler.engine_owner[ring_id] ||
1417
+
offset == i915_mmio_reg_offset(RING_TIMESTAMP(ring_base)) ||
1418
+
offset == i915_mmio_reg_offset(RING_TIMESTAMP_UDW(ring_base))) {
1419
+
mmio_hw_access_pre(dev_priv);
1420
+
vgpu_vreg(vgpu, offset) = I915_READ(_MMIO(offset));
1421
+
mmio_hw_access_post(dev_priv);
1422
+
}
1423
+
1415
1424
return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes);
1416
1425
}
1417
1426
1418
1427
static int elsp_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
1419
1428
void *p_data, unsigned int bytes)
1420
1429
{
1421
-
int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
1430
+
int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
1422
1431
struct intel_vgpu_execlist *execlist;
1423
1432
u32 data = *(u32 *)p_data;
1424
1433
int ret = 0;
···
1463
1436
void *p_data, unsigned int bytes)
1464
1437
{
1465
1438
u32 data = *(u32 *)p_data;
1466
-
int ring_id = render_mmio_to_ring_id(vgpu->gvt, offset);
1439
+
int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset);
1467
1440
bool enable_execlist;
1468
1441
1469
1442
write_vreg(vgpu, offset, p_data, bytes);
+2
drivers/gpu/drm/i915/gvt/mmio.h
+2
drivers/gpu/drm/i915/gvt/mmio.h
+21
-1
drivers/gpu/drm/i915/gvt/scheduler.c
+21
-1
drivers/gpu/drm/i915/gvt/scheduler.c
···
131
131
return i915_gem_context_force_single_submission(req->ctx);
132
132
}
133
133
134
+
static void save_ring_hw_state(struct intel_vgpu *vgpu, int ring_id)
135
+
{
136
+
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
137
+
u32 ring_base = dev_priv->engine[ring_id]->mmio_base;
138
+
i915_reg_t reg;
139
+
140
+
reg = RING_INSTDONE(ring_base);
141
+
vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
142
+
reg = RING_ACTHD(ring_base);
143
+
vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
144
+
reg = RING_ACTHD_UDW(ring_base);
145
+
vgpu_vreg(vgpu, i915_mmio_reg_offset(reg)) = I915_READ_FW(reg);
146
+
}
147
+
134
148
static int shadow_context_status_change(struct notifier_block *nb,
135
149
unsigned long action, void *data)
136
150
{
···
189
175
atomic_set(&workload->shadow_ctx_active, 1);
190
176
break;
191
177
case INTEL_CONTEXT_SCHEDULE_OUT:
192
-
case INTEL_CONTEXT_SCHEDULE_PREEMPTED:
178
+
save_ring_hw_state(workload->vgpu, ring_id);
193
179
atomic_set(&workload->shadow_ctx_active, 0);
180
+
break;
181
+
case INTEL_CONTEXT_SCHEDULE_PREEMPTED:
182
+
save_ring_hw_state(workload->vgpu, ring_id);
194
183
break;
195
184
default:
196
185
WARN_ON(1);
···
756
739
&vgpu->gvt->dev_priv->drm);
757
740
if (IS_ERR(vgpu->shadow_ctx))
758
741
return PTR_ERR(vgpu->shadow_ctx);
742
+
743
+
if (INTEL_INFO(vgpu->gvt->dev_priv)->has_logical_ring_preemption)
744
+
vgpu->shadow_ctx->priority = INT_MAX;
759
745
760
746
vgpu->shadow_ctx->engine[RCS].initialised = true;
761
747
+16
-15
drivers/gpu/drm/i915/i915_gem.c
+16
-15
drivers/gpu/drm/i915/i915_gem.c
···
4712
4712
* state. Fortunately, the kernel_context is disposable and we do
4713
4713
* not rely on its state.
4714
4714
*/
4715
-
ret = i915_gem_switch_to_kernel_context(dev_priv);
4716
-
if (ret)
4717
-
goto err_unlock;
4715
+
if (!i915_terminally_wedged(&dev_priv->gpu_error)) {
4716
+
ret = i915_gem_switch_to_kernel_context(dev_priv);
4717
+
if (ret)
4718
+
goto err_unlock;
4718
4719
4719
-
ret = i915_gem_wait_for_idle(dev_priv,
4720
-
I915_WAIT_INTERRUPTIBLE |
4721
-
I915_WAIT_LOCKED);
4722
-
if (ret && ret != -EIO)
4723
-
goto err_unlock;
4720
+
ret = i915_gem_wait_for_idle(dev_priv,
4721
+
I915_WAIT_INTERRUPTIBLE |
4722
+
I915_WAIT_LOCKED);
4723
+
if (ret && ret != -EIO)
4724
+
goto err_unlock;
4724
4725
4725
-
assert_kernel_context_is_current(dev_priv);
4726
+
assert_kernel_context_is_current(dev_priv);
4727
+
}
4726
4728
i915_gem_contexts_lost(dev_priv);
4727
4729
mutex_unlock(&dev->struct_mutex);
4728
4730
···
4948
4946
{
4949
4947
int ret;
4950
4948
4951
-
mutex_lock(&dev_priv->drm.struct_mutex);
4952
-
4953
4949
/*
4954
4950
* We need to fallback to 4K pages since gvt gtt handling doesn't
4955
4951
* support huge page entries - we will need to check either hypervisor
···
4967
4967
dev_priv->gt.cleanup_engine = intel_logical_ring_cleanup;
4968
4968
}
4969
4969
4970
+
ret = i915_gem_init_userptr(dev_priv);
4971
+
if (ret)
4972
+
return ret;
4973
+
4970
4974
/* This is just a security blanket to placate dragons.
4971
4975
* On some systems, we very sporadically observe that the first TLBs
4972
4976
* used by the CS may be stale, despite us poking the TLB reset. If
4973
4977
* we hold the forcewake during initialisation these problems
4974
4978
* just magically go away.
4975
4979
*/
4980
+
mutex_lock(&dev_priv->drm.struct_mutex);
4976
4981
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4977
-
4978
-
ret = i915_gem_init_userptr(dev_priv);
4979
-
if (ret)
4980
-
goto out_unlock;
4981
4982
4982
4983
ret = i915_gem_init_ggtt(dev_priv);
4983
4984
if (ret)
-3
drivers/gpu/drm/i915/i915_reg.h
-3
drivers/gpu/drm/i915/i915_reg.h
···
2951
2951
#define ILK_DPFC_CHICKEN _MMIO(0x43224)
2952
2952
#define ILK_DPFC_DISABLE_DUMMY0 (1<<8)
2953
2953
#define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23)
2954
-
#define GLK_SKIP_SEG_EN (1<<12)
2955
-
#define GLK_SKIP_SEG_COUNT_MASK (3<<10)
2956
-
#define GLK_SKIP_SEG_COUNT(x) ((x)<<10)
2957
2954
#define ILK_FBC_RT_BASE _MMIO(0x2128)
2958
2955
#define ILK_FBC_RT_VALID (1<<0)
2959
2956
#define SNB_FBC_FRONT_BUFFER (1<<1)
+1
drivers/gpu/drm/i915/intel_ddi.c
+1
drivers/gpu/drm/i915/intel_ddi.c
···
2131
2131
if (IS_CANNONLAKE(dev_priv)) {
2132
2132
/* Configure DPCLKA_CFGCR0 to map the DPLL to the DDI. */
2133
2133
val = I915_READ(DPCLKA_CFGCR0);
2134
+
val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
2134
2135
val |= DPCLKA_CFGCR0_DDI_CLK_SEL(pll->id, port);
2135
2136
I915_WRITE(DPCLKA_CFGCR0, val);
2136
2137
+35
-16
drivers/gpu/drm/i915/intel_display.c
+35
-16
drivers/gpu/drm/i915/intel_display.c
···
1000
1000
return crtc->config->cpu_transcoder;
1001
1001
}
1002
1002
1003
-
static bool pipe_dsl_stopped(struct drm_i915_private *dev_priv, enum pipe pipe)
1003
+
static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
1004
+
enum pipe pipe)
1004
1005
{
1005
1006
i915_reg_t reg = PIPEDSL(pipe);
1006
1007
u32 line1, line2;
···
1016
1015
msleep(5);
1017
1016
line2 = I915_READ(reg) & line_mask;
1018
1017
1019
-
return line1 == line2;
1018
+
return line1 != line2;
1019
+
}
1020
+
1021
+
static void wait_for_pipe_scanline_moving(struct intel_crtc *crtc, bool state)
1022
+
{
1023
+
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
1024
+
enum pipe pipe = crtc->pipe;
1025
+
1026
+
/* Wait for the display line to settle/start moving */
1027
+
if (wait_for(pipe_scanline_is_moving(dev_priv, pipe) == state, 100))
1028
+
DRM_ERROR("pipe %c scanline %s wait timed out\n",
1029
+
pipe_name(pipe), onoff(state));
1030
+
}
1031
+
1032
+
static void intel_wait_for_pipe_scanline_stopped(struct intel_crtc *crtc)
1033
+
{
1034
+
wait_for_pipe_scanline_moving(crtc, false);
1035
+
}
1036
+
1037
+
static void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc)
1038
+
{
1039
+
wait_for_pipe_scanline_moving(crtc, true);
1020
1040
}
1021
1041
1022
1042
/*
···
1060
1038
{
1061
1039
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
1062
1040
enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
1063
-
enum pipe pipe = crtc->pipe;
1064
1041
1065
1042
if (INTEL_GEN(dev_priv) >= 4) {
1066
1043
i915_reg_t reg = PIPECONF(cpu_transcoder);
···
1070
1049
100))
1071
1050
WARN(1, "pipe_off wait timed out\n");
1072
1051
} else {
1073
-
/* Wait for the display line to settle */
1074
-
if (wait_for(pipe_dsl_stopped(dev_priv, pipe), 100))
1075
-
WARN(1, "pipe_off wait timed out\n");
1052
+
intel_wait_for_pipe_scanline_stopped(crtc);
1076
1053
}
1077
1054
}
1078
1055
···
1955
1936
POSTING_READ(reg);
1956
1937
1957
1938
/*
1958
-
* Until the pipe starts DSL will read as 0, which would cause
1959
-
* an apparent vblank timestamp jump, which messes up also the
1960
-
* frame count when it's derived from the timestamps. So let's
1961
-
* wait for the pipe to start properly before we call
1962
-
* drm_crtc_vblank_on()
1939
+
* Until the pipe starts PIPEDSL reads will return a stale value,
1940
+
* which causes an apparent vblank timestamp jump when PIPEDSL
1941
+
* resets to its proper value. That also messes up the frame count
1942
+
* when it's derived from the timestamps. So let's wait for the
1943
+
* pipe to start properly before we call drm_crtc_vblank_on()
1963
1944
*/
1964
-
if (dev->max_vblank_count == 0 &&
1965
-
wait_for(intel_get_crtc_scanline(crtc) != crtc->scanline_offset, 50))
1966
-
DRM_ERROR("pipe %c didn't start\n", pipe_name(pipe));
1945
+
if (dev->max_vblank_count == 0)
1946
+
intel_wait_for_pipe_scanline_moving(crtc);
1967
1947
}
1968
1948
1969
1949
/**
···
14661
14643
14662
14644
void i830_disable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
14663
14645
{
14646
+
struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
14647
+
14664
14648
DRM_DEBUG_KMS("disabling pipe %c due to force quirk\n",
14665
14649
pipe_name(pipe));
14666
14650
···
14672
14652
I915_WRITE(PIPECONF(pipe), 0);
14673
14653
POSTING_READ(PIPECONF(pipe));
14674
14654
14675
-
if (wait_for(pipe_dsl_stopped(dev_priv, pipe), 100))
14676
-
DRM_ERROR("pipe %c off wait timed out\n", pipe_name(pipe));
14655
+
intel_wait_for_pipe_scanline_stopped(crtc);
14677
14656
14678
14657
I915_WRITE(DPLL(pipe), DPLL_VGA_MODE_DIS);
14679
14658
POSTING_READ(DPLL(pipe));
-13
drivers/gpu/drm/i915/intel_pm.c
-13
drivers/gpu/drm/i915/intel_pm.c
···
124
124
125
125
static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
126
126
{
127
-
u32 val;
128
127
gen9_init_clock_gating(dev_priv);
129
128
130
129
/*
···
143
144
I915_WRITE(CHICKEN_MISC_2, val);
144
145
}
145
146
146
-
/* Display WA #1133: WaFbcSkipSegments:glk */
147
-
val = I915_READ(ILK_DPFC_CHICKEN);
148
-
val &= ~GLK_SKIP_SEG_COUNT_MASK;
149
-
val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
150
-
I915_WRITE(ILK_DPFC_CHICKEN, val);
151
147
}
152
148
153
149
static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
···
8511
8517
8512
8518
static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
8513
8519
{
8514
-
u32 val;
8515
8520
cnp_init_clock_gating(dev_priv);
8516
8521
8517
8522
/* This is not an Wa. Enable for better image quality */
···
8530
8537
I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE,
8531
8538
I915_READ(SLICE_UNIT_LEVEL_CLKGATE) |
8532
8539
SARBUNIT_CLKGATE_DIS);
8533
-
8534
-
/* Display WA #1133: WaFbcSkipSegments:cnl */
8535
-
val = I915_READ(ILK_DPFC_CHICKEN);
8536
-
val &= ~GLK_SKIP_SEG_COUNT_MASK;
8537
-
val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
8538
-
I915_WRITE(ILK_DPFC_CHICKEN, val);
8539
8540
}
8540
8541
8541
8542
static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
+74
-24
drivers/gpu/drm/ttm/ttm_page_alloc.c
+74
-24
drivers/gpu/drm/ttm/ttm_page_alloc.c
···
81
81
char *name;
82
82
unsigned long nfrees;
83
83
unsigned long nrefills;
84
+
unsigned int order;
84
85
};
85
86
86
87
/**
···
223
222
static struct ttm_pool_manager *_manager;
224
223
225
224
#ifndef CONFIG_X86
225
+
static int set_pages_wb(struct page *page, int numpages)
226
+
{
227
+
#if IS_ENABLED(CONFIG_AGP)
228
+
int i;
229
+
230
+
for (i = 0; i < numpages; i++)
231
+
unmap_page_from_agp(page++);
232
+
#endif
233
+
return 0;
234
+
}
235
+
226
236
static int set_pages_array_wb(struct page **pages, int addrinarray)
227
237
{
228
238
#if IS_ENABLED(CONFIG_AGP)
···
296
284
}
297
285
298
286
/* set memory back to wb and free the pages. */
299
-
static void ttm_pages_put(struct page *pages[], unsigned npages)
287
+
static void ttm_pages_put(struct page *pages[], unsigned npages,
288
+
unsigned int order)
300
289
{
301
-
unsigned i;
302
-
if (set_pages_array_wb(pages, npages))
303
-
pr_err("Failed to set %d pages to wb!\n", npages);
304
-
for (i = 0; i < npages; ++i)
305
-
__free_page(pages[i]);
290
+
unsigned int i, pages_nr = (1 << order);
291
+
292
+
if (order == 0) {
293
+
if (set_pages_array_wb(pages, npages))
294
+
pr_err("Failed to set %d pages to wb!\n", npages);
295
+
}
296
+
297
+
for (i = 0; i < npages; ++i) {
298
+
if (order > 0) {
299
+
if (set_pages_wb(pages[i], pages_nr))
300
+
pr_err("Failed to set %d pages to wb!\n", pages_nr);
301
+
}
302
+
__free_pages(pages[i], order);
303
+
}
306
304
}
307
305
308
306
static void ttm_pool_update_free_locked(struct ttm_page_pool *pool,
···
375
353
*/
376
354
spin_unlock_irqrestore(&pool->lock, irq_flags);
377
355
378
-
ttm_pages_put(pages_to_free, freed_pages);
356
+
ttm_pages_put(pages_to_free, freed_pages, pool->order);
379
357
if (likely(nr_free != FREE_ALL_PAGES))
380
358
nr_free -= freed_pages;
381
359
···
410
388
spin_unlock_irqrestore(&pool->lock, irq_flags);
411
389
412
390
if (freed_pages)
413
-
ttm_pages_put(pages_to_free, freed_pages);
391
+
ttm_pages_put(pages_to_free, freed_pages, pool->order);
414
392
out:
415
393
if (pages_to_free != static_buf)
416
394
kfree(pages_to_free);
···
434
412
struct ttm_page_pool *pool;
435
413
int shrink_pages = sc->nr_to_scan;
436
414
unsigned long freed = 0;
415
+
unsigned int nr_free_pool;
437
416
438
417
if (!mutex_trylock(&lock))
439
418
return SHRINK_STOP;
···
442
419
/* select start pool in round robin fashion */
443
420
for (i = 0; i < NUM_POOLS; ++i) {
444
421
unsigned nr_free = shrink_pages;
422
+
unsigned page_nr;
423
+
445
424
if (shrink_pages == 0)
446
425
break;
426
+
447
427
pool = &_manager->pools[(i + pool_offset)%NUM_POOLS];
428
+
page_nr = (1 << pool->order);
448
429
/* OK to use static buffer since global mutex is held. */
449
-
shrink_pages = ttm_page_pool_free(pool, nr_free, true);
450
-
freed += nr_free - shrink_pages;
430
+
nr_free_pool = roundup(nr_free, page_nr) >> pool->order;
431
+
shrink_pages = ttm_page_pool_free(pool, nr_free_pool, true);
432
+
freed += (nr_free_pool - shrink_pages) << pool->order;
433
+
if (freed >= sc->nr_to_scan)
434
+
break;
451
435
}
452
436
mutex_unlock(&lock);
453
437
return freed;
···
466
436
{
467
437
unsigned i;
468
438
unsigned long count = 0;
439
+
struct ttm_page_pool *pool;
469
440
470
-
for (i = 0; i < NUM_POOLS; ++i)
471
-
count += _manager->pools[i].npages;
441
+
for (i = 0; i < NUM_POOLS; ++i) {
442
+
pool = &_manager->pools[i];
443
+
count += (pool->npages << pool->order);
444
+
}
472
445
473
446
return count;
474
447
}
···
543
510
int r = 0;
544
511
unsigned i, j, cpages;
545
512
unsigned npages = 1 << order;
546
-
unsigned max_cpages = min(count,
547
-
(unsigned)(PAGE_SIZE/sizeof(struct page *)));
513
+
unsigned max_cpages = min(count, (unsigned)NUM_PAGES_TO_ALLOC);
548
514
549
515
/* allocate array for page caching change */
550
516
caching_array = kmalloc(max_cpages*sizeof(struct page *), GFP_KERNEL);
···
877
845
#endif
878
846
struct list_head plist;
879
847
struct page *p = NULL;
880
-
unsigned count;
848
+
unsigned count, first;
881
849
int r;
882
850
883
851
/* No pool for cached pages */
···
918
886
}
919
887
#endif
920
888
889
+
first = i;
921
890
while (npages) {
922
891
p = alloc_page(gfp_flags);
923
892
if (!p) {
924
893
pr_debug("Unable to allocate page\n");
925
894
return -ENOMEM;
926
895
}
896
+
897
+
/* Swap the pages if we detect consecutive order */
898
+
if (i > first && pages[i - 1] == p - 1)
899
+
swap(p, pages[i - 1]);
927
900
928
901
pages[i++] = p;
929
902
--npages;
···
958
921
r = ttm_page_pool_get_pages(pool, &plist, flags, cstate,
959
922
npages - count, 0);
960
923
961
-
list_for_each_entry(p, &plist, lru)
962
-
pages[count++] = p;
924
+
first = count;
925
+
list_for_each_entry(p, &plist, lru) {
926
+
struct page *tmp = p;
927
+
928
+
/* Swap the pages if we detect consecutive order */
929
+
if (count > first && pages[count - 1] == tmp - 1)
930
+
swap(tmp, pages[count - 1]);
931
+
pages[count++] = tmp;
932
+
}
963
933
964
934
if (r) {
965
935
/* If there is any pages in the list put them back to
···
981
937
}
982
938
983
939
static void ttm_page_pool_init_locked(struct ttm_page_pool *pool, gfp_t flags,
984
-
char *name)
940
+
char *name, unsigned int order)
985
941
{
986
942
spin_lock_init(&pool->lock);
987
943
pool->fill_lock = false;
···
989
945
pool->npages = pool->nfrees = 0;
990
946
pool->gfp_flags = flags;
991
947
pool->name = name;
948
+
pool->order = order;
992
949
}
993
950
994
951
int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages)
995
952
{
996
953
int ret;
954
+
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
955
+
unsigned order = HPAGE_PMD_ORDER;
956
+
#else
957
+
unsigned order = 0;
958
+
#endif
997
959
998
960
WARN_ON(_manager);
999
961
···
1007
957
1008
958
_manager = kzalloc(sizeof(*_manager), GFP_KERNEL);
1009
959
1010
-
ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc");
960
+
ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc", 0);
1011
961
1012
-
ttm_page_pool_init_locked(&_manager->uc_pool, GFP_HIGHUSER, "uc");
962
+
ttm_page_pool_init_locked(&_manager->uc_pool, GFP_HIGHUSER, "uc", 0);
1013
963
1014
964
ttm_page_pool_init_locked(&_manager->wc_pool_dma32,
1015
-
GFP_USER | GFP_DMA32, "wc dma");
965
+
GFP_USER | GFP_DMA32, "wc dma", 0);
1016
966
1017
967
ttm_page_pool_init_locked(&_manager->uc_pool_dma32,
1018
-
GFP_USER | GFP_DMA32, "uc dma");
968
+
GFP_USER | GFP_DMA32, "uc dma", 0);
1019
969
1020
970
ttm_page_pool_init_locked(&_manager->wc_pool_huge,
1021
971
GFP_TRANSHUGE & ~(__GFP_MOVABLE | __GFP_COMP),
1022
-
"wc huge");
972
+
"wc huge", order);
1023
973
1024
974
ttm_page_pool_init_locked(&_manager->uc_pool_huge,
1025
975
GFP_TRANSHUGE & ~(__GFP_MOVABLE | __GFP_COMP)
1026
-
, "uc huge");
976
+
, "uc huge", order);
1027
977
1028
978
_manager->options.max_size = max_pages;
1029
979
_manager->options.small = SMALL_ALLOCATION;
+2
-1
drivers/gpu/drm/vc4/vc4_bo.c
+2
-1
drivers/gpu/drm/vc4/vc4_bo.c
+8
include/drm/drm_connector.h
+8
include/drm/drm_connector.h
···
916
916
uint8_t num_h_tile, num_v_tile;
917
917
uint8_t tile_h_loc, tile_v_loc;
918
918
uint16_t tile_h_size, tile_v_size;
919
+
920
+
/**
921
+
* @free_work:
922
+
*
923
+
* Work used only by &drm_connector_iter to be able to clean up a
924
+
* connector from any context.
925
+
*/
926
+
struct work_struct free_work;
919
927
};
920
928
921
929
#define obj_to_connector(x) container_of(x, struct drm_connector, base)