Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Add QSPI support for sam9x7 and sama7d65 SoCs
Merge series from Dharma Balasubiramani <dharma.b@microchip.com>:
This patch series adds support for SAM9X7 and sama7d65 QSPI controller
along with the SoC-specific capabilities.
+3250
-1497
+1
Documentation/ABI/testing/sysfs-devices-system-cpu
+1
Documentation/ABI/testing/sysfs-devices-system-cpu
···
586
586
/sys/devices/system/cpu/vulnerabilities/srbds
587
587
/sys/devices/system/cpu/vulnerabilities/tsa
588
588
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
589
+
/sys/devices/system/cpu/vulnerabilities/vmscape
589
590
Date: January 2018
590
591
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
591
592
Description: Information about CPU vulnerabilities
+1
Documentation/admin-guide/hw-vuln/index.rst
+1
Documentation/admin-guide/hw-vuln/index.rst
+110
Documentation/admin-guide/hw-vuln/vmscape.rst
+110
Documentation/admin-guide/hw-vuln/vmscape.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
VMSCAPE
4
+
=======
5
+
6
+
VMSCAPE is a vulnerability that may allow a guest to influence the branch
7
+
prediction in host userspace. It particularly affects hypervisors like QEMU.
8
+
9
+
Even if a hypervisor may not have any sensitive data like disk encryption keys,
10
+
guest-userspace may be able to attack the guest-kernel using the hypervisor as
11
+
a confused deputy.
12
+
13
+
Affected processors
14
+
-------------------
15
+
16
+
The following CPU families are affected by VMSCAPE:
17
+
18
+
**Intel processors:**
19
+
- Skylake generation (Parts without Enhanced-IBRS)
20
+
- Cascade Lake generation - (Parts affected by ITS guest/host separation)
21
+
- Alder Lake and newer (Parts affected by BHI)
22
+
23
+
Note that, BHI affected parts that use BHB clearing software mitigation e.g.
24
+
Icelake are not vulnerable to VMSCAPE.
25
+
26
+
**AMD processors:**
27
+
- Zen series (families 0x17, 0x19, 0x1a)
28
+
29
+
** Hygon processors:**
30
+
- Family 0x18
31
+
32
+
Mitigation
33
+
----------
34
+
35
+
Conditional IBPB
36
+
----------------
37
+
38
+
Kernel tracks when a CPU has run a potentially malicious guest and issues an
39
+
IBPB before the first exit to userspace after VM-exit. If userspace did not run
40
+
between VM-exit and the next VM-entry, no IBPB is issued.
41
+
42
+
Note that the existing userspace mitigation against Spectre-v2 is effective in
43
+
protecting the userspace. They are insufficient to protect the userspace VMMs
44
+
from a malicious guest. This is because Spectre-v2 mitigations are applied at
45
+
context switch time, while the userspace VMM can run after a VM-exit without a
46
+
context switch.
47
+
48
+
Vulnerability enumeration and mitigation is not applied inside a guest. This is
49
+
because nested hypervisors should already be deploying IBPB to isolate
50
+
themselves from nested guests.
51
+
52
+
SMT considerations
53
+
------------------
54
+
55
+
When Simultaneous Multi-Threading (SMT) is enabled, hypervisors can be
56
+
vulnerable to cross-thread attacks. For complete protection against VMSCAPE
57
+
attacks in SMT environments, STIBP should be enabled.
58
+
59
+
The kernel will issue a warning if SMT is enabled without adequate STIBP
60
+
protection. Warning is not issued when:
61
+
62
+
- SMT is disabled
63
+
- STIBP is enabled system-wide
64
+
- Intel eIBRS is enabled (which implies STIBP protection)
65
+
66
+
System information and options
67
+
------------------------------
68
+
69
+
The sysfs file showing VMSCAPE mitigation status is:
70
+
71
+
/sys/devices/system/cpu/vulnerabilities/vmscape
72
+
73
+
The possible values in this file are:
74
+
75
+
* 'Not affected':
76
+
77
+
The processor is not vulnerable to VMSCAPE attacks.
78
+
79
+
* 'Vulnerable':
80
+
81
+
The processor is vulnerable and no mitigation has been applied.
82
+
83
+
* 'Mitigation: IBPB before exit to userspace':
84
+
85
+
Conditional IBPB mitigation is enabled. The kernel tracks when a CPU has
86
+
run a potentially malicious guest and issues an IBPB before the first
87
+
exit to userspace after VM-exit.
88
+
89
+
* 'Mitigation: IBPB on VMEXIT':
90
+
91
+
IBPB is issued on every VM-exit. This occurs when other mitigations like
92
+
RETBLEED or SRSO are already issuing IBPB on VM-exit.
93
+
94
+
Mitigation control on the kernel command line
95
+
----------------------------------------------
96
+
97
+
The mitigation can be controlled via the ``vmscape=`` command line parameter:
98
+
99
+
* ``vmscape=off``:
100
+
101
+
Disable the VMSCAPE mitigation.
102
+
103
+
* ``vmscape=ibpb``:
104
+
105
+
Enable conditional IBPB mitigation (default when CONFIG_MITIGATION_VMSCAPE=y).
106
+
107
+
* ``vmscape=force``:
108
+
109
+
Force vulnerability detection and mitigation even on processors that are
110
+
not known to be affected.
+11
Documentation/admin-guide/kernel-parameters.txt
+11
Documentation/admin-guide/kernel-parameters.txt
···
3829
3829
srbds=off [X86,INTEL]
3830
3830
ssbd=force-off [ARM64]
3831
3831
tsx_async_abort=off [X86]
3832
+
vmscape=off [X86]
3832
3833
3833
3834
Exceptions:
3834
3835
This does not have any effect on
···
8041
8040
8042
8041
vmpoff= [KNL,S390] Perform z/VM CP command after power off.
8043
8042
Format: <command>
8043
+
8044
+
vmscape= [X86] Controls mitigation for VMscape attacks.
8045
+
VMscape attacks can leak information from a userspace
8046
+
hypervisor to a guest via speculative side-channels.
8047
+
8048
+
off - disable the mitigation
8049
+
ibpb - use Indirect Branch Prediction Barrier
8050
+
(IBPB) mitigation (default)
8051
+
force - force vulnerability detection even on
8052
+
unaffected processors
8044
8053
8045
8054
vsyscall= [X86-64,EARLY]
8046
8055
Controls the behavior of vsyscalls (i.e. calls to
+4
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+4
Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml
+21
-8
Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
+21
-8
Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
···
47
47
const: 0
48
48
49
49
clocks:
50
+
minItems: 1
50
51
maxItems: 3
51
-
description: Reference clocks for CP110; MG clock, MG Core clock, AXI clock
52
52
53
53
clock-names:
54
-
items:
55
-
- const: mg_clk
56
-
- const: mg_core_clk
57
-
- const: axi_clk
54
+
minItems: 1
55
+
maxItems: 3
58
56
59
57
marvell,system-controller:
60
58
description: Phandle to the Marvell system controller (CP110 only)
61
59
$ref: /schemas/types.yaml#/definitions/phandle
62
60
63
61
patternProperties:
64
-
'^phy@[0-2]$':
62
+
'^phy@[0-5]$':
65
63
description: A COMPHY lane child node
66
64
type: object
67
65
additionalProperties: false
···
67
69
properties:
68
70
reg:
69
71
description: COMPHY lane number
72
+
maximum: 5
70
73
71
74
'#phy-cells':
72
75
const: 1
76
+
77
+
connector:
78
+
type: object
73
79
74
80
required:
75
81
- reg
···
93
91
94
92
then:
95
93
properties:
96
-
clocks: false
97
-
clock-names: false
94
+
clocks:
95
+
maxItems: 1
96
+
clock-names:
97
+
const: xtal
98
98
99
99
required:
100
100
- reg-names
101
101
102
102
else:
103
+
properties:
104
+
clocks:
105
+
minItems: 3
106
+
clock-names:
107
+
items:
108
+
- const: mg_clk
109
+
- const: mg_core_clk
110
+
- const: axi_clk
111
+
103
112
required:
104
113
- marvell,system-controller
105
114
+2
-2
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+2
-2
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
···
176
176
compatible:
177
177
contains:
178
178
enum:
179
+
- qcom,sa8775p-qmp-gen4x2-pcie-phy
180
+
- qcom,sa8775p-qmp-gen4x4-pcie-phy
179
181
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
180
182
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
181
183
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
···
199
197
contains:
200
198
enum:
201
199
- qcom,qcs8300-qmp-gen4x2-pcie-phy
202
-
- qcom,sa8775p-qmp-gen4x2-pcie-phy
203
-
- qcom,sa8775p-qmp-gen4x4-pcie-phy
204
200
then:
205
201
properties:
206
202
clocks:
+31
-25
Documentation/devicetree/bindings/serial/8250.yaml
+31
-25
Documentation/devicetree/bindings/serial/8250.yaml
···
48
48
oneOf:
49
49
- required: [ clock-frequency ]
50
50
- required: [ clocks ]
51
-
52
51
- if:
53
52
properties:
54
53
compatible:
···
59
60
items:
60
61
- const: uartclk
61
62
- const: reg
62
-
else:
63
+
- if:
64
+
properties:
65
+
compatible:
66
+
contains:
67
+
const: spacemit,k1-uart
68
+
then:
63
69
properties:
64
70
clock-names:
65
71
items:
66
72
- const: core
67
73
- const: bus
74
+
- if:
75
+
properties:
76
+
compatible:
77
+
contains:
78
+
enum:
79
+
- spacemit,k1-uart
80
+
- nxp,lpc1850-uart
81
+
then:
82
+
required:
83
+
- clocks
84
+
- clock-names
85
+
properties:
86
+
clocks:
87
+
minItems: 2
88
+
clock-names:
89
+
minItems: 2
90
+
else:
91
+
properties:
92
+
clocks:
93
+
maxItems: 1
94
+
clock-names:
95
+
maxItems: 1
68
96
69
97
properties:
70
98
compatible:
···
188
162
minItems: 1
189
163
maxItems: 2
190
164
oneOf:
165
+
- enum:
166
+
- main
167
+
- uart
191
168
- items:
192
169
- const: core
193
170
- const: bus
···
292
263
required:
293
264
- reg
294
265
- interrupts
295
-
296
-
if:
297
-
properties:
298
-
compatible:
299
-
contains:
300
-
enum:
301
-
- spacemit,k1-uart
302
-
- nxp,lpc1850-uart
303
-
then:
304
-
required:
305
-
- clocks
306
-
- clock-names
307
-
properties:
308
-
clocks:
309
-
minItems: 2
310
-
clock-names:
311
-
minItems: 2
312
-
else:
313
-
properties:
314
-
clocks:
315
-
maxItems: 1
316
-
clock-names:
317
-
maxItems: 1
318
266
319
267
unevaluatedProperties: false
320
268
+1
-1
Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml
+1
-1
Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml
+3
Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+3
Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+1
-1
Documentation/netlink/specs/mptcp_pm.yaml
+1
-1
Documentation/netlink/specs/mptcp_pm.yaml
+1
-1
Documentation/networking/can.rst
+1
-1
Documentation/networking/can.rst
···
742
742
struct timeval ival1, ival2; /* count and subsequent interval */
743
743
canid_t can_id; /* unique can_id for task */
744
744
__u32 nframes; /* number of can_frames following */
745
-
struct can_frame frames[0];
745
+
struct can_frame frames[];
746
746
};
747
747
748
748
The aligned payload 'frames' uses the same basic CAN frame structure defined
+4
-4
Documentation/networking/mptcp.rst
+4
-4
Documentation/networking/mptcp.rst
···
60
60
and the server side that announces additional addresses via the ``ADD_ADDR`` and
61
61
``REMOVE_ADDR`` options.
62
62
63
-
Path managers are controlled by the ``net.mptcp.pm_type`` sysctl knob -- see
64
-
mptcp-sysctl.rst. There are two types: the in-kernel one (type ``0``) where the
65
-
same rules are applied for all the connections (see: ``ip mptcp``) ; and the
66
-
userspace one (type ``1``), controlled by a userspace daemon (i.e. `mptcpd
63
+
Path managers are controlled by the ``net.mptcp.path_manager`` sysctl knob --
64
+
see mptcp-sysctl.rst. There are two types: the in-kernel one (``kernel``) where
65
+
the same rules are applied for all the connections (see: ``ip mptcp``) ; and the
66
+
userspace one (``userspace``), controlled by a userspace daemon (i.e. `mptcpd
67
67
<https://mptcpd.mptcp.dev/>`_) where different rules can be applied for each
68
68
connection. The path managers can be controlled via a Netlink API; see
69
69
netlink_spec/mptcp_pm.rst.
+15
-13
MAINTAINERS
+15
-13
MAINTAINERS
···
4693
4693
BPF [SELFTESTS] (Test Runners & Infrastructure)
4694
4694
M: Andrii Nakryiko <andrii@kernel.org>
4695
4695
M: Eduard Zingerman <eddyz87@gmail.com>
4696
-
R: Mykola Lysenko <mykolal@fb.com>
4697
4696
L: bpf@vger.kernel.org
4698
4697
S: Maintained
4699
4698
F: tools/testing/selftests/bpf/
···
5268
5269
5269
5270
BTRFS FILE SYSTEM
5270
5271
M: Chris Mason <clm@fb.com>
5271
-
M: Josef Bacik <josef@toxicpanda.com>
5272
5272
M: David Sterba <dsterba@suse.com>
5273
5273
L: linux-btrfs@vger.kernel.org
5274
5274
S: Maintained
···
7248
7250
F: kernel/dma/
7249
7251
7250
7252
DMA MAPPING HELPERS DEVICE DRIVER API [RUST]
7251
-
M: Abdiel Janulgue <abdiel.janulgue@gmail.com>
7252
7253
M: Danilo Krummrich <dakr@kernel.org>
7254
+
R: Abdiel Janulgue <abdiel.janulgue@gmail.com>
7253
7255
R: Daniel Almeida <daniel.almeida@collabora.com>
7254
7256
R: Robin Murphy <robin.murphy@arm.com>
7255
7257
R: Andreas Hindborg <a.hindborg@kernel.org>
7256
7258
L: rust-for-linux@vger.kernel.org
7257
7259
S: Supported
7258
7260
W: https://rust-for-linux.com
7259
-
T: git https://github.com/Rust-for-Linux/linux.git alloc-next
7261
+
T: git git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git
7260
7262
F: rust/helpers/dma.c
7261
7263
F: rust/kernel/dma.rs
7262
7264
F: samples/rust/rust_dma.rs
···
8088
8090
F: Documentation/gpu/
8089
8091
F: drivers/gpu/drm/
8090
8092
F: drivers/gpu/vga/
8091
-
F: rust/kernel/drm/
8092
8093
F: include/drm/drm
8093
8094
F: include/linux/vga*
8094
8095
F: include/uapi/drm/
···
8099
8102
X: drivers/gpu/drm/kmb/
8100
8103
X: drivers/gpu/drm/mediatek/
8101
8104
X: drivers/gpu/drm/msm/
8102
-
X: drivers/gpu/drm/nouveau/
8105
+
X: drivers/gpu/drm/nova/
8103
8106
X: drivers/gpu/drm/radeon/
8104
8107
X: drivers/gpu/drm/tegra/
8105
8108
X: drivers/gpu/drm/xe/
8109
+
8110
+
DRM DRIVERS AND COMMON INFRASTRUCTURE [RUST]
8111
+
M: Danilo Krummrich <dakr@kernel.org>
8112
+
M: Alice Ryhl <aliceryhl@google.com>
8113
+
S: Supported
8114
+
W: https://drm.pages.freedesktop.org/maintainer-tools/drm-rust.html
8115
+
T: git https://gitlab.freedesktop.org/drm/rust/kernel.git
8116
+
F: drivers/gpu/drm/nova/
8117
+
F: drivers/gpu/nova-core/
8118
+
F: rust/kernel/drm/
8106
8119
8107
8120
DRM DRIVERS FOR ALLWINNER A10
8108
8121
M: Maxime Ripard <mripard@kernel.org>
···
15758
15751
W: http://www.melexis.com
15759
15752
F: drivers/iio/temperature/mlx90635.c
15760
15753
15761
-
MELFAS MIP4 TOUCHSCREEN DRIVER
15762
-
M: Sangwon Jee <jeesw@melfas.com>
15763
-
S: Supported
15764
-
W: http://www.melfas.com
15765
-
F: Documentation/devicetree/bindings/input/touchscreen/melfas_mip4.txt
15766
-
F: drivers/input/touchscreen/melfas_mip4.c
15767
-
15768
15754
MELLANOX BLUEFIELD I2C DRIVER
15769
15755
M: Khalil Blaiech <kblaiech@nvidia.com>
15770
15756
M: Asmaa Mnebhi <asmaa@nvidia.com>
···
16138
16138
M: Mike Rapoport <rppt@kernel.org>
16139
16139
L: linux-mm@kvack.org
16140
16140
S: Maintained
16141
+
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock.git
16141
16142
F: include/linux/numa_memblks.h
16142
16143
F: mm/numa.c
16143
16144
F: mm/numa_emulation.c
···
17491
17490
M: Pablo Neira Ayuso <pablo@netfilter.org>
17492
17491
M: Jozsef Kadlecsik <kadlec@netfilter.org>
17493
17492
M: Florian Westphal <fw@strlen.de>
17493
+
R: Phil Sutter <phil@nwl.cc>
17494
17494
L: netfilter-devel@vger.kernel.org
17495
17495
L: coreteam@netfilter.org
17496
17496
S: Maintained
+1
-1
Makefile
+1
-1
Makefile
+1
-1
arch/arm64/kernel/machine_kexec_file.c
+1
-1
arch/arm64/kernel/machine_kexec_file.c
+1
-1
arch/s390/kernel/kexec_elf.c
+1
-1
arch/s390/kernel/kexec_elf.c
+1
-1
arch/s390/kernel/kexec_image.c
+1
-1
arch/s390/kernel/kexec_image.c
+3
-3
arch/s390/kernel/machine_kexec_file.c
+3
-3
arch/s390/kernel/machine_kexec_file.c
···
129
129
static int kexec_file_add_purgatory(struct kimage *image,
130
130
struct s390_load_data *data)
131
131
{
132
-
struct kexec_buf buf;
132
+
struct kexec_buf buf = {};
133
133
int ret;
134
134
135
135
buf.image = image;
···
152
152
static int kexec_file_add_initrd(struct kimage *image,
153
153
struct s390_load_data *data)
154
154
{
155
-
struct kexec_buf buf;
155
+
struct kexec_buf buf = {};
156
156
int ret;
157
157
158
158
buf.image = image;
···
184
184
{
185
185
__u32 *lc_ipl_parmblock_ptr;
186
186
unsigned int len, ncerts;
187
-
struct kexec_buf buf;
187
+
struct kexec_buf buf = {};
188
188
unsigned long addr;
189
189
void *ptr, *end;
190
190
int ret;
+2
-2
arch/s390/kernel/perf_cpum_cf.c
+2
-2
arch/s390/kernel/perf_cpum_cf.c
···
760
760
break;
761
761
762
762
case PERF_TYPE_HARDWARE:
763
-
if (is_sampling_event(event)) /* No sampling support */
764
-
return -ENOENT;
765
763
ev = attr->config;
766
764
if (!attr->exclude_user && attr->exclude_kernel) {
767
765
/*
···
857
859
unsigned int type = event->attr.type;
858
860
int err = -ENOENT;
859
861
862
+
if (is_sampling_event(event)) /* No sampling support */
863
+
return err;
860
864
if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)
861
865
err = __hw_perf_event_init(event, type);
862
866
else if (event->pmu->type == type)
+2
-2
arch/s390/kernel/perf_pai_crypto.c
+2
-2
arch/s390/kernel/perf_pai_crypto.c
···
285
285
/* PAI crypto PMU registered as PERF_TYPE_RAW, check event type */
286
286
if (a->type != PERF_TYPE_RAW && event->pmu->type != a->type)
287
287
return -ENOENT;
288
-
/* PAI crypto event must be in valid range */
288
+
/* PAI crypto event must be in valid range, try others if not */
289
289
if (a->config < PAI_CRYPTO_BASE ||
290
290
a->config > PAI_CRYPTO_BASE + paicrypt_cnt)
291
-
return -EINVAL;
291
+
return -ENOENT;
292
292
/* Allow only CRYPTO_ALL for sampling */
293
293
if (a->sample_period && a->config != PAI_CRYPTO_BASE)
294
294
return -EINVAL;
+1
-1
arch/s390/kernel/perf_pai_ext.c
+1
-1
arch/s390/kernel/perf_pai_ext.c
-2
arch/s390/mm/pgtable.c
-2
arch/s390/mm/pgtable.c
···
335
335
int nodat;
336
336
struct mm_struct *mm = vma->vm_mm;
337
337
338
-
preempt_disable();
339
338
pgste = ptep_xchg_start(mm, addr, ptep);
340
339
nodat = !!(pgste_val(pgste) & _PGSTE_GPS_NODAT);
341
340
old = ptep_flush_lazy(mm, addr, ptep, nodat);
···
359
360
} else {
360
361
set_pte(ptep, pte);
361
362
}
362
-
preempt_enable();
363
363
}
364
364
365
365
static inline void pmdp_idte_local(struct mm_struct *mm,
+9
arch/x86/Kconfig
+9
arch/x86/Kconfig
···
2701
2701
security vulnerability on AMD CPUs which can lead to forwarding of
2702
2702
invalid info to subsequent instructions and thus can affect their
2703
2703
timing and thereby cause a leakage.
2704
+
2705
+
config MITIGATION_VMSCAPE
2706
+
bool "Mitigate VMSCAPE"
2707
+
depends on KVM
2708
+
default y
2709
+
help
2710
+
Enable mitigation for VMSCAPE attacks. VMSCAPE is a hardware security
2711
+
vulnerability on Intel and AMD CPUs that may allow a guest to do
2712
+
Spectre v2 style attacks on userspace hypervisor.
2704
2713
endif
2705
2714
2706
2715
config ARCH_HAS_ADD_PAGES
+2
arch/x86/include/asm/cpufeatures.h
+2
arch/x86/include/asm/cpufeatures.h
···
495
495
#define X86_FEATURE_TSA_SQ_NO (21*32+11) /* AMD CPU not vulnerable to TSA-SQ */
496
496
#define X86_FEATURE_TSA_L1_NO (21*32+12) /* AMD CPU not vulnerable to TSA-L1 */
497
497
#define X86_FEATURE_CLEAR_CPU_BUF_VM (21*32+13) /* Clear CPU buffers using VERW before VMRUN */
498
+
#define X86_FEATURE_IBPB_EXIT_TO_USER (21*32+14) /* Use IBPB on exit-to-userspace, see VMSCAPE bug */
498
499
499
500
/*
500
501
* BUG word(s)
···
552
551
#define X86_BUG_ITS X86_BUG( 1*32+ 7) /* "its" CPU is affected by Indirect Target Selection */
553
552
#define X86_BUG_ITS_NATIVE_ONLY X86_BUG( 1*32+ 8) /* "its_native_only" CPU is affected by ITS, VMX is not affected */
554
553
#define X86_BUG_TSA X86_BUG( 1*32+ 9) /* "tsa" CPU is affected by Transient Scheduler Attacks */
554
+
#define X86_BUG_VMSCAPE X86_BUG( 1*32+10) /* "vmscape" CPU is affected by VMSCAPE attacks from guests */
555
555
#endif /* _ASM_X86_CPUFEATURES_H */
+7
arch/x86/include/asm/entry-common.h
+7
arch/x86/include/asm/entry-common.h
···
93
93
* 8 (ia32) bits.
94
94
*/
95
95
choose_random_kstack_offset(rdtsc());
96
+
97
+
/* Avoid unnecessary reads of 'x86_ibpb_exit_to_user' */
98
+
if (cpu_feature_enabled(X86_FEATURE_IBPB_EXIT_TO_USER) &&
99
+
this_cpu_read(x86_ibpb_exit_to_user)) {
100
+
indirect_branch_prediction_barrier();
101
+
this_cpu_write(x86_ibpb_exit_to_user, false);
102
+
}
96
103
}
97
104
#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare
98
105
+2
arch/x86/include/asm/nospec-branch.h
+2
arch/x86/include/asm/nospec-branch.h
+203
-82
arch/x86/kernel/cpu/bugs.c
+203
-82
arch/x86/kernel/cpu/bugs.c
···
96
96
static void __init its_apply_mitigation(void);
97
97
static void __init tsa_select_mitigation(void);
98
98
static void __init tsa_apply_mitigation(void);
99
+
static void __init vmscape_select_mitigation(void);
100
+
static void __init vmscape_update_mitigation(void);
101
+
static void __init vmscape_apply_mitigation(void);
99
102
100
103
/* The base value of the SPEC_CTRL MSR without task-specific bits set */
101
104
u64 x86_spec_ctrl_base;
···
107
104
/* The current value of the SPEC_CTRL MSR with task-specific bits set */
108
105
DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
109
106
EXPORT_PER_CPU_SYMBOL_GPL(x86_spec_ctrl_current);
107
+
108
+
/*
109
+
* Set when the CPU has run a potentially malicious guest. An IBPB will
110
+
* be needed to before running userspace. That IBPB will flush the branch
111
+
* predictor content.
112
+
*/
113
+
DEFINE_PER_CPU(bool, x86_ibpb_exit_to_user);
114
+
EXPORT_PER_CPU_SYMBOL_GPL(x86_ibpb_exit_to_user);
110
115
111
116
u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB;
112
117
···
273
262
its_select_mitigation();
274
263
bhi_select_mitigation();
275
264
tsa_select_mitigation();
265
+
vmscape_select_mitigation();
276
266
277
267
/*
278
268
* After mitigations are selected, some may need to update their
···
305
293
bhi_update_mitigation();
306
294
/* srso_update_mitigation() depends on retbleed_update_mitigation(). */
307
295
srso_update_mitigation();
296
+
vmscape_update_mitigation();
308
297
309
298
spectre_v1_apply_mitigation();
310
299
spectre_v2_apply_mitigation();
···
323
310
its_apply_mitigation();
324
311
bhi_apply_mitigation();
325
312
tsa_apply_mitigation();
313
+
vmscape_apply_mitigation();
326
314
}
327
315
328
316
/*
···
2552
2538
}
2553
2539
}
2554
2540
2555
-
#define MDS_MSG_SMT "MDS CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/mds.html for more details.\n"
2556
-
#define TAA_MSG_SMT "TAA CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html for more details.\n"
2557
-
#define MMIO_MSG_SMT "MMIO Stale Data CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/processor_mmio_stale_data.html for more details.\n"
2558
-
2559
-
void cpu_bugs_smt_update(void)
2560
-
{
2561
-
mutex_lock(&spec_ctrl_mutex);
2562
-
2563
-
if (sched_smt_active() && unprivileged_ebpf_enabled() &&
2564
-
spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE)
2565
-
pr_warn_once(SPECTRE_V2_EIBRS_LFENCE_EBPF_SMT_MSG);
2566
-
2567
-
switch (spectre_v2_user_stibp) {
2568
-
case SPECTRE_V2_USER_NONE:
2569
-
break;
2570
-
case SPECTRE_V2_USER_STRICT:
2571
-
case SPECTRE_V2_USER_STRICT_PREFERRED:
2572
-
update_stibp_strict();
2573
-
break;
2574
-
case SPECTRE_V2_USER_PRCTL:
2575
-
case SPECTRE_V2_USER_SECCOMP:
2576
-
update_indir_branch_cond();
2577
-
break;
2578
-
}
2579
-
2580
-
switch (mds_mitigation) {
2581
-
case MDS_MITIGATION_FULL:
2582
-
case MDS_MITIGATION_AUTO:
2583
-
case MDS_MITIGATION_VMWERV:
2584
-
if (sched_smt_active() && !boot_cpu_has(X86_BUG_MSBDS_ONLY))
2585
-
pr_warn_once(MDS_MSG_SMT);
2586
-
update_mds_branch_idle();
2587
-
break;
2588
-
case MDS_MITIGATION_OFF:
2589
-
break;
2590
-
}
2591
-
2592
-
switch (taa_mitigation) {
2593
-
case TAA_MITIGATION_VERW:
2594
-
case TAA_MITIGATION_AUTO:
2595
-
case TAA_MITIGATION_UCODE_NEEDED:
2596
-
if (sched_smt_active())
2597
-
pr_warn_once(TAA_MSG_SMT);
2598
-
break;
2599
-
case TAA_MITIGATION_TSX_DISABLED:
2600
-
case TAA_MITIGATION_OFF:
2601
-
break;
2602
-
}
2603
-
2604
-
switch (mmio_mitigation) {
2605
-
case MMIO_MITIGATION_VERW:
2606
-
case MMIO_MITIGATION_AUTO:
2607
-
case MMIO_MITIGATION_UCODE_NEEDED:
2608
-
if (sched_smt_active())
2609
-
pr_warn_once(MMIO_MSG_SMT);
2610
-
break;
2611
-
case MMIO_MITIGATION_OFF:
2612
-
break;
2613
-
}
2614
-
2615
-
switch (tsa_mitigation) {
2616
-
case TSA_MITIGATION_USER_KERNEL:
2617
-
case TSA_MITIGATION_VM:
2618
-
case TSA_MITIGATION_AUTO:
2619
-
case TSA_MITIGATION_FULL:
2620
-
/*
2621
-
* TSA-SQ can potentially lead to info leakage between
2622
-
* SMT threads.
2623
-
*/
2624
-
if (sched_smt_active())
2625
-
static_branch_enable(&cpu_buf_idle_clear);
2626
-
else
2627
-
static_branch_disable(&cpu_buf_idle_clear);
2628
-
break;
2629
-
case TSA_MITIGATION_NONE:
2630
-
case TSA_MITIGATION_UCODE_NEEDED:
2631
-
break;
2632
-
}
2633
-
2634
-
mutex_unlock(&spec_ctrl_mutex);
2635
-
}
2636
-
2637
2541
#undef pr_fmt
2638
2542
#define pr_fmt(fmt) "Speculative Store Bypass: " fmt
2639
2543
···
3263
3331
}
3264
3332
3265
3333
#undef pr_fmt
3334
+
#define pr_fmt(fmt) "VMSCAPE: " fmt
3335
+
3336
+
enum vmscape_mitigations {
3337
+
VMSCAPE_MITIGATION_NONE,
3338
+
VMSCAPE_MITIGATION_AUTO,
3339
+
VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER,
3340
+
VMSCAPE_MITIGATION_IBPB_ON_VMEXIT,
3341
+
};
3342
+
3343
+
static const char * const vmscape_strings[] = {
3344
+
[VMSCAPE_MITIGATION_NONE] = "Vulnerable",
3345
+
/* [VMSCAPE_MITIGATION_AUTO] */
3346
+
[VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER] = "Mitigation: IBPB before exit to userspace",
3347
+
[VMSCAPE_MITIGATION_IBPB_ON_VMEXIT] = "Mitigation: IBPB on VMEXIT",
3348
+
};
3349
+
3350
+
static enum vmscape_mitigations vmscape_mitigation __ro_after_init =
3351
+
IS_ENABLED(CONFIG_MITIGATION_VMSCAPE) ? VMSCAPE_MITIGATION_AUTO : VMSCAPE_MITIGATION_NONE;
3352
+
3353
+
static int __init vmscape_parse_cmdline(char *str)
3354
+
{
3355
+
if (!str)
3356
+
return -EINVAL;
3357
+
3358
+
if (!strcmp(str, "off")) {
3359
+
vmscape_mitigation = VMSCAPE_MITIGATION_NONE;
3360
+
} else if (!strcmp(str, "ibpb")) {
3361
+
vmscape_mitigation = VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER;
3362
+
} else if (!strcmp(str, "force")) {
3363
+
setup_force_cpu_bug(X86_BUG_VMSCAPE);
3364
+
vmscape_mitigation = VMSCAPE_MITIGATION_AUTO;
3365
+
} else {
3366
+
pr_err("Ignoring unknown vmscape=%s option.\n", str);
3367
+
}
3368
+
3369
+
return 0;
3370
+
}
3371
+
early_param("vmscape", vmscape_parse_cmdline);
3372
+
3373
+
static void __init vmscape_select_mitigation(void)
3374
+
{
3375
+
if (cpu_mitigations_off() ||
3376
+
!boot_cpu_has_bug(X86_BUG_VMSCAPE) ||
3377
+
!boot_cpu_has(X86_FEATURE_IBPB)) {
3378
+
vmscape_mitigation = VMSCAPE_MITIGATION_NONE;
3379
+
return;
3380
+
}
3381
+
3382
+
if (vmscape_mitigation == VMSCAPE_MITIGATION_AUTO)
3383
+
vmscape_mitigation = VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER;
3384
+
}
3385
+
3386
+
static void __init vmscape_update_mitigation(void)
3387
+
{
3388
+
if (!boot_cpu_has_bug(X86_BUG_VMSCAPE))
3389
+
return;
3390
+
3391
+
if (retbleed_mitigation == RETBLEED_MITIGATION_IBPB ||
3392
+
srso_mitigation == SRSO_MITIGATION_IBPB_ON_VMEXIT)
3393
+
vmscape_mitigation = VMSCAPE_MITIGATION_IBPB_ON_VMEXIT;
3394
+
3395
+
pr_info("%s\n", vmscape_strings[vmscape_mitigation]);
3396
+
}
3397
+
3398
+
static void __init vmscape_apply_mitigation(void)
3399
+
{
3400
+
if (vmscape_mitigation == VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER)
3401
+
setup_force_cpu_cap(X86_FEATURE_IBPB_EXIT_TO_USER);
3402
+
}
3403
+
3404
+
#undef pr_fmt
3266
3405
#define pr_fmt(fmt) fmt
3406
+
3407
+
#define MDS_MSG_SMT "MDS CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/mds.html for more details.\n"
3408
+
#define TAA_MSG_SMT "TAA CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html for more details.\n"
3409
+
#define MMIO_MSG_SMT "MMIO Stale Data CPU bug present and SMT on, data leak possible. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/processor_mmio_stale_data.html for more details.\n"
3410
+
#define VMSCAPE_MSG_SMT "VMSCAPE: SMT on, STIBP is required for full protection. See https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/vmscape.html for more details.\n"
3411
+
3412
+
void cpu_bugs_smt_update(void)
3413
+
{
3414
+
mutex_lock(&spec_ctrl_mutex);
3415
+
3416
+
if (sched_smt_active() && unprivileged_ebpf_enabled() &&
3417
+
spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE)
3418
+
pr_warn_once(SPECTRE_V2_EIBRS_LFENCE_EBPF_SMT_MSG);
3419
+
3420
+
switch (spectre_v2_user_stibp) {
3421
+
case SPECTRE_V2_USER_NONE:
3422
+
break;
3423
+
case SPECTRE_V2_USER_STRICT:
3424
+
case SPECTRE_V2_USER_STRICT_PREFERRED:
3425
+
update_stibp_strict();
3426
+
break;
3427
+
case SPECTRE_V2_USER_PRCTL:
3428
+
case SPECTRE_V2_USER_SECCOMP:
3429
+
update_indir_branch_cond();
3430
+
break;
3431
+
}
3432
+
3433
+
switch (mds_mitigation) {
3434
+
case MDS_MITIGATION_FULL:
3435
+
case MDS_MITIGATION_AUTO:
3436
+
case MDS_MITIGATION_VMWERV:
3437
+
if (sched_smt_active() && !boot_cpu_has(X86_BUG_MSBDS_ONLY))
3438
+
pr_warn_once(MDS_MSG_SMT);
3439
+
update_mds_branch_idle();
3440
+
break;
3441
+
case MDS_MITIGATION_OFF:
3442
+
break;
3443
+
}
3444
+
3445
+
switch (taa_mitigation) {
3446
+
case TAA_MITIGATION_VERW:
3447
+
case TAA_MITIGATION_AUTO:
3448
+
case TAA_MITIGATION_UCODE_NEEDED:
3449
+
if (sched_smt_active())
3450
+
pr_warn_once(TAA_MSG_SMT);
3451
+
break;
3452
+
case TAA_MITIGATION_TSX_DISABLED:
3453
+
case TAA_MITIGATION_OFF:
3454
+
break;
3455
+
}
3456
+
3457
+
switch (mmio_mitigation) {
3458
+
case MMIO_MITIGATION_VERW:
3459
+
case MMIO_MITIGATION_AUTO:
3460
+
case MMIO_MITIGATION_UCODE_NEEDED:
3461
+
if (sched_smt_active())
3462
+
pr_warn_once(MMIO_MSG_SMT);
3463
+
break;
3464
+
case MMIO_MITIGATION_OFF:
3465
+
break;
3466
+
}
3467
+
3468
+
switch (tsa_mitigation) {
3469
+
case TSA_MITIGATION_USER_KERNEL:
3470
+
case TSA_MITIGATION_VM:
3471
+
case TSA_MITIGATION_AUTO:
3472
+
case TSA_MITIGATION_FULL:
3473
+
/*
3474
+
* TSA-SQ can potentially lead to info leakage between
3475
+
* SMT threads.
3476
+
*/
3477
+
if (sched_smt_active())
3478
+
static_branch_enable(&cpu_buf_idle_clear);
3479
+
else
3480
+
static_branch_disable(&cpu_buf_idle_clear);
3481
+
break;
3482
+
case TSA_MITIGATION_NONE:
3483
+
case TSA_MITIGATION_UCODE_NEEDED:
3484
+
break;
3485
+
}
3486
+
3487
+
switch (vmscape_mitigation) {
3488
+
case VMSCAPE_MITIGATION_NONE:
3489
+
case VMSCAPE_MITIGATION_AUTO:
3490
+
break;
3491
+
case VMSCAPE_MITIGATION_IBPB_ON_VMEXIT:
3492
+
case VMSCAPE_MITIGATION_IBPB_EXIT_TO_USER:
3493
+
/*
3494
+
* Hypervisors can be attacked across-threads, warn for SMT when
3495
+
* STIBP is not already enabled system-wide.
3496
+
*
3497
+
* Intel eIBRS (!AUTOIBRS) implies STIBP on.
3498
+
*/
3499
+
if (!sched_smt_active() ||
3500
+
spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT ||
3501
+
spectre_v2_user_stibp == SPECTRE_V2_USER_STRICT_PREFERRED ||
3502
+
(spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
3503
+
!boot_cpu_has(X86_FEATURE_AUTOIBRS)))
3504
+
break;
3505
+
pr_warn_once(VMSCAPE_MSG_SMT);
3506
+
break;
3507
+
}
3508
+
3509
+
mutex_unlock(&spec_ctrl_mutex);
3510
+
}
3267
3511
3268
3512
#ifdef CONFIG_SYSFS
3269
3513
···
3686
3578
return sysfs_emit(buf, "%s\n", tsa_strings[tsa_mitigation]);
3687
3579
}
3688
3580
3581
+
static ssize_t vmscape_show_state(char *buf)
3582
+
{
3583
+
return sysfs_emit(buf, "%s\n", vmscape_strings[vmscape_mitigation]);
3584
+
}
3585
+
3689
3586
static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
3690
3587
char *buf, unsigned int bug)
3691
3588
{
···
3756
3643
3757
3644
case X86_BUG_TSA:
3758
3645
return tsa_show_state(buf);
3646
+
3647
+
case X86_BUG_VMSCAPE:
3648
+
return vmscape_show_state(buf);
3759
3649
3760
3650
default:
3761
3651
break;
···
3850
3734
ssize_t cpu_show_tsa(struct device *dev, struct device_attribute *attr, char *buf)
3851
3735
{
3852
3736
return cpu_show_common(dev, attr, buf, X86_BUG_TSA);
3737
+
}
3738
+
3739
+
ssize_t cpu_show_vmscape(struct device *dev, struct device_attribute *attr, char *buf)
3740
+
{
3741
+
return cpu_show_common(dev, attr, buf, X86_BUG_VMSCAPE);
3853
3742
}
3854
3743
#endif
3855
3744
+55
-31
arch/x86/kernel/cpu/common.c
+55
-31
arch/x86/kernel/cpu/common.c
···
1236
1236
#define ITS_NATIVE_ONLY BIT(9)
1237
1237
/* CPU is affected by Transient Scheduler Attacks */
1238
1238
#define TSA BIT(10)
1239
+
/* CPU is affected by VMSCAPE */
1240
+
#define VMSCAPE BIT(11)
1239
1241
1240
1242
static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
1241
-
VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE, X86_STEP_MAX, SRBDS),
1242
-
VULNBL_INTEL_STEPS(INTEL_HASWELL, X86_STEP_MAX, SRBDS),
1243
-
VULNBL_INTEL_STEPS(INTEL_HASWELL_L, X86_STEP_MAX, SRBDS),
1244
-
VULNBL_INTEL_STEPS(INTEL_HASWELL_G, X86_STEP_MAX, SRBDS),
1245
-
VULNBL_INTEL_STEPS(INTEL_HASWELL_X, X86_STEP_MAX, MMIO),
1246
-
VULNBL_INTEL_STEPS(INTEL_BROADWELL_D, X86_STEP_MAX, MMIO),
1247
-
VULNBL_INTEL_STEPS(INTEL_BROADWELL_G, X86_STEP_MAX, SRBDS),
1248
-
VULNBL_INTEL_STEPS(INTEL_BROADWELL_X, X86_STEP_MAX, MMIO),
1249
-
VULNBL_INTEL_STEPS(INTEL_BROADWELL, X86_STEP_MAX, SRBDS),
1250
-
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X, 0x5, MMIO | RETBLEED | GDS),
1251
-
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X, X86_STEP_MAX, MMIO | RETBLEED | GDS | ITS),
1252
-
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_L, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS),
1253
-
VULNBL_INTEL_STEPS(INTEL_SKYLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS),
1254
-
VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L, 0xb, MMIO | RETBLEED | GDS | SRBDS),
1255
-
VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS),
1256
-
VULNBL_INTEL_STEPS(INTEL_KABYLAKE, 0xc, MMIO | RETBLEED | GDS | SRBDS),
1257
-
VULNBL_INTEL_STEPS(INTEL_KABYLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS),
1258
-
VULNBL_INTEL_STEPS(INTEL_CANNONLAKE_L, X86_STEP_MAX, RETBLEED),
1243
+
VULNBL_INTEL_STEPS(INTEL_SANDYBRIDGE_X, X86_STEP_MAX, VMSCAPE),
1244
+
VULNBL_INTEL_STEPS(INTEL_SANDYBRIDGE, X86_STEP_MAX, VMSCAPE),
1245
+
VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE_X, X86_STEP_MAX, VMSCAPE),
1246
+
VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE, X86_STEP_MAX, SRBDS | VMSCAPE),
1247
+
VULNBL_INTEL_STEPS(INTEL_HASWELL, X86_STEP_MAX, SRBDS | VMSCAPE),
1248
+
VULNBL_INTEL_STEPS(INTEL_HASWELL_L, X86_STEP_MAX, SRBDS | VMSCAPE),
1249
+
VULNBL_INTEL_STEPS(INTEL_HASWELL_G, X86_STEP_MAX, SRBDS | VMSCAPE),
1250
+
VULNBL_INTEL_STEPS(INTEL_HASWELL_X, X86_STEP_MAX, MMIO | VMSCAPE),
1251
+
VULNBL_INTEL_STEPS(INTEL_BROADWELL_D, X86_STEP_MAX, MMIO | VMSCAPE),
1252
+
VULNBL_INTEL_STEPS(INTEL_BROADWELL_X, X86_STEP_MAX, MMIO | VMSCAPE),
1253
+
VULNBL_INTEL_STEPS(INTEL_BROADWELL_G, X86_STEP_MAX, SRBDS | VMSCAPE),
1254
+
VULNBL_INTEL_STEPS(INTEL_BROADWELL, X86_STEP_MAX, SRBDS | VMSCAPE),
1255
+
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X, 0x5, MMIO | RETBLEED | GDS | VMSCAPE),
1256
+
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X, X86_STEP_MAX, MMIO | RETBLEED | GDS | ITS | VMSCAPE),
1257
+
VULNBL_INTEL_STEPS(INTEL_SKYLAKE_L, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | VMSCAPE),
1258
+
VULNBL_INTEL_STEPS(INTEL_SKYLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | VMSCAPE),
1259
+
VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L, 0xb, MMIO | RETBLEED | GDS | SRBDS | VMSCAPE),
1260
+
VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS | VMSCAPE),
1261
+
VULNBL_INTEL_STEPS(INTEL_KABYLAKE, 0xc, MMIO | RETBLEED | GDS | SRBDS | VMSCAPE),
1262
+
VULNBL_INTEL_STEPS(INTEL_KABYLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | SRBDS | ITS | VMSCAPE),
1263
+
VULNBL_INTEL_STEPS(INTEL_CANNONLAKE_L, X86_STEP_MAX, RETBLEED | VMSCAPE),
1259
1264
VULNBL_INTEL_STEPS(INTEL_ICELAKE_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | ITS_NATIVE_ONLY),
1260
1265
VULNBL_INTEL_STEPS(INTEL_ICELAKE_D, X86_STEP_MAX, MMIO | GDS | ITS | ITS_NATIVE_ONLY),
1261
1266
VULNBL_INTEL_STEPS(INTEL_ICELAKE_X, X86_STEP_MAX, MMIO | GDS | ITS | ITS_NATIVE_ONLY),
1262
-
VULNBL_INTEL_STEPS(INTEL_COMETLAKE, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS),
1263
-
VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, 0x0, MMIO | RETBLEED | ITS),
1264
-
VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS),
1267
+
VULNBL_INTEL_STEPS(INTEL_COMETLAKE, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | VMSCAPE),
1268
+
VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, 0x0, MMIO | RETBLEED | ITS | VMSCAPE),
1269
+
VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | VMSCAPE),
1265
1270
VULNBL_INTEL_STEPS(INTEL_TIGERLAKE_L, X86_STEP_MAX, GDS | ITS | ITS_NATIVE_ONLY),
1266
1271
VULNBL_INTEL_STEPS(INTEL_TIGERLAKE, X86_STEP_MAX, GDS | ITS | ITS_NATIVE_ONLY),
1267
1272
VULNBL_INTEL_STEPS(INTEL_LAKEFIELD, X86_STEP_MAX, MMIO | MMIO_SBDS | RETBLEED),
1268
1273
VULNBL_INTEL_STEPS(INTEL_ROCKETLAKE, X86_STEP_MAX, MMIO | RETBLEED | GDS | ITS | ITS_NATIVE_ONLY),
1269
-
VULNBL_INTEL_TYPE(INTEL_ALDERLAKE, ATOM, RFDS),
1270
-
VULNBL_INTEL_STEPS(INTEL_ALDERLAKE_L, X86_STEP_MAX, RFDS),
1271
-
VULNBL_INTEL_TYPE(INTEL_RAPTORLAKE, ATOM, RFDS),
1272
-
VULNBL_INTEL_STEPS(INTEL_RAPTORLAKE_P, X86_STEP_MAX, RFDS),
1273
-
VULNBL_INTEL_STEPS(INTEL_RAPTORLAKE_S, X86_STEP_MAX, RFDS),
1274
-
VULNBL_INTEL_STEPS(INTEL_ATOM_GRACEMONT, X86_STEP_MAX, RFDS),
1274
+
VULNBL_INTEL_TYPE(INTEL_ALDERLAKE, ATOM, RFDS | VMSCAPE),
1275
+
VULNBL_INTEL_STEPS(INTEL_ALDERLAKE, X86_STEP_MAX, VMSCAPE),
1276
+
VULNBL_INTEL_STEPS(INTEL_ALDERLAKE_L, X86_STEP_MAX, RFDS | VMSCAPE),
1277
+
VULNBL_INTEL_TYPE(INTEL_RAPTORLAKE, ATOM, RFDS | VMSCAPE),
1278
+
VULNBL_INTEL_STEPS(INTEL_RAPTORLAKE, X86_STEP_MAX, VMSCAPE),
1279
+
VULNBL_INTEL_STEPS(INTEL_RAPTORLAKE_P, X86_STEP_MAX, RFDS | VMSCAPE),
1280
+
VULNBL_INTEL_STEPS(INTEL_RAPTORLAKE_S, X86_STEP_MAX, RFDS | VMSCAPE),
1281
+
VULNBL_INTEL_STEPS(INTEL_METEORLAKE_L, X86_STEP_MAX, VMSCAPE),
1282
+
VULNBL_INTEL_STEPS(INTEL_ARROWLAKE_H, X86_STEP_MAX, VMSCAPE),
1283
+
VULNBL_INTEL_STEPS(INTEL_ARROWLAKE, X86_STEP_MAX, VMSCAPE),
1284
+
VULNBL_INTEL_STEPS(INTEL_ARROWLAKE_U, X86_STEP_MAX, VMSCAPE),
1285
+
VULNBL_INTEL_STEPS(INTEL_LUNARLAKE_M, X86_STEP_MAX, VMSCAPE),
1286
+
VULNBL_INTEL_STEPS(INTEL_SAPPHIRERAPIDS_X, X86_STEP_MAX, VMSCAPE),
1287
+
VULNBL_INTEL_STEPS(INTEL_GRANITERAPIDS_X, X86_STEP_MAX, VMSCAPE),
1288
+
VULNBL_INTEL_STEPS(INTEL_EMERALDRAPIDS_X, X86_STEP_MAX, VMSCAPE),
1289
+
VULNBL_INTEL_STEPS(INTEL_ATOM_GRACEMONT, X86_STEP_MAX, RFDS | VMSCAPE),
1275
1290
VULNBL_INTEL_STEPS(INTEL_ATOM_TREMONT, X86_STEP_MAX, MMIO | MMIO_SBDS | RFDS),
1276
1291
VULNBL_INTEL_STEPS(INTEL_ATOM_TREMONT_D, X86_STEP_MAX, MMIO | RFDS),
1277
1292
VULNBL_INTEL_STEPS(INTEL_ATOM_TREMONT_L, X86_STEP_MAX, MMIO | MMIO_SBDS | RFDS),
1278
1293
VULNBL_INTEL_STEPS(INTEL_ATOM_GOLDMONT, X86_STEP_MAX, RFDS),
1279
1294
VULNBL_INTEL_STEPS(INTEL_ATOM_GOLDMONT_D, X86_STEP_MAX, RFDS),
1280
1295
VULNBL_INTEL_STEPS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEP_MAX, RFDS),
1296
+
VULNBL_INTEL_STEPS(INTEL_ATOM_CRESTMONT_X, X86_STEP_MAX, VMSCAPE),
1281
1297
1282
1298
VULNBL_AMD(0x15, RETBLEED),
1283
1299
VULNBL_AMD(0x16, RETBLEED),
1284
-
VULNBL_AMD(0x17, RETBLEED | SMT_RSB | SRSO),
1285
-
VULNBL_HYGON(0x18, RETBLEED | SMT_RSB | SRSO),
1286
-
VULNBL_AMD(0x19, SRSO | TSA),
1287
-
VULNBL_AMD(0x1a, SRSO),
1300
+
VULNBL_AMD(0x17, RETBLEED | SMT_RSB | SRSO | VMSCAPE),
1301
+
VULNBL_HYGON(0x18, RETBLEED | SMT_RSB | SRSO | VMSCAPE),
1302
+
VULNBL_AMD(0x19, SRSO | TSA | VMSCAPE),
1303
+
VULNBL_AMD(0x1a, SRSO | VMSCAPE),
1288
1304
{}
1289
1305
};
1290
1306
···
1558
1542
setup_force_cpu_bug(X86_BUG_TSA);
1559
1543
}
1560
1544
}
1545
+
1546
+
/*
1547
+
* Set the bug only on bare-metal. A nested hypervisor should already be
1548
+
* deploying IBPB to isolate itself from nested guests.
1549
+
*/
1550
+
if (cpu_matches(cpu_vuln_blacklist, VMSCAPE) &&
1551
+
!boot_cpu_has(X86_FEATURE_HYPERVISOR))
1552
+
setup_force_cpu_bug(X86_BUG_VMSCAPE);
1561
1553
1562
1554
if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN))
1563
1555
return;
+14
-11
arch/x86/kernel/cpu/topology_amd.c
+14
-11
arch/x86/kernel/cpu/topology_amd.c
···
175
175
176
176
static void parse_topology_amd(struct topo_scan *tscan)
177
177
{
178
-
bool has_topoext = false;
179
-
180
178
/*
181
-
* If the extended topology leaf 0x8000_001e is available
182
-
* try to get SMT, CORE, TILE, and DIE shifts from extended
179
+
* Try to get SMT, CORE, TILE, and DIE shifts from extended
183
180
* CPUID leaf 0x8000_0026 on supported processors first. If
184
181
* extended CPUID leaf 0x8000_0026 is not supported, try to
185
-
* get SMT and CORE shift from leaf 0xb first, then try to
186
-
* get the CORE shift from leaf 0x8000_0008.
182
+
* get SMT and CORE shift from leaf 0xb. If either leaf is
183
+
* available, cpu_parse_topology_ext() will return true.
187
184
*/
188
-
if (cpu_feature_enabled(X86_FEATURE_TOPOEXT))
189
-
has_topoext = cpu_parse_topology_ext(tscan);
185
+
bool has_xtopology = cpu_parse_topology_ext(tscan);
190
186
191
187
if (cpu_feature_enabled(X86_FEATURE_AMD_HTR_CORES))
192
188
tscan->c->topo.cpu_type = cpuid_ebx(0x80000026);
193
189
194
-
if (!has_topoext && !parse_8000_0008(tscan))
190
+
/*
191
+
* If XTOPOLOGY leaves (0x26/0xb) are not available, try to
192
+
* get the CORE shift from leaf 0x8000_0008 first.
193
+
*/
194
+
if (!has_xtopology && !parse_8000_0008(tscan))
195
195
return;
196
196
197
-
/* Prefer leaf 0x8000001e if available */
198
-
if (parse_8000_001e(tscan, has_topoext))
197
+
/*
198
+
* Prefer leaf 0x8000001e if available to get the SMT shift and
199
+
* the initial APIC ID if XTOPOLOGY leaves are not available.
200
+
*/
201
+
if (parse_8000_001e(tscan, has_xtopology))
199
202
return;
200
203
201
204
/* Try the NODEID MSR */
+9
arch/x86/kvm/x86.c
+9
arch/x86/kvm/x86.c
···
11011
11011
wrmsrq(MSR_IA32_XFD_ERR, 0);
11012
11012
11013
11013
/*
11014
+
* Mark this CPU as needing a branch predictor flush before running
11015
+
* userspace. Must be done before enabling preemption to ensure it gets
11016
+
* set for the CPU that actually ran the guest, and not the CPU that it
11017
+
* may migrate to.
11018
+
*/
11019
+
if (cpu_feature_enabled(X86_FEATURE_IBPB_EXIT_TO_USER))
11020
+
this_cpu_write(x86_ibpb_exit_to_user, true);
11021
+
11022
+
/*
11014
11023
* Consume any pending interrupts, including the possible source of
11015
11024
* VM-Exit on SVM and any ticks that occur between VM-Exit and now.
11016
11025
* An instruction is required after local_irq_enable() to fully unblock
+8
-5
block/fops.c
+8
-5
block/fops.c
···
7
7
#include <linux/init.h>
8
8
#include <linux/mm.h>
9
9
#include <linux/blkdev.h>
10
+
#include <linux/blk-integrity.h>
10
11
#include <linux/buffer_head.h>
11
12
#include <linux/mpage.h>
12
13
#include <linux/uio.h>
···
55
54
struct bio bio;
56
55
ssize_t ret;
57
56
58
-
WARN_ON_ONCE(iocb->ki_flags & IOCB_HAS_METADATA);
59
57
if (nr_pages <= DIO_INLINE_BIO_VECS)
60
58
vecs = inline_vecs;
61
59
else {
···
131
131
if (bio->bi_status && !dio->bio.bi_status)
132
132
dio->bio.bi_status = bio->bi_status;
133
133
134
-
if (!is_sync && (dio->iocb->ki_flags & IOCB_HAS_METADATA))
134
+
if (bio_integrity(bio))
135
135
bio_integrity_unmap_user(bio);
136
136
137
137
if (atomic_dec_and_test(&dio->ref)) {
···
233
233
}
234
234
bio->bi_opf |= REQ_NOWAIT;
235
235
}
236
-
if (!is_sync && (iocb->ki_flags & IOCB_HAS_METADATA)) {
236
+
if (iocb->ki_flags & IOCB_HAS_METADATA) {
237
237
ret = bio_integrity_map_iter(bio, iocb->private);
238
238
if (unlikely(ret))
239
239
goto fail;
···
301
301
ret = blk_status_to_errno(bio->bi_status);
302
302
}
303
303
304
-
if (iocb->ki_flags & IOCB_HAS_METADATA)
304
+
if (bio_integrity(bio))
305
305
bio_integrity_unmap_user(bio);
306
306
307
307
iocb->ki_complete(iocb, ret);
···
422
422
}
423
423
424
424
nr_pages = bio_iov_vecs_to_alloc(iter, BIO_MAX_VECS + 1);
425
-
if (likely(nr_pages <= BIO_MAX_VECS)) {
425
+
if (likely(nr_pages <= BIO_MAX_VECS &&
426
+
!(iocb->ki_flags & IOCB_HAS_METADATA))) {
426
427
if (is_sync_kiocb(iocb))
427
428
return __blkdev_direct_IO_simple(iocb, iter, bdev,
428
429
nr_pages);
···
688
687
689
688
if (bdev_can_atomic_write(bdev))
690
689
filp->f_mode |= FMODE_CAN_ATOMIC_WRITE;
690
+
if (blk_get_integrity(bdev->bd_disk))
691
+
filp->f_mode |= FMODE_HAS_METADATA;
691
692
692
693
ret = bdev_open(bdev, mode, filp->private_data, NULL, filp);
693
694
if (ret)
+3
drivers/base/cpu.c
+3
drivers/base/cpu.c
···
603
603
CPU_SHOW_VULN_FALLBACK(old_microcode);
604
604
CPU_SHOW_VULN_FALLBACK(indirect_target_selection);
605
605
CPU_SHOW_VULN_FALLBACK(tsa);
606
+
CPU_SHOW_VULN_FALLBACK(vmscape);
606
607
607
608
static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
608
609
static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
···
623
622
static DEVICE_ATTR(old_microcode, 0444, cpu_show_old_microcode, NULL);
624
623
static DEVICE_ATTR(indirect_target_selection, 0444, cpu_show_indirect_target_selection, NULL);
625
624
static DEVICE_ATTR(tsa, 0444, cpu_show_tsa, NULL);
625
+
static DEVICE_ATTR(vmscape, 0444, cpu_show_vmscape, NULL);
626
626
627
627
static struct attribute *cpu_root_vulnerabilities_attrs[] = {
628
628
&dev_attr_meltdown.attr,
···
644
642
&dev_attr_old_microcode.attr,
645
643
&dev_attr_indirect_target_selection.attr,
646
644
&dev_attr_tsa.attr,
645
+
&dev_attr_vmscape.attr,
647
646
NULL
648
647
};
649
648
+11
-8
drivers/cpufreq/amd-pstate.c
+11
-8
drivers/cpufreq/amd-pstate.c
···
1554
1554
pr_debug("CPU %d exiting\n", policy->cpu);
1555
1555
}
1556
1556
1557
-
static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
1557
+
static int amd_pstate_epp_update_limit(struct cpufreq_policy *policy, bool policy_change)
1558
1558
{
1559
1559
struct amd_cpudata *cpudata = policy->driver_data;
1560
1560
union perf_cached perf;
1561
1561
u8 epp;
1562
1562
1563
-
if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq)
1563
+
if (policy_change ||
1564
+
policy->min != cpudata->min_limit_freq ||
1565
+
policy->max != cpudata->max_limit_freq)
1564
1566
amd_pstate_update_min_max_limit(policy);
1565
1567
1566
1568
if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
···
1586
1584
1587
1585
cpudata->policy = policy->policy;
1588
1586
1589
-
ret = amd_pstate_epp_update_limit(policy);
1587
+
ret = amd_pstate_epp_update_limit(policy, true);
1590
1588
if (ret)
1591
1589
return ret;
1592
1590
···
1628
1626
* min_perf value across kexec reboots. If this CPU is just resumed back without kexec,
1629
1627
* the limits, epp and desired perf will get reset to the cached values in cpudata struct
1630
1628
*/
1631
-
ret = amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);
1629
+
ret = amd_pstate_update_perf(policy, perf.bios_min_perf,
1630
+
FIELD_GET(AMD_CPPC_DES_PERF_MASK, cpudata->cppc_req_cached),
1631
+
FIELD_GET(AMD_CPPC_MAX_PERF_MASK, cpudata->cppc_req_cached),
1632
+
FIELD_GET(AMD_CPPC_EPP_PERF_MASK, cpudata->cppc_req_cached),
1633
+
false);
1632
1634
if (ret)
1633
1635
return ret;
1634
-
1635
-
/* invalidate to ensure it's rewritten during resume */
1636
-
cpudata->cppc_req_cached = 0;
1637
1636
1638
1637
/* set this flag to avoid setting core offline*/
1639
1638
cpudata->suspended = true;
···
1661
1658
int ret;
1662
1659
1663
1660
/* enable amd pstate from suspend state*/
1664
-
ret = amd_pstate_epp_update_limit(policy);
1661
+
ret = amd_pstate_epp_update_limit(policy, false);
1665
1662
if (ret)
1666
1663
return ret;
1667
1664
+2
-2
drivers/cpufreq/intel_pstate.c
+2
-2
drivers/cpufreq/intel_pstate.c
···
1034
1034
if (!cpu_dev)
1035
1035
return false;
1036
1036
1037
-
if (em_dev_register_perf_domain(cpu_dev, HYBRID_EM_STATE_COUNT, &cb,
1038
-
cpumask_of(cpu), false))
1037
+
if (em_dev_register_pd_no_update(cpu_dev, HYBRID_EM_STATE_COUNT, &cb,
1038
+
cpumask_of(cpu), false))
1039
1039
return false;
1040
1040
1041
1041
cpudata->pd_registered = true;
+11
-4
drivers/dma/dw/rzn1-dmamux.c
+11
-4
drivers/dma/dw/rzn1-dmamux.c
···
48
48
u32 mask;
49
49
int ret;
50
50
51
-
if (dma_spec->args_count != RNZ1_DMAMUX_NCELLS)
52
-
return ERR_PTR(-EINVAL);
51
+
if (dma_spec->args_count != RNZ1_DMAMUX_NCELLS) {
52
+
ret = -EINVAL;
53
+
goto put_device;
54
+
}
53
55
54
56
map = kzalloc(sizeof(*map), GFP_KERNEL);
55
-
if (!map)
56
-
return ERR_PTR(-ENOMEM);
57
+
if (!map) {
58
+
ret = -ENOMEM;
59
+
goto put_device;
60
+
}
57
61
58
62
chan = dma_spec->args[0];
59
63
map->req_idx = dma_spec->args[4];
···
98
94
if (ret)
99
95
goto clear_bitmap;
100
96
97
+
put_device(&pdev->dev);
101
98
return map;
102
99
103
100
clear_bitmap:
104
101
clear_bit(map->req_idx, dmamux->used_chans);
105
102
free_map:
106
103
kfree(map);
104
+
put_device:
105
+
put_device(&pdev->dev);
107
106
108
107
return ERR_PTR(ret);
109
108
}
+21
-18
drivers/dma/idxd/init.c
+21
-18
drivers/dma/idxd/init.c
···
189
189
idxd->wq_enable_map = bitmap_zalloc_node(idxd->max_wqs, GFP_KERNEL, dev_to_node(dev));
190
190
if (!idxd->wq_enable_map) {
191
191
rc = -ENOMEM;
192
-
goto err_bitmap;
192
+
goto err_free_wqs;
193
193
}
194
194
195
195
for (i = 0; i < idxd->max_wqs; i++) {
196
196
wq = kzalloc_node(sizeof(*wq), GFP_KERNEL, dev_to_node(dev));
197
197
if (!wq) {
198
198
rc = -ENOMEM;
199
-
goto err;
199
+
goto err_unwind;
200
200
}
201
201
202
202
idxd_dev_set_type(&wq->idxd_dev, IDXD_DEV_WQ);
203
203
conf_dev = wq_confdev(wq);
204
204
wq->id = i;
205
205
wq->idxd = idxd;
206
-
device_initialize(wq_confdev(wq));
206
+
device_initialize(conf_dev);
207
207
conf_dev->parent = idxd_confdev(idxd);
208
208
conf_dev->bus = &dsa_bus_type;
209
209
conf_dev->type = &idxd_wq_device_type;
210
210
rc = dev_set_name(conf_dev, "wq%d.%d", idxd->id, wq->id);
211
-
if (rc < 0)
212
-
goto err;
211
+
if (rc < 0) {
212
+
put_device(conf_dev);
213
+
kfree(wq);
214
+
goto err_unwind;
215
+
}
213
216
214
217
mutex_init(&wq->wq_lock);
215
218
init_waitqueue_head(&wq->err_queue);
···
223
220
wq->enqcmds_retries = IDXD_ENQCMDS_RETRIES;
224
221
wq->wqcfg = kzalloc_node(idxd->wqcfg_size, GFP_KERNEL, dev_to_node(dev));
225
222
if (!wq->wqcfg) {
223
+
put_device(conf_dev);
224
+
kfree(wq);
226
225
rc = -ENOMEM;
227
-
goto err;
226
+
goto err_unwind;
228
227
}
229
228
230
229
if (idxd->hw.wq_cap.op_config) {
231
230
wq->opcap_bmap = bitmap_zalloc(IDXD_MAX_OPCAP_BITS, GFP_KERNEL);
232
231
if (!wq->opcap_bmap) {
232
+
kfree(wq->wqcfg);
233
+
put_device(conf_dev);
234
+
kfree(wq);
233
235
rc = -ENOMEM;
234
-
goto err_opcap_bmap;
236
+
goto err_unwind;
235
237
}
236
238
bitmap_copy(wq->opcap_bmap, idxd->opcap_bmap, IDXD_MAX_OPCAP_BITS);
237
239
}
···
247
239
248
240
return 0;
249
241
250
-
err_opcap_bmap:
251
-
kfree(wq->wqcfg);
252
-
253
-
err:
254
-
put_device(conf_dev);
255
-
kfree(wq);
256
-
242
+
err_unwind:
257
243
while (--i >= 0) {
258
244
wq = idxd->wqs[i];
259
245
if (idxd->hw.wq_cap.op_config)
···
256
254
conf_dev = wq_confdev(wq);
257
255
put_device(conf_dev);
258
256
kfree(wq);
259
-
260
257
}
261
258
bitmap_free(idxd->wq_enable_map);
262
259
263
-
err_bitmap:
260
+
err_free_wqs:
264
261
kfree(idxd->wqs);
265
262
266
263
return rc;
···
1292
1291
device_unregister(idxd_confdev(idxd));
1293
1292
idxd_shutdown(pdev);
1294
1293
idxd_device_remove_debugfs(idxd);
1295
-
idxd_cleanup(idxd);
1294
+
perfmon_pmu_remove(idxd);
1295
+
idxd_cleanup_interrupts(idxd);
1296
+
if (device_pasid_enabled(idxd))
1297
+
idxd_disable_system_pasid(idxd);
1296
1298
pci_iounmap(pdev, idxd->reg_base);
1297
1299
put_device(idxd_confdev(idxd));
1298
-
idxd_free(idxd);
1299
1300
pci_disable_device(pdev);
1300
1301
}
1301
1302
+6
-2
drivers/dma/qcom/bam_dma.c
+6
-2
drivers/dma/qcom/bam_dma.c
···
1283
1283
if (!bdev->bamclk) {
1284
1284
ret = of_property_read_u32(pdev->dev.of_node, "num-channels",
1285
1285
&bdev->num_channels);
1286
-
if (ret)
1286
+
if (ret) {
1287
1287
dev_err(bdev->dev, "num-channels unspecified in dt\n");
1288
+
return ret;
1289
+
}
1288
1290
1289
1291
ret = of_property_read_u32(pdev->dev.of_node, "qcom,num-ees",
1290
1292
&bdev->num_ees);
1291
-
if (ret)
1293
+
if (ret) {
1292
1294
dev_err(bdev->dev, "num-ees unspecified in dt\n");
1295
+
return ret;
1296
+
}
1293
1297
}
1294
1298
1295
1299
ret = clk_prepare_enable(bdev->bamclk);
+2
-2
drivers/dma/ti/edma.c
+2
-2
drivers/dma/ti/edma.c
···
2064
2064
* priority. So Q0 is the highest priority queue and the last queue has
2065
2065
* the lowest priority.
2066
2066
*/
2067
-
queue_priority_map = devm_kcalloc(dev, ecc->num_tc + 1, sizeof(s8),
2068
-
GFP_KERNEL);
2067
+
queue_priority_map = devm_kcalloc(dev, ecc->num_tc + 1,
2068
+
sizeof(*queue_priority_map), GFP_KERNEL);
2069
2069
if (!queue_priority_map)
2070
2070
return -ENOMEM;
2071
2071
+32
-12
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+32
-12
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
···
213
213
spin_lock(&kfd_mem_limit.mem_limit_lock);
214
214
215
215
if (kfd_mem_limit.system_mem_used + system_mem_needed >
216
-
kfd_mem_limit.max_system_mem_limit)
216
+
kfd_mem_limit.max_system_mem_limit) {
217
217
pr_debug("Set no_system_mem_limit=1 if using shared memory\n");
218
+
if (!no_system_mem_limit) {
219
+
ret = -ENOMEM;
220
+
goto release;
221
+
}
222
+
}
218
223
219
-
if ((kfd_mem_limit.system_mem_used + system_mem_needed >
220
-
kfd_mem_limit.max_system_mem_limit && !no_system_mem_limit) ||
221
-
(kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
222
-
kfd_mem_limit.max_ttm_mem_limit) ||
223
-
(adev && xcp_id >= 0 && adev->kfd.vram_used[xcp_id] + vram_needed >
224
-
vram_size - reserved_for_pt - reserved_for_ras - atomic64_read(&adev->vram_pin_size))) {
224
+
if (kfd_mem_limit.ttm_mem_used + ttm_mem_needed >
225
+
kfd_mem_limit.max_ttm_mem_limit) {
225
226
ret = -ENOMEM;
226
227
goto release;
228
+
}
229
+
230
+
/*if is_app_apu is false and apu_prefer_gtt is true, it is an APU with
231
+
* carve out < gtt. In that case, VRAM allocation will go to gtt domain, skip
232
+
* VRAM check since ttm_mem_limit check already cover this allocation
233
+
*/
234
+
235
+
if (adev && xcp_id >= 0 && (!adev->apu_prefer_gtt || adev->gmc.is_app_apu)) {
236
+
uint64_t vram_available =
237
+
vram_size - reserved_for_pt - reserved_for_ras -
238
+
atomic64_read(&adev->vram_pin_size);
239
+
if (adev->kfd.vram_used[xcp_id] + vram_needed > vram_available) {
240
+
ret = -ENOMEM;
241
+
goto release;
242
+
}
227
243
}
228
244
229
245
/* Update memory accounting by decreasing available system
···
1642
1626
uint64_t vram_available, system_mem_available, ttm_mem_available;
1643
1627
1644
1628
spin_lock(&kfd_mem_limit.mem_limit_lock);
1645
-
vram_available = KFD_XCP_MEMORY_SIZE(adev, xcp_id)
1646
-
- adev->kfd.vram_used_aligned[xcp_id]
1647
-
- atomic64_read(&adev->vram_pin_size)
1648
-
- reserved_for_pt
1649
-
- reserved_for_ras;
1629
+
if (adev->apu_prefer_gtt && !adev->gmc.is_app_apu)
1630
+
vram_available = KFD_XCP_MEMORY_SIZE(adev, xcp_id)
1631
+
- adev->kfd.vram_used_aligned[xcp_id];
1632
+
else
1633
+
vram_available = KFD_XCP_MEMORY_SIZE(adev, xcp_id)
1634
+
- adev->kfd.vram_used_aligned[xcp_id]
1635
+
- atomic64_read(&adev->vram_pin_size)
1636
+
- reserved_for_pt
1637
+
- reserved_for_ras;
1650
1638
1651
1639
if (adev->apu_prefer_gtt) {
1652
1640
system_mem_available = no_system_mem_limit ?
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+2
drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c
+2
drivers/gpu/drm/amd/amdgpu/isp_v4_1_1.c
+4
-15
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+4
-15
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
···
149
149
int ret;
150
150
int retry_loop;
151
151
152
-
for (retry_loop = 0; retry_loop < 10; retry_loop++) {
152
+
for (retry_loop = 0; retry_loop < 20; retry_loop++) {
153
153
/* Wait for bootloader to signify that is
154
154
ready having bit 31 of C2PMSG_35 set to 1 */
155
155
ret = psp_wait_for(
156
156
psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
157
-
0x80000000, 0x80000000, PSP_WAITREG_NOVERBOSE);
157
+
0x80000000, 0x8000FFFF, PSP_WAITREG_NOVERBOSE);
158
158
159
159
if (ret == 0)
160
160
return 0;
···
396
396
WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);
397
397
398
398
msleep(500);
399
-
400
-
offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33);
401
-
402
-
ret = psp_wait_for(psp, offset, MBOX_TOS_RESP_FLAG, MBOX_TOS_RESP_MASK,
403
-
0);
404
-
405
-
if (ret) {
406
-
DRM_INFO("psp mode 1 reset failed!\n");
407
-
return -EINVAL;
408
-
}
409
-
410
-
DRM_INFO("psp mode1 reset succeed \n");
411
399
412
400
return 0;
413
401
}
···
653
665
.ring_get_wptr = psp_v11_0_ring_get_wptr,
654
666
.ring_set_wptr = psp_v11_0_ring_set_wptr,
655
667
.load_usbc_pd_fw = psp_v11_0_load_usbc_pd_fw,
656
-
.read_usbc_pd_fw = psp_v11_0_read_usbc_pd_fw
668
+
.read_usbc_pd_fw = psp_v11_0_read_usbc_pd_fw,
669
+
.wait_for_bootloader = psp_v11_0_wait_for_bootloader
657
670
};
658
671
659
672
void psp_v11_0_set_psp_funcs(struct psp_context *psp)
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+8
-4
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
···
1888
1888
struct amdgpu_job *job)
1889
1889
{
1890
1890
struct drm_gpu_scheduler **scheds;
1891
-
1892
-
/* The create msg must be in the first IB submitted */
1893
-
if (atomic_read(&job->base.entity->fence_seq))
1894
-
return -EINVAL;
1891
+
struct dma_fence *fence;
1895
1892
1896
1893
/* if VCN0 is harvested, we can't support AV1 */
1897
1894
if (p->adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0)
1898
1895
return -EINVAL;
1896
+
1897
+
/* wait for all jobs to finish before switching to instance 0 */
1898
+
fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);
1899
+
if (fence) {
1900
+
dma_fence_wait(fence, false);
1901
+
dma_fence_put(fence);
1902
+
}
1899
1903
1900
1904
scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_DEC]
1901
1905
[AMDGPU_RING_PRIO_DEFAULT].sched;
+27
-33
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+27
-33
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
···
1808
1808
struct amdgpu_job *job)
1809
1809
{
1810
1810
struct drm_gpu_scheduler **scheds;
1811
-
1812
-
/* The create msg must be in the first IB submitted */
1813
-
if (atomic_read(&job->base.entity->fence_seq))
1814
-
return -EINVAL;
1811
+
struct dma_fence *fence;
1815
1812
1816
1813
/* if VCN0 is harvested, we can't support AV1 */
1817
1814
if (p->adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0)
1818
1815
return -EINVAL;
1816
+
1817
+
/* wait for all jobs to finish before switching to instance 0 */
1818
+
fence = amdgpu_ctx_get_fence(p->ctx, job->base.entity, ~0ull);
1819
+
if (fence) {
1820
+
dma_fence_wait(fence, false);
1821
+
dma_fence_put(fence);
1822
+
}
1819
1823
1820
1824
scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_ENC]
1821
1825
[AMDGPU_RING_PRIO_0].sched;
···
1911
1907
1912
1908
#define RADEON_VCN_ENGINE_TYPE_ENCODE (0x00000002)
1913
1909
#define RADEON_VCN_ENGINE_TYPE_DECODE (0x00000003)
1914
-
1915
1910
#define RADEON_VCN_ENGINE_INFO (0x30000001)
1916
-
#define RADEON_VCN_ENGINE_INFO_MAX_OFFSET 16
1917
-
1918
1911
#define RENCODE_ENCODE_STANDARD_AV1 2
1919
1912
#define RENCODE_IB_PARAM_SESSION_INIT 0x00000003
1920
-
#define RENCODE_IB_PARAM_SESSION_INIT_MAX_OFFSET 64
1921
1913
1922
-
/* return the offset in ib if id is found, -1 otherwise
1923
-
* to speed up the searching we only search upto max_offset
1924
-
*/
1925
-
static int vcn_v4_0_enc_find_ib_param(struct amdgpu_ib *ib, uint32_t id, int max_offset)
1914
+
/* return the offset in ib if id is found, -1 otherwise */
1915
+
static int vcn_v4_0_enc_find_ib_param(struct amdgpu_ib *ib, uint32_t id, int start)
1926
1916
{
1927
1917
int i;
1928
1918
1929
-
for (i = 0; i < ib->length_dw && i < max_offset && ib->ptr[i] >= 8; i += ib->ptr[i]/4) {
1919
+
for (i = start; i < ib->length_dw && ib->ptr[i] >= 8; i += ib->ptr[i] / 4) {
1930
1920
if (ib->ptr[i + 1] == id)
1931
1921
return i;
1932
1922
}
···
1935
1937
struct amdgpu_vcn_decode_buffer *decode_buffer;
1936
1938
uint64_t addr;
1937
1939
uint32_t val;
1938
-
int idx;
1940
+
int idx = 0, sidx;
1939
1941
1940
1942
/* The first instance can decode anything */
1941
1943
if (!ring->me)
1942
1944
return 0;
1943
1945
1944
-
/* RADEON_VCN_ENGINE_INFO is at the top of ib block */
1945
-
idx = vcn_v4_0_enc_find_ib_param(ib, RADEON_VCN_ENGINE_INFO,
1946
-
RADEON_VCN_ENGINE_INFO_MAX_OFFSET);
1947
-
if (idx < 0) /* engine info is missing */
1948
-
return 0;
1946
+
while ((idx = vcn_v4_0_enc_find_ib_param(ib, RADEON_VCN_ENGINE_INFO, idx)) >= 0) {
1947
+
val = amdgpu_ib_get_value(ib, idx + 2); /* RADEON_VCN_ENGINE_TYPE */
1948
+
if (val == RADEON_VCN_ENGINE_TYPE_DECODE) {
1949
+
decode_buffer = (struct amdgpu_vcn_decode_buffer *)&ib->ptr[idx + 6];
1949
1950
1950
-
val = amdgpu_ib_get_value(ib, idx + 2); /* RADEON_VCN_ENGINE_TYPE */
1951
-
if (val == RADEON_VCN_ENGINE_TYPE_DECODE) {
1952
-
decode_buffer = (struct amdgpu_vcn_decode_buffer *)&ib->ptr[idx + 6];
1951
+
if (!(decode_buffer->valid_buf_flag & 0x1))
1952
+
return 0;
1953
1953
1954
-
if (!(decode_buffer->valid_buf_flag & 0x1))
1955
-
return 0;
1956
-
1957
-
addr = ((u64)decode_buffer->msg_buffer_address_hi) << 32 |
1958
-
decode_buffer->msg_buffer_address_lo;
1959
-
return vcn_v4_0_dec_msg(p, job, addr);
1960
-
} else if (val == RADEON_VCN_ENGINE_TYPE_ENCODE) {
1961
-
idx = vcn_v4_0_enc_find_ib_param(ib, RENCODE_IB_PARAM_SESSION_INIT,
1962
-
RENCODE_IB_PARAM_SESSION_INIT_MAX_OFFSET);
1963
-
if (idx >= 0 && ib->ptr[idx + 2] == RENCODE_ENCODE_STANDARD_AV1)
1964
-
return vcn_v4_0_limit_sched(p, job);
1954
+
addr = ((u64)decode_buffer->msg_buffer_address_hi) << 32 |
1955
+
decode_buffer->msg_buffer_address_lo;
1956
+
return vcn_v4_0_dec_msg(p, job, addr);
1957
+
} else if (val == RADEON_VCN_ENGINE_TYPE_ENCODE) {
1958
+
sidx = vcn_v4_0_enc_find_ib_param(ib, RENCODE_IB_PARAM_SESSION_INIT, idx);
1959
+
if (sidx >= 0 && ib->ptr[sidx + 2] == RENCODE_ENCODE_STANDARD_AV1)
1960
+
return vcn_v4_0_limit_sched(p, job);
1961
+
}
1962
+
idx += ib->ptr[idx] / 4;
1965
1963
}
1966
1964
return 0;
1967
1965
}
+2
-1
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+2
-1
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
···
1587
1587
break;
1588
1588
if (!dev->gpu || !dev->gpu->adev ||
1589
1589
(dev->gpu->kfd->hive_id &&
1590
-
dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id))
1590
+
dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id &&
1591
+
amdgpu_xgmi_get_is_sharing_enabled(dev->gpu->adev, new_dev->gpu->adev)))
1591
1592
goto next;
1592
1593
1593
1594
/* check if node(s) is/are peer accessible in one direction or bi-direction */
+12
-22
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+12
-22
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
2913
2913
return 0;
2914
2914
}
2915
2915
2916
+
static void dm_oem_i2c_hw_fini(struct amdgpu_device *adev)
2917
+
{
2918
+
struct amdgpu_display_manager *dm = &adev->dm;
2919
+
2920
+
if (dm->oem_i2c) {
2921
+
i2c_del_adapter(&dm->oem_i2c->base);
2922
+
kfree(dm->oem_i2c);
2923
+
dm->oem_i2c = NULL;
2924
+
}
2925
+
}
2926
+
2916
2927
/**
2917
2928
* dm_hw_init() - Initialize DC device
2918
2929
* @ip_block: Pointer to the amdgpu_ip_block for this hw instance.
···
2974
2963
{
2975
2964
struct amdgpu_device *adev = ip_block->adev;
2976
2965
2977
-
kfree(adev->dm.oem_i2c);
2966
+
dm_oem_i2c_hw_fini(adev);
2978
2967
2979
2968
amdgpu_dm_hpd_fini(adev);
2980
2969
···
3136
3125
drm_atomic_helper_resume(ddev, dm->cached_state);
3137
3126
3138
3127
dm->cached_state = NULL;
3139
-
}
3140
-
3141
-
static void dm_complete(struct amdgpu_ip_block *ip_block)
3142
-
{
3143
-
struct amdgpu_device *adev = ip_block->adev;
3144
-
3145
-
dm_destroy_cached_state(adev);
3146
-
}
3147
-
3148
-
static int dm_prepare_suspend(struct amdgpu_ip_block *ip_block)
3149
-
{
3150
-
struct amdgpu_device *adev = ip_block->adev;
3151
-
3152
-
if (amdgpu_in_reset(adev))
3153
-
return 0;
3154
-
3155
-
WARN_ON(adev->dm.cached_state);
3156
-
3157
-
return dm_cache_state(adev);
3158
3128
}
3159
3129
3160
3130
static int dm_suspend(struct amdgpu_ip_block *ip_block)
···
3563
3571
.early_fini = amdgpu_dm_early_fini,
3564
3572
.hw_init = dm_hw_init,
3565
3573
.hw_fini = dm_hw_fini,
3566
-
.prepare_suspend = dm_prepare_suspend,
3567
3574
.suspend = dm_suspend,
3568
3575
.resume = dm_resume,
3569
-
.complete = dm_complete,
3570
3576
.is_idle = dm_is_idle,
3571
3577
.wait_for_idle = dm_wait_for_idle,
3572
3578
.check_soft_reset = dm_check_soft_reset,
+1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
···
809
809
drm_dp_aux_init(&aconnector->dm_dp_aux.aux);
810
810
drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
811
811
&aconnector->base);
812
+
drm_dp_dpcd_set_probe(&aconnector->dm_dp_aux.aux, false);
812
813
813
814
if (aconnector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
814
815
return;
+1
drivers/gpu/drm/amd/display/dc/dc.h
+1
drivers/gpu/drm/amd/display/dc/dc.h
+39
-35
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
+39
-35
drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
···
133
133
};
134
134
135
135
136
-
static void dccg35_set_dsc_clk_rcg(struct dccg *dccg, int inst, bool enable)
136
+
static void dccg35_set_dsc_clk_rcg(struct dccg *dccg, int inst, bool allow_rcg)
137
137
{
138
138
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
139
139
140
-
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc && enable)
140
+
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dsc && allow_rcg)
141
141
return;
142
142
143
143
switch (inst) {
144
144
case 0:
145
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, enable ? 0 : 1);
145
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
146
146
break;
147
147
case 1:
148
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, enable ? 0 : 1);
148
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
149
149
break;
150
150
case 2:
151
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, enable ? 0 : 1);
151
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
152
152
break;
153
153
case 3:
154
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, enable ? 0 : 1);
154
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
155
155
break;
156
156
default:
157
157
BREAK_TO_DEBUGGER();
158
158
return;
159
159
}
160
+
161
+
/* Wait for clock to ramp */
162
+
if (!allow_rcg)
163
+
udelay(10);
160
164
}
161
165
162
166
static void dccg35_set_symclk32_se_rcg(
···
389
385
}
390
386
}
391
387
392
-
static void dccg35_set_dppclk_rcg(struct dccg *dccg,
393
-
int inst, bool enable)
388
+
static void dccg35_set_dppclk_rcg(struct dccg *dccg, int inst, bool allow_rcg)
394
389
{
395
-
396
390
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
397
391
398
-
399
-
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && enable)
392
+
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && allow_rcg)
400
393
return;
401
394
402
395
switch (inst) {
403
396
case 0:
404
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable ? 0 : 1);
397
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
405
398
break;
406
399
case 1:
407
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable ? 0 : 1);
400
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
408
401
break;
409
402
case 2:
410
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable ? 0 : 1);
403
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
411
404
break;
412
405
case 3:
413
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable ? 0 : 1);
406
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, allow_rcg ? 0 : 1);
414
407
break;
415
408
default:
416
409
BREAK_TO_DEBUGGER();
417
410
break;
418
411
}
419
-
//DC_LOG_DEBUG("%s: inst(%d) DPPCLK rcg_disable: %d\n", __func__, inst, enable ? 0 : 1);
420
412
413
+
/* Wait for clock to ramp */
414
+
if (!allow_rcg)
415
+
udelay(10);
421
416
}
422
417
423
418
static void dccg35_set_dpstreamclk_rcg(
···
1180
1177
}
1181
1178
1182
1179
static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,
1183
-
uint32_t dpp_inst, uint32_t enable)
1180
+
uint32_t dpp_inst, uint32_t disallow_rcg)
1184
1181
{
1185
1182
struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
1186
1183
1187
-
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp)
1184
+
if (!dccg->ctx->dc->debug.root_clock_optimization.bits.dpp && !disallow_rcg)
1188
1185
return;
1189
1186
1190
1187
1191
1188
switch (dpp_inst) {
1192
1189
case 0:
1193
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);
1190
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, disallow_rcg);
1194
1191
break;
1195
1192
case 1:
1196
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable);
1193
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, disallow_rcg);
1197
1194
break;
1198
1195
case 2:
1199
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable);
1196
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, disallow_rcg);
1200
1197
break;
1201
1198
case 3:
1202
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable);
1199
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, disallow_rcg);
1203
1200
break;
1204
1201
default:
1205
1202
break;
1206
1203
}
1207
-
//DC_LOG_DEBUG("%s: dpp_inst(%d) rcg: %d\n", __func__, dpp_inst, enable);
1208
1204
1205
+
/* Wait for clock to ramp */
1206
+
if (disallow_rcg)
1207
+
udelay(10);
1209
1208
}
1210
1209
1211
1210
static void dccg35_get_pixel_rate_div(
···
1787
1782
//Disable DTO
1788
1783
switch (inst) {
1789
1784
case 0:
1790
-
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
1791
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 1);
1785
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 1);
1792
1786
1793
1787
REG_UPDATE_2(DSCCLK0_DTO_PARAM,
1794
1788
DSCCLK0_DTO_PHASE, 0,
···
1795
1791
REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 1);
1796
1792
break;
1797
1793
case 1:
1798
-
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
1799
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 1);
1794
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 1);
1800
1795
1801
1796
REG_UPDATE_2(DSCCLK1_DTO_PARAM,
1802
1797
DSCCLK1_DTO_PHASE, 0,
···
1803
1800
REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1);
1804
1801
break;
1805
1802
case 2:
1806
-
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
1807
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 1);
1803
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 1);
1808
1804
1809
1805
REG_UPDATE_2(DSCCLK2_DTO_PARAM,
1810
1806
DSCCLK2_DTO_PHASE, 0,
···
1811
1809
REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1);
1812
1810
break;
1813
1811
case 3:
1814
-
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dsc)
1815
-
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 1);
1812
+
REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 1);
1816
1813
1817
1814
REG_UPDATE_2(DSCCLK3_DTO_PARAM,
1818
1815
DSCCLK3_DTO_PHASE, 0,
···
1822
1821
BREAK_TO_DEBUGGER();
1823
1822
return;
1824
1823
}
1824
+
1825
+
/* Wait for clock to ramp */
1826
+
udelay(10);
1825
1827
}
1826
1828
1827
1829
static void dccg35_disable_dscclk(struct dccg *dccg,
···
1868
1864
default:
1869
1865
return;
1870
1866
}
1867
+
1868
+
/* Wait for clock ramp */
1869
+
udelay(10);
1871
1870
}
1872
1871
1873
1872
static void dccg35_enable_symclk_se(struct dccg *dccg, uint32_t stream_enc_inst, uint32_t link_enc_inst)
···
2356
2349
2357
2350
void dccg35_root_gate_disable_control(struct dccg *dccg, uint32_t pipe_idx, uint32_t disable_clock_gating)
2358
2351
{
2359
-
2360
-
if (dccg->ctx->dc->debug.root_clock_optimization.bits.dpp) {
2361
-
dccg35_set_dppclk_root_clock_gating(dccg, pipe_idx, disable_clock_gating);
2362
-
}
2352
+
dccg35_set_dppclk_root_clock_gating(dccg, pipe_idx, disable_clock_gating);
2363
2353
}
2364
2354
2365
2355
static const struct dccg_funcs dccg35_funcs_new = {
+1
-1
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+1
-1
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
···
955
955
return DC_ERROR_UNEXPECTED;
956
956
}
957
957
958
-
fsleep(stream->timing.v_total * (stream->timing.h_total * 10000u / stream->timing.pix_clk_100hz));
958
+
udelay(stream->timing.v_total * (stream->timing.h_total * 10000u / stream->timing.pix_clk_100hz));
959
959
960
960
params.vertical_total_min = stream->adjust.v_total_min;
961
961
params.vertical_total_max = stream->adjust.v_total_max;
+20
-95
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+20
-95
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
···
113
113
}
114
114
#endif
115
115
116
+
static void print_pg_status(struct dc *dc, const char *debug_func, const char *debug_log)
117
+
{
118
+
if (dc->debug.enable_pg_cntl_debug_logs && dc->res_pool->pg_cntl) {
119
+
if (dc->res_pool->pg_cntl->funcs->print_pg_status)
120
+
dc->res_pool->pg_cntl->funcs->print_pg_status(dc->res_pool->pg_cntl, debug_func, debug_log);
121
+
}
122
+
}
123
+
116
124
void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable)
117
125
{
118
126
REG_UPDATE_3(DMU_CLK_CNTL,
···
144
136
uint32_t backlight = MAX_BACKLIGHT_LEVEL;
145
137
uint32_t user_level = MAX_BACKLIGHT_LEVEL;
146
138
int i;
139
+
140
+
print_pg_status(dc, __func__, ": start");
147
141
148
142
if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks)
149
143
dc->clk_mgr->funcs->init_clocks(dc->clk_mgr);
···
210
200
211
201
/* we want to turn off all dp displays before doing detection */
212
202
dc->link_srv->blank_all_dp_displays(dc);
213
-
/*
214
-
if (hws->funcs.enable_power_gating_plane)
215
-
hws->funcs.enable_power_gating_plane(dc->hwseq, true);
216
-
*/
203
+
217
204
if (res_pool->hubbub && res_pool->hubbub->funcs->dchubbub_init)
218
205
res_pool->hubbub->funcs->dchubbub_init(dc->res_pool->hubbub);
219
206
/* If taking control over from VBIOS, we may want to optimize our first
···
243
236
}
244
237
245
238
hws->funcs.init_pipes(dc, dc->current_state);
239
+
print_pg_status(dc, __func__, ": after init_pipes");
240
+
246
241
if (dc->res_pool->hubbub->funcs->allow_self_refresh_control &&
247
242
!dc->res_pool->hubbub->ctx->dc->debug.disable_stutter)
248
243
dc->res_pool->hubbub->funcs->allow_self_refresh_control(dc->res_pool->hubbub,
···
321
312
if (dc->res_pool->pg_cntl->funcs->init_pg_status)
322
313
dc->res_pool->pg_cntl->funcs->init_pg_status(dc->res_pool->pg_cntl);
323
314
}
315
+
print_pg_status(dc, __func__, ": after init_pg_status");
324
316
}
325
317
326
318
static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)
···
508
498
hws->ctx->dc->res_pool->dccg->funcs->set_physymclk_root_clock_gating(
509
499
hws->ctx->dc->res_pool->dccg, phy_inst, clock_on);
510
500
}
511
-
}
512
-
513
-
void dcn35_dsc_pg_control(
514
-
struct dce_hwseq *hws,
515
-
unsigned int dsc_inst,
516
-
bool power_on)
517
-
{
518
-
uint32_t power_gate = power_on ? 0 : 1;
519
-
uint32_t pwr_status = power_on ? 0 : 2;
520
-
uint32_t org_ip_request_cntl = 0;
521
-
522
-
if (hws->ctx->dc->debug.disable_dsc_power_gate)
523
-
return;
524
-
if (hws->ctx->dc->debug.ignore_pg)
525
-
return;
526
-
REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
527
-
if (org_ip_request_cntl == 0)
528
-
REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
529
-
530
-
switch (dsc_inst) {
531
-
case 0: /* DSC0 */
532
-
REG_UPDATE(DOMAIN16_PG_CONFIG,
533
-
DOMAIN_POWER_GATE, power_gate);
534
-
535
-
REG_WAIT(DOMAIN16_PG_STATUS,
536
-
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
537
-
1, 1000);
538
-
break;
539
-
case 1: /* DSC1 */
540
-
REG_UPDATE(DOMAIN17_PG_CONFIG,
541
-
DOMAIN_POWER_GATE, power_gate);
542
-
543
-
REG_WAIT(DOMAIN17_PG_STATUS,
544
-
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
545
-
1, 1000);
546
-
break;
547
-
case 2: /* DSC2 */
548
-
REG_UPDATE(DOMAIN18_PG_CONFIG,
549
-
DOMAIN_POWER_GATE, power_gate);
550
-
551
-
REG_WAIT(DOMAIN18_PG_STATUS,
552
-
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
553
-
1, 1000);
554
-
break;
555
-
case 3: /* DSC3 */
556
-
REG_UPDATE(DOMAIN19_PG_CONFIG,
557
-
DOMAIN_POWER_GATE, power_gate);
558
-
559
-
REG_WAIT(DOMAIN19_PG_STATUS,
560
-
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
561
-
1, 1000);
562
-
break;
563
-
default:
564
-
BREAK_TO_DEBUGGER();
565
-
break;
566
-
}
567
-
568
-
if (org_ip_request_cntl == 0)
569
-
REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);
570
-
}
571
-
572
-
void dcn35_enable_power_gating_plane(struct dce_hwseq *hws, bool enable)
573
-
{
574
-
bool force_on = true; /* disable power gating */
575
-
uint32_t org_ip_request_cntl = 0;
576
-
577
-
if (hws->ctx->dc->debug.disable_hubp_power_gate)
578
-
return;
579
-
if (hws->ctx->dc->debug.ignore_pg)
580
-
return;
581
-
REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
582
-
if (org_ip_request_cntl == 0)
583
-
REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
584
-
/* DCHUBP0/1/2/3/4/5 */
585
-
REG_UPDATE(DOMAIN0_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
586
-
REG_UPDATE(DOMAIN2_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
587
-
/* DPP0/1/2/3/4/5 */
588
-
REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
589
-
REG_UPDATE(DOMAIN3_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
590
-
591
-
force_on = true; /* disable power gating */
592
-
if (enable && !hws->ctx->dc->debug.disable_dsc_power_gate)
593
-
force_on = false;
594
-
595
-
/* DCS0/1/2/3/4 */
596
-
REG_UPDATE(DOMAIN16_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
597
-
REG_UPDATE(DOMAIN17_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
598
-
REG_UPDATE(DOMAIN18_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
599
-
REG_UPDATE(DOMAIN19_PG_CONFIG, DOMAIN_POWER_FORCEON, force_on);
600
-
601
-
602
501
}
603
502
604
503
/* In headless boot cases, DIG may be turned
···
1372
1453
}
1373
1454
1374
1455
dcn20_prepare_bandwidth(dc, context);
1456
+
1457
+
print_pg_status(dc, __func__, ": after rcg and power up");
1375
1458
}
1376
1459
1377
1460
void dcn35_optimize_bandwidth(
···
1381
1460
struct dc_state *context)
1382
1461
{
1383
1462
struct pg_block_update pg_update_state;
1463
+
1464
+
print_pg_status(dc, __func__, ": before rcg and power up");
1384
1465
1385
1466
dcn20_optimize_bandwidth(dc, context);
1386
1467
···
1395
1472
if (dc->hwss.root_clock_control)
1396
1473
dc->hwss.root_clock_control(dc, &pg_update_state, false);
1397
1474
}
1475
+
1476
+
print_pg_status(dc, __func__, ": after rcg and power up");
1398
1477
}
1399
1478
1400
1479
void dcn35_set_drr(struct pipe_ctx **pipe_ctx,
-3
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
-3
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c
···
115
115
.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
116
116
.update_visual_confirm_color = dcn10_update_visual_confirm_color,
117
117
.apply_idle_power_optimizations = dcn35_apply_idle_power_optimizations,
118
-
.update_dsc_pg = dcn32_update_dsc_pg,
119
118
.calc_blocks_to_gate = dcn35_calc_blocks_to_gate,
120
119
.calc_blocks_to_ungate = dcn35_calc_blocks_to_ungate,
121
120
.hw_block_power_up = dcn35_hw_block_power_up,
···
149
150
.plane_atomic_disable = dcn35_plane_atomic_disable,
150
151
//.plane_atomic_disable = dcn20_plane_atomic_disable,/*todo*/
151
152
//.hubp_pg_control = dcn35_hubp_pg_control,
152
-
.enable_power_gating_plane = dcn35_enable_power_gating_plane,
153
153
.dpp_root_clock_control = dcn35_dpp_root_clock_control,
154
154
.dpstream_root_clock_control = dcn35_dpstream_root_clock_control,
155
155
.physymclk_root_clock_control = dcn35_physymclk_root_clock_control,
···
163
165
.calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values,
164
166
.resync_fifo_dccg_dio = dcn314_resync_fifo_dccg_dio,
165
167
.is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy,
166
-
.dsc_pg_control = dcn35_dsc_pg_control,
167
168
.dsc_pg_status = dcn32_dsc_pg_status,
168
169
.enable_plane = dcn35_enable_plane,
169
170
.wait_for_pipe_update_if_needed = dcn10_wait_for_pipe_update_if_needed,
-3
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
-3
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
···
114
114
.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
115
115
.update_visual_confirm_color = dcn10_update_visual_confirm_color,
116
116
.apply_idle_power_optimizations = dcn35_apply_idle_power_optimizations,
117
-
.update_dsc_pg = dcn32_update_dsc_pg,
118
117
.calc_blocks_to_gate = dcn351_calc_blocks_to_gate,
119
118
.calc_blocks_to_ungate = dcn351_calc_blocks_to_ungate,
120
119
.hw_block_power_up = dcn351_hw_block_power_up,
···
144
145
.plane_atomic_disable = dcn35_plane_atomic_disable,
145
146
//.plane_atomic_disable = dcn20_plane_atomic_disable,/*todo*/
146
147
//.hubp_pg_control = dcn35_hubp_pg_control,
147
-
.enable_power_gating_plane = dcn35_enable_power_gating_plane,
148
148
.dpp_root_clock_control = dcn35_dpp_root_clock_control,
149
149
.dpstream_root_clock_control = dcn35_dpstream_root_clock_control,
150
150
.physymclk_root_clock_control = dcn35_physymclk_root_clock_control,
···
157
159
.setup_hpo_hw_control = dcn35_setup_hpo_hw_control,
158
160
.calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values,
159
161
.is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy,
160
-
.dsc_pg_control = dcn35_dsc_pg_control,
161
162
.dsc_pg_status = dcn32_dsc_pg_status,
162
163
.enable_plane = dcn35_enable_plane,
163
164
.wait_for_pipe_update_if_needed = dcn10_wait_for_pipe_update_if_needed,
+1
drivers/gpu/drm/amd/display/dc/inc/hw/pg_cntl.h
+1
drivers/gpu/drm/amd/display/dc/inc/hw/pg_cntl.h
···
49
49
void (*mem_pg_control)(struct pg_cntl *pg_cntl, bool power_on);
50
50
void (*dio_pg_control)(struct pg_cntl *pg_cntl, bool power_on);
51
51
void (*init_pg_status)(struct pg_cntl *pg_cntl);
52
+
void (*print_pg_status)(struct pg_cntl *pg_cntl, const char *debug_func, const char *debug_log);
52
53
};
53
54
54
55
#endif //__DC_PG_CNTL_H__
+50
-28
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
+50
-28
drivers/gpu/drm/amd/display/dc/pg/dcn35/dcn35_pg_cntl.c
···
79
79
uint32_t power_gate = power_on ? 0 : 1;
80
80
uint32_t pwr_status = power_on ? 0 : 2;
81
81
uint32_t org_ip_request_cntl = 0;
82
-
bool block_enabled;
82
+
bool block_enabled = false;
83
+
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
84
+
pg_cntl->ctx->dc->debug.disable_dsc_power_gate ||
85
+
pg_cntl->ctx->dc->idle_optimizations_allowed;
83
86
84
-
/*need to enable dscclk regardless DSC_PG*/
85
-
if (pg_cntl->ctx->dc->res_pool->dccg->funcs->enable_dsc && power_on)
86
-
pg_cntl->ctx->dc->res_pool->dccg->funcs->enable_dsc(
87
-
pg_cntl->ctx->dc->res_pool->dccg, dsc_inst);
88
-
89
-
if (pg_cntl->ctx->dc->debug.ignore_pg ||
90
-
pg_cntl->ctx->dc->debug.disable_dsc_power_gate ||
91
-
pg_cntl->ctx->dc->idle_optimizations_allowed)
87
+
if (skip_pg && !power_on)
92
88
return;
93
89
94
90
block_enabled = pg_cntl35_dsc_pg_status(pg_cntl, dsc_inst);
···
107
111
108
112
REG_WAIT(DOMAIN16_PG_STATUS,
109
113
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
110
-
1, 1000);
114
+
1, 10000);
111
115
break;
112
116
case 1: /* DSC1 */
113
117
REG_UPDATE(DOMAIN17_PG_CONFIG,
···
115
119
116
120
REG_WAIT(DOMAIN17_PG_STATUS,
117
121
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
118
-
1, 1000);
122
+
1, 10000);
119
123
break;
120
124
case 2: /* DSC2 */
121
125
REG_UPDATE(DOMAIN18_PG_CONFIG,
···
123
127
124
128
REG_WAIT(DOMAIN18_PG_STATUS,
125
129
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
126
-
1, 1000);
130
+
1, 10000);
127
131
break;
128
132
case 3: /* DSC3 */
129
133
REG_UPDATE(DOMAIN19_PG_CONFIG,
···
131
135
132
136
REG_WAIT(DOMAIN19_PG_STATUS,
133
137
DOMAIN_PGFSM_PWR_STATUS, pwr_status,
134
-
1, 1000);
138
+
1, 10000);
135
139
break;
136
140
default:
137
141
BREAK_TO_DEBUGGER();
···
140
144
141
145
if (dsc_inst < MAX_PIPES)
142
146
pg_cntl->pg_pipe_res_enable[PG_DSC][dsc_inst] = power_on;
143
-
144
-
if (pg_cntl->ctx->dc->res_pool->dccg->funcs->disable_dsc && !power_on) {
145
-
/*this is to disable dscclk*/
146
-
pg_cntl->ctx->dc->res_pool->dccg->funcs->disable_dsc(
147
-
pg_cntl->ctx->dc->res_pool->dccg, dsc_inst);
148
-
}
149
147
}
150
148
151
149
static bool pg_cntl35_hubp_dpp_pg_status(struct pg_cntl *pg_cntl, unsigned int hubp_dpp_inst)
···
179
189
uint32_t pwr_status = power_on ? 0 : 2;
180
190
uint32_t org_ip_request_cntl;
181
191
bool block_enabled;
192
+
bool skip_pg = pg_cntl->ctx->dc->debug.ignore_pg ||
193
+
pg_cntl->ctx->dc->debug.disable_hubp_power_gate ||
194
+
pg_cntl->ctx->dc->debug.disable_dpp_power_gate ||
195
+
pg_cntl->ctx->dc->idle_optimizations_allowed;
182
196
183
-
if (pg_cntl->ctx->dc->debug.ignore_pg ||
184
-
pg_cntl->ctx->dc->debug.disable_hubp_power_gate ||
185
-
pg_cntl->ctx->dc->debug.disable_dpp_power_gate ||
186
-
pg_cntl->ctx->dc->idle_optimizations_allowed)
197
+
if (skip_pg && !power_on)
187
198
return;
188
199
189
200
block_enabled = pg_cntl35_hubp_dpp_pg_status(pg_cntl, hubp_dpp_inst);
···
204
213
case 0:
205
214
/* DPP0 & HUBP0 */
206
215
REG_UPDATE(DOMAIN0_PG_CONFIG, DOMAIN_POWER_GATE, power_gate);
207
-
REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);
216
+
REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);
208
217
break;
209
218
case 1:
210
219
/* DPP1 & HUBP1 */
211
220
REG_UPDATE(DOMAIN1_PG_CONFIG, DOMAIN_POWER_GATE, power_gate);
212
-
REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);
221
+
REG_WAIT(DOMAIN1_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);
213
222
break;
214
223
case 2:
215
224
/* DPP2 & HUBP2 */
216
225
REG_UPDATE(DOMAIN2_PG_CONFIG, DOMAIN_POWER_GATE, power_gate);
217
-
REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);
226
+
REG_WAIT(DOMAIN2_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);
218
227
break;
219
228
case 3:
220
229
/* DPP3 & HUBP3 */
221
230
REG_UPDATE(DOMAIN3_PG_CONFIG, DOMAIN_POWER_GATE, power_gate);
222
-
REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000);
231
+
REG_WAIT(DOMAIN3_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000);
223
232
break;
224
233
default:
225
234
BREAK_TO_DEBUGGER();
···
492
501
pg_cntl->pg_res_enable[PG_DWB] = block_enabled;
493
502
}
494
503
504
+
static void pg_cntl35_print_pg_status(struct pg_cntl *pg_cntl, const char *debug_func, const char *debug_log)
505
+
{
506
+
int i = 0;
507
+
bool block_enabled = false;
508
+
509
+
DC_LOG_DEBUG("%s: %s", debug_func, debug_log);
510
+
511
+
DC_LOG_DEBUG("PG_CNTL status:\n");
512
+
513
+
block_enabled = pg_cntl35_io_clk_status(pg_cntl);
514
+
DC_LOG_DEBUG("ONO0=%d (DCCG, DIO, DCIO)\n", block_enabled ? 1 : 0);
515
+
516
+
block_enabled = pg_cntl35_mem_status(pg_cntl);
517
+
DC_LOG_DEBUG("ONO1=%d (DCHUBBUB, DCHVM, DCHUBBUBMEM)\n", block_enabled ? 1 : 0);
518
+
519
+
block_enabled = pg_cntl35_plane_otg_status(pg_cntl);
520
+
DC_LOG_DEBUG("ONO2=%d (MPC, OPP, OPTC, DWB)\n", block_enabled ? 1 : 0);
521
+
522
+
block_enabled = pg_cntl35_hpo_pg_status(pg_cntl);
523
+
DC_LOG_DEBUG("ONO3=%d (HPO)\n", block_enabled ? 1 : 0);
524
+
525
+
for (i = 0; i < pg_cntl->ctx->dc->res_pool->pipe_count; i++) {
526
+
block_enabled = pg_cntl35_hubp_dpp_pg_status(pg_cntl, i);
527
+
DC_LOG_DEBUG("ONO%d=%d (DCHUBP%d, DPP%d)\n", 4 + i * 2, block_enabled ? 1 : 0, i, i);
528
+
529
+
block_enabled = pg_cntl35_dsc_pg_status(pg_cntl, i);
530
+
DC_LOG_DEBUG("ONO%d=%d (DSC%d)\n", 5 + i * 2, block_enabled ? 1 : 0, i);
531
+
}
532
+
}
533
+
495
534
static const struct pg_cntl_funcs pg_cntl35_funcs = {
496
535
.init_pg_status = pg_cntl35_init_pg_status,
497
536
.dsc_pg_control = pg_cntl35_dsc_pg_control,
···
532
511
.mpcc_pg_control = pg_cntl35_mpcc_pg_control,
533
512
.opp_pg_control = pg_cntl35_opp_pg_control,
534
513
.optc_pg_control = pg_cntl35_optc_pg_control,
535
-
.dwb_pg_control = pg_cntl35_dwb_pg_control
514
+
.dwb_pg_control = pg_cntl35_dwb_pg_control,
515
+
.print_pg_status = pg_cntl35_print_pg_status
536
516
};
537
517
538
518
struct pg_cntl *pg_cntl35_create(
+3
-3
drivers/gpu/drm/i915/display/intel_display_power.c
+3
-3
drivers/gpu/drm/i915/display/intel_display_power.c
···
1172
1172
if (DISPLAY_VER(display) == 12)
1173
1173
abox_regs |= BIT(0);
1174
1174
1175
-
for_each_set_bit(i, &abox_regs, sizeof(abox_regs))
1175
+
for_each_set_bit(i, &abox_regs, BITS_PER_TYPE(abox_regs))
1176
1176
intel_de_rmw(display, MBUS_ABOX_CTL(i), mask, val);
1177
1177
}
1178
1178
···
1629
1629
if (table[config].page_mask == 0) {
1630
1630
drm_dbg_kms(display->drm,
1631
1631
"Unknown memory configuration; disabling address buddy logic.\n");
1632
-
for_each_set_bit(i, &abox_mask, sizeof(abox_mask))
1632
+
for_each_set_bit(i, &abox_mask, BITS_PER_TYPE(abox_mask))
1633
1633
intel_de_write(display, BW_BUDDY_CTL(i),
1634
1634
BW_BUDDY_DISABLE);
1635
1635
} else {
1636
-
for_each_set_bit(i, &abox_mask, sizeof(abox_mask)) {
1636
+
for_each_set_bit(i, &abox_mask, BITS_PER_TYPE(abox_mask)) {
1637
1637
intel_de_write(display, BW_BUDDY_PAGE_MASK(i),
1638
1638
table[config].page_mask);
1639
1639
+9
-14
drivers/gpu/drm/mediatek/mtk_drm_drv.c
+9
-14
drivers/gpu/drm/mediatek/mtk_drm_drv.c
···
387
387
388
388
of_id = of_match_node(mtk_drm_of_ids, node);
389
389
if (!of_id)
390
-
goto next_put_node;
390
+
continue;
391
391
392
392
pdev = of_find_device_by_node(node);
393
393
if (!pdev)
394
-
goto next_put_node;
394
+
continue;
395
395
396
396
drm_dev = device_find_child(&pdev->dev, NULL, mtk_drm_match);
397
+
put_device(&pdev->dev);
397
398
if (!drm_dev)
398
-
goto next_put_device_pdev_dev;
399
+
continue;
399
400
400
401
temp_drm_priv = dev_get_drvdata(drm_dev);
402
+
put_device(drm_dev);
401
403
if (!temp_drm_priv)
402
-
goto next_put_device_drm_dev;
404
+
continue;
403
405
404
406
if (temp_drm_priv->data->main_len)
405
407
all_drm_priv[CRTC_MAIN] = temp_drm_priv;
···
413
411
if (temp_drm_priv->mtk_drm_bound)
414
412
cnt++;
415
413
416
-
next_put_device_drm_dev:
417
-
put_device(drm_dev);
418
-
419
-
next_put_device_pdev_dev:
420
-
put_device(&pdev->dev);
421
-
422
-
next_put_node:
423
-
of_node_put(node);
424
-
425
-
if (cnt == MAX_CRTC)
414
+
if (cnt == MAX_CRTC) {
415
+
of_node_put(node);
426
416
break;
417
+
}
427
418
}
428
419
429
420
if (drm_priv->data->mmsys_dev_num == cnt) {
-15
drivers/gpu/drm/nouveau/nouveau_fence.c
-15
drivers/gpu/drm/nouveau/nouveau_fence.c
···
240
240
return ret;
241
241
}
242
242
243
-
void
244
-
nouveau_fence_cancel(struct nouveau_fence *fence)
245
-
{
246
-
struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
247
-
unsigned long flags;
248
-
249
-
spin_lock_irqsave(&fctx->lock, flags);
250
-
if (!dma_fence_is_signaled_locked(&fence->base)) {
251
-
dma_fence_set_error(&fence->base, -ECANCELED);
252
-
if (nouveau_fence_signal(fence))
253
-
nvif_event_block(&fctx->event);
254
-
}
255
-
spin_unlock_irqrestore(&fctx->lock, flags);
256
-
}
257
-
258
243
bool
259
244
nouveau_fence_done(struct nouveau_fence *fence)
260
245
{
-1
drivers/gpu/drm/nouveau/nouveau_fence.h
-1
drivers/gpu/drm/nouveau/nouveau_fence.h
···
29
29
30
30
int nouveau_fence_emit(struct nouveau_fence *);
31
31
bool nouveau_fence_done(struct nouveau_fence *);
32
-
void nouveau_fence_cancel(struct nouveau_fence *fence);
33
32
int nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr);
34
33
int nouveau_fence_sync(struct nouveau_bo *, struct nouveau_channel *, bool exclusive, bool intr);
35
34
+14
-21
drivers/gpu/drm/nouveau/nouveau_sched.c
+14
-21
drivers/gpu/drm/nouveau/nouveau_sched.c
···
11
11
#include "nouveau_exec.h"
12
12
#include "nouveau_abi16.h"
13
13
#include "nouveau_sched.h"
14
-
#include "nouveau_chan.h"
15
14
16
15
#define NOUVEAU_SCHED_JOB_TIMEOUT_MS 10000
17
16
···
121
122
{
122
123
struct nouveau_sched *sched = job->sched;
123
124
124
-
spin_lock(&sched->job_list.lock);
125
+
spin_lock(&sched->job.list.lock);
125
126
list_del(&job->entry);
126
-
spin_unlock(&sched->job_list.lock);
127
+
spin_unlock(&sched->job.list.lock);
128
+
129
+
wake_up(&sched->job.wq);
127
130
}
128
131
129
132
void
···
306
305
}
307
306
308
307
/* Submit was successful; add the job to the schedulers job list. */
309
-
spin_lock(&sched->job_list.lock);
310
-
list_add(&job->entry, &sched->job_list.head);
311
-
spin_unlock(&sched->job_list.lock);
308
+
spin_lock(&sched->job.list.lock);
309
+
list_add(&job->entry, &sched->job.list.head);
310
+
spin_unlock(&sched->job.list.lock);
312
311
313
312
drm_sched_job_arm(&job->base);
314
313
job->done_fence = dma_fence_get(&job->base.s_fence->finished);
···
393
392
nouveau_job_fini(job);
394
393
}
395
394
396
-
static void
397
-
nouveau_sched_cancel_job(struct drm_sched_job *sched_job)
398
-
{
399
-
struct nouveau_fence *fence;
400
-
struct nouveau_job *job;
401
-
402
-
job = to_nouveau_job(sched_job);
403
-
fence = to_nouveau_fence(job->done_fence);
404
-
405
-
nouveau_fence_cancel(fence);
406
-
}
407
-
408
395
static const struct drm_sched_backend_ops nouveau_sched_ops = {
409
396
.run_job = nouveau_sched_run_job,
410
397
.timedout_job = nouveau_sched_timedout_job,
411
398
.free_job = nouveau_sched_free_job,
412
-
.cancel_job = nouveau_sched_cancel_job,
413
399
};
414
400
415
401
static int
···
446
458
goto fail_sched;
447
459
448
460
mutex_init(&sched->mutex);
449
-
spin_lock_init(&sched->job_list.lock);
450
-
INIT_LIST_HEAD(&sched->job_list.head);
461
+
spin_lock_init(&sched->job.list.lock);
462
+
INIT_LIST_HEAD(&sched->job.list.head);
463
+
init_waitqueue_head(&sched->job.wq);
451
464
452
465
return 0;
453
466
···
482
493
return 0;
483
494
}
484
495
496
+
485
497
static void
486
498
nouveau_sched_fini(struct nouveau_sched *sched)
487
499
{
488
500
struct drm_gpu_scheduler *drm_sched = &sched->base;
489
501
struct drm_sched_entity *entity = &sched->entity;
502
+
503
+
rmb(); /* for list_empty to work without lock */
504
+
wait_event(sched->job.wq, list_empty(&sched->job.list.head));
490
505
491
506
drm_sched_entity_fini(entity);
492
507
drm_sched_fini(drm_sched);
+6
-3
drivers/gpu/drm/nouveau/nouveau_sched.h
+6
-3
drivers/gpu/drm/nouveau/nouveau_sched.h
···
103
103
struct mutex mutex;
104
104
105
105
struct {
106
-
struct list_head head;
107
-
spinlock_t lock;
108
-
} job_list;
106
+
struct {
107
+
struct list_head head;
108
+
spinlock_t lock;
109
+
} list;
110
+
struct wait_queue_head wq;
111
+
} job;
109
112
};
110
113
111
114
int nouveau_sched_create(struct nouveau_sched **psched, struct nouveau_drm *drm,
+4
-4
drivers/gpu/drm/nouveau/nouveau_uvmm.c
+4
-4
drivers/gpu/drm/nouveau/nouveau_uvmm.c
···
1019
1019
u64 end = addr + range;
1020
1020
1021
1021
again:
1022
-
spin_lock(&sched->job_list.lock);
1023
-
list_for_each_entry(__job, &sched->job_list.head, entry) {
1022
+
spin_lock(&sched->job.list.lock);
1023
+
list_for_each_entry(__job, &sched->job.list.head, entry) {
1024
1024
struct nouveau_uvmm_bind_job *bind_job = to_uvmm_bind_job(__job);
1025
1025
1026
1026
list_for_each_op(op, &bind_job->ops) {
···
1030
1030
1031
1031
if (!(end <= op_addr || addr >= op_end)) {
1032
1032
nouveau_uvmm_bind_job_get(bind_job);
1033
-
spin_unlock(&sched->job_list.lock);
1033
+
spin_unlock(&sched->job.list.lock);
1034
1034
wait_for_completion(&bind_job->complete);
1035
1035
nouveau_uvmm_bind_job_put(bind_job);
1036
1036
goto again;
···
1038
1038
}
1039
1039
}
1040
1040
}
1041
-
spin_unlock(&sched->job_list.lock);
1041
+
spin_unlock(&sched->job.list.lock);
1042
1042
}
1043
1043
1044
1044
static int
+1
-1
drivers/gpu/drm/panthor/panthor_drv.c
+1
-1
drivers/gpu/drm/panthor/panthor_drv.c
+1
-1
drivers/gpu/drm/xe/tests/xe_bo.c
+1
-1
drivers/gpu/drm/xe/tests/xe_bo.c
+1
-9
drivers/gpu/drm/xe/tests/xe_dma_buf.c
+1
-9
drivers/gpu/drm/xe/tests/xe_dma_buf.c
···
89
89
return;
90
90
}
91
91
92
-
/*
93
-
* If on different devices, the exporter is kept in system if
94
-
* possible, saving a migration step as the transfer is just
95
-
* likely as fast from system memory.
96
-
*/
97
-
if (params->mem_mask & XE_BO_FLAG_SYSTEM)
98
-
KUNIT_EXPECT_TRUE(test, xe_bo_is_mem_type(exported, XE_PL_TT));
99
-
else
100
-
KUNIT_EXPECT_TRUE(test, xe_bo_is_mem_type(exported, mem_type));
92
+
KUNIT_EXPECT_TRUE(test, xe_bo_is_mem_type(exported, mem_type));
101
93
102
94
if (params->force_different_devices)
103
95
KUNIT_EXPECT_TRUE(test, xe_bo_is_mem_type(imported, XE_PL_TT));
+12
-4
drivers/gpu/drm/xe/xe_bo.c
+12
-4
drivers/gpu/drm/xe/xe_bo.c
···
186
186
187
187
bo->placements[*c] = (struct ttm_place) {
188
188
.mem_type = XE_PL_TT,
189
+
.flags = (bo_flags & XE_BO_FLAG_VRAM_MASK) ?
190
+
TTM_PL_FLAG_FALLBACK : 0,
189
191
};
190
192
*c += 1;
191
193
}
···
2271
2269
/**
2272
2270
* xe_bo_pin_external - pin an external BO
2273
2271
* @bo: buffer object to be pinned
2272
+
* @in_place: Pin in current placement, don't attempt to migrate.
2274
2273
*
2275
2274
* Pin an external (not tied to a VM, can be exported via dma-buf / prime FD)
2276
2275
* BO. Unique call compared to xe_bo_pin as this function has it own set of
···
2279
2276
*
2280
2277
* Returns 0 for success, negative error code otherwise.
2281
2278
*/
2282
-
int xe_bo_pin_external(struct xe_bo *bo)
2279
+
int xe_bo_pin_external(struct xe_bo *bo, bool in_place)
2283
2280
{
2284
2281
struct xe_device *xe = xe_bo_device(bo);
2285
2282
int err;
···
2288
2285
xe_assert(xe, xe_bo_is_user(bo));
2289
2286
2290
2287
if (!xe_bo_is_pinned(bo)) {
2291
-
err = xe_bo_validate(bo, NULL, false);
2292
-
if (err)
2293
-
return err;
2288
+
if (!in_place) {
2289
+
err = xe_bo_validate(bo, NULL, false);
2290
+
if (err)
2291
+
return err;
2292
+
}
2294
2293
2295
2294
spin_lock(&xe->pinned.lock);
2296
2295
list_add_tail(&bo->pinned_link, &xe->pinned.late.external);
···
2444
2439
.gfp_retry_mayfail = true,
2445
2440
};
2446
2441
int ret;
2442
+
2443
+
if (xe_bo_is_pinned(bo))
2444
+
return 0;
2447
2445
2448
2446
if (vm) {
2449
2447
lockdep_assert_held(&vm->lock);
+1
-1
drivers/gpu/drm/xe/xe_bo.h
+1
-1
drivers/gpu/drm/xe/xe_bo.h
+6
drivers/gpu/drm/xe/xe_device_types.h
+6
drivers/gpu/drm/xe/xe_device_types.h
···
553
553
554
554
/** @pm_notifier: Our PM notifier to perform actions in response to various PM events. */
555
555
struct notifier_block pm_notifier;
556
+
/** @pm_block: Completion to block validating tasks on suspend / hibernate prepare */
557
+
struct completion pm_block;
558
+
/** @rebind_resume_list: List of wq items to kick on resume. */
559
+
struct list_head rebind_resume_list;
560
+
/** @rebind_resume_lock: Lock to protect the rebind_resume_list */
561
+
struct mutex rebind_resume_lock;
556
562
557
563
/** @pmt: Support the PMT driver callback interface */
558
564
struct {
+1
-1
drivers/gpu/drm/xe/xe_dma_buf.c
+1
-1
drivers/gpu/drm/xe/xe_dma_buf.c
+9
drivers/gpu/drm/xe/xe_exec.c
+9
drivers/gpu/drm/xe/xe_exec.c
···
237
237
goto err_unlock_list;
238
238
}
239
239
240
+
/*
241
+
* It's OK to block interruptible here with the vm lock held, since
242
+
* on task freezing during suspend / hibernate, the call will
243
+
* return -ERESTARTSYS and the IOCTL will be rerun.
244
+
*/
245
+
err = wait_for_completion_interruptible(&xe->pm_block);
246
+
if (err)
247
+
goto err_unlock_list;
248
+
240
249
vm_exec.vm = &vm->gpuvm;
241
250
vm_exec.flags = DRM_EXEC_INTERRUPTIBLE_WAIT;
242
251
if (xe_vm_in_lr_mode(vm)) {
+32
-10
drivers/gpu/drm/xe/xe_pm.c
+32
-10
drivers/gpu/drm/xe/xe_pm.c
···
24
24
#include "xe_pcode.h"
25
25
#include "xe_pxp.h"
26
26
#include "xe_trace.h"
27
+
#include "xe_vm.h"
27
28
#include "xe_wa.h"
28
29
29
30
/**
···
291
290
return DEFAULT_VRAM_THRESHOLD;
292
291
}
293
292
293
+
static void xe_pm_wake_rebind_workers(struct xe_device *xe)
294
+
{
295
+
struct xe_vm *vm, *next;
296
+
297
+
mutex_lock(&xe->rebind_resume_lock);
298
+
list_for_each_entry_safe(vm, next, &xe->rebind_resume_list,
299
+
preempt.pm_activate_link) {
300
+
list_del_init(&vm->preempt.pm_activate_link);
301
+
xe_vm_resume_rebind_worker(vm);
302
+
}
303
+
mutex_unlock(&xe->rebind_resume_lock);
304
+
}
305
+
294
306
static int xe_pm_notifier_callback(struct notifier_block *nb,
295
307
unsigned long action, void *data)
296
308
{
···
313
299
switch (action) {
314
300
case PM_HIBERNATION_PREPARE:
315
301
case PM_SUSPEND_PREPARE:
302
+
reinit_completion(&xe->pm_block);
316
303
xe_pm_runtime_get(xe);
317
304
err = xe_bo_evict_all_user(xe);
318
-
if (err) {
305
+
if (err)
319
306
drm_dbg(&xe->drm, "Notifier evict user failed (%d)\n", err);
320
-
xe_pm_runtime_put(xe);
321
-
break;
322
-
}
323
307
324
308
err = xe_bo_notifier_prepare_all_pinned(xe);
325
-
if (err) {
309
+
if (err)
326
310
drm_dbg(&xe->drm, "Notifier prepare pin failed (%d)\n", err);
327
-
xe_pm_runtime_put(xe);
328
-
}
311
+
/*
312
+
* Keep the runtime pm reference until post hibernation / post suspend to
313
+
* avoid a runtime suspend interfering with evicted objects or backup
314
+
* allocations.
315
+
*/
329
316
break;
330
317
case PM_POST_HIBERNATION:
331
318
case PM_POST_SUSPEND:
319
+
complete_all(&xe->pm_block);
320
+
xe_pm_wake_rebind_workers(xe);
332
321
xe_bo_notifier_unprepare_all_pinned(xe);
333
322
xe_pm_runtime_put(xe);
334
323
break;
335
324
}
336
-
337
-
if (err)
338
-
return NOTIFY_BAD;
339
325
340
326
return NOTIFY_DONE;
341
327
}
···
357
343
err = register_pm_notifier(&xe->pm_notifier);
358
344
if (err)
359
345
return err;
346
+
347
+
err = drmm_mutex_init(&xe->drm, &xe->rebind_resume_lock);
348
+
if (err)
349
+
goto err_unregister;
350
+
351
+
init_completion(&xe->pm_block);
352
+
complete_all(&xe->pm_block);
353
+
INIT_LIST_HEAD(&xe->rebind_resume_list);
360
354
361
355
/* For now suspend/resume is only allowed with GuC */
362
356
if (!xe_device_uc_enabled(xe))
+2
-1
drivers/gpu/drm/xe/xe_survivability_mode.c
+2
-1
drivers/gpu/drm/xe/xe_survivability_mode.c
···
41
41
*
42
42
* # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
43
43
*
44
+
* It is the responsibility of the user to clear the mode once firmware flash is complete.
45
+
*
44
46
* Refer :ref:`xe_configfs` for more details on how to use configfs
45
47
*
46
48
* Survivability mode is indicated by the below admin-only readable sysfs which provides additional
···
149
147
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
150
148
struct device *dev = &pdev->dev;
151
149
152
-
xe_configfs_clear_survivability_mode(pdev);
153
150
sysfs_remove_file(&dev->kobj, &dev_attr_survivability_mode.attr);
154
151
}
155
152
+41
-1
drivers/gpu/drm/xe/xe_vm.c
+41
-1
drivers/gpu/drm/xe/xe_vm.c
···
393
393
list_move_tail(&gpuva_to_vma(gpuva)->combined_links.rebind,
394
394
&vm->rebind_list);
395
395
396
+
if (!try_wait_for_completion(&vm->xe->pm_block))
397
+
return -EAGAIN;
398
+
396
399
ret = xe_bo_validate(gem_to_xe_bo(vm_bo->obj), vm, false);
397
400
if (ret)
398
401
return ret;
···
482
479
return xe_vm_validate_rebind(vm, exec, vm->preempt.num_exec_queues);
483
480
}
484
481
482
+
static bool vm_suspend_rebind_worker(struct xe_vm *vm)
483
+
{
484
+
struct xe_device *xe = vm->xe;
485
+
bool ret = false;
486
+
487
+
mutex_lock(&xe->rebind_resume_lock);
488
+
if (!try_wait_for_completion(&vm->xe->pm_block)) {
489
+
ret = true;
490
+
list_move_tail(&vm->preempt.pm_activate_link, &xe->rebind_resume_list);
491
+
}
492
+
mutex_unlock(&xe->rebind_resume_lock);
493
+
494
+
return ret;
495
+
}
496
+
497
+
/**
498
+
* xe_vm_resume_rebind_worker() - Resume the rebind worker.
499
+
* @vm: The vm whose preempt worker to resume.
500
+
*
501
+
* Resume a preempt worker that was previously suspended by
502
+
* vm_suspend_rebind_worker().
503
+
*/
504
+
void xe_vm_resume_rebind_worker(struct xe_vm *vm)
505
+
{
506
+
queue_work(vm->xe->ordered_wq, &vm->preempt.rebind_work);
507
+
}
508
+
485
509
static void preempt_rebind_work_func(struct work_struct *w)
486
510
{
487
511
struct xe_vm *vm = container_of(w, struct xe_vm, preempt.rebind_work);
···
532
502
}
533
503
534
504
retry:
505
+
if (!try_wait_for_completion(&vm->xe->pm_block) && vm_suspend_rebind_worker(vm)) {
506
+
up_write(&vm->lock);
507
+
return;
508
+
}
509
+
535
510
if (xe_vm_userptr_check_repin(vm)) {
536
511
err = xe_vm_userptr_pin(vm);
537
512
if (err)
···
1749
1714
if (flags & XE_VM_FLAG_LR_MODE) {
1750
1715
INIT_WORK(&vm->preempt.rebind_work, preempt_rebind_work_func);
1751
1716
xe_pm_runtime_get_noresume(xe);
1717
+
INIT_LIST_HEAD(&vm->preempt.pm_activate_link);
1752
1718
}
1753
1719
1754
1720
if (flags & XE_VM_FLAG_FAULT_MODE) {
···
1931
1895
xe_assert(xe, !vm->preempt.num_exec_queues);
1932
1896
1933
1897
xe_vm_close(vm);
1934
-
if (xe_vm_in_preempt_fence_mode(vm))
1898
+
if (xe_vm_in_preempt_fence_mode(vm)) {
1899
+
mutex_lock(&xe->rebind_resume_lock);
1900
+
list_del_init(&vm->preempt.pm_activate_link);
1901
+
mutex_unlock(&xe->rebind_resume_lock);
1935
1902
flush_work(&vm->preempt.rebind_work);
1903
+
}
1936
1904
if (xe_vm_in_fault_mode(vm))
1937
1905
xe_svm_close(vm);
1938
1906
+2
drivers/gpu/drm/xe/xe_vm.h
+2
drivers/gpu/drm/xe/xe_vm.h
+5
drivers/gpu/drm/xe/xe_vm_types.h
+5
drivers/gpu/drm/xe/xe_vm_types.h
+2
-1
drivers/gpu/drm/xe/xe_wa_oob.rules
+2
-1
drivers/gpu/drm/xe/xe_wa_oob.rules
···
30
30
16022287689 GRAPHICS_VERSION(2001)
31
31
GRAPHICS_VERSION(2004)
32
32
13011645652 GRAPHICS_VERSION(2004)
33
-
GRAPHICS_VERSION(3001)
33
+
GRAPHICS_VERSION_RANGE(3000, 3001)
34
+
GRAPHICS_VERSION(3003)
34
35
14022293748 GRAPHICS_VERSION_RANGE(2001, 2002)
35
36
GRAPHICS_VERSION(2004)
36
37
GRAPHICS_VERSION_RANGE(3000, 3001)
+1
drivers/gpu/nova-core/Kconfig
+1
drivers/gpu/nova-core/Kconfig
+2
drivers/input/joystick/xpad.c
+2
drivers/input/joystick/xpad.c
···
422
422
{ 0x3537, 0x1010, "GameSir G7 SE", 0, XTYPE_XBOXONE },
423
423
{ 0x366c, 0x0005, "ByoWave Proteus Controller", MAP_SHARE_BUTTON, XTYPE_XBOXONE, FLAG_DELAY_INIT },
424
424
{ 0x3767, 0x0101, "Fanatec Speedster 3 Forceshock Wheel", 0, XTYPE_XBOX },
425
+
{ 0x37d7, 0x2501, "Flydigi Apex 5", 0, XTYPE_XBOX360 },
425
426
{ 0x413d, 0x2104, "Black Shark Green Ghost Gamepad", 0, XTYPE_XBOX360 },
426
427
{ 0xffff, 0xffff, "Chinese-made Xbox Controller", 0, XTYPE_XBOX },
427
428
{ 0x0000, 0x0000, "Generic X-Box pad", 0, XTYPE_UNKNOWN }
···
579
578
XPAD_XBOX360_VENDOR(0x3537), /* GameSir Controllers */
580
579
XPAD_XBOXONE_VENDOR(0x3537), /* GameSir Controllers */
581
580
XPAD_XBOXONE_VENDOR(0x366c), /* ByoWave controllers */
581
+
XPAD_XBOX360_VENDOR(0x37d7), /* Flydigi Controllers */
582
582
XPAD_XBOX360_VENDOR(0x413d), /* Black Shark Green Ghost Controller */
583
583
{ }
584
584
};
+4
-1
drivers/input/keyboard/mtk-pmic-keys.c
+4
-1
drivers/input/keyboard/mtk-pmic-keys.c
···
55
55
const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
56
56
u32 pmic_rst_reg;
57
57
u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
58
+
bool key_release_irq;
58
59
};
59
60
60
61
static const struct mtk_pmic_regs mt6397_regs = {
···
117
116
MTK_PMIC_HOMEKEY_RST),
118
117
.pmic_rst_reg = MT6358_TOP_RST_MISC,
119
118
.rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
119
+
.key_release_irq = true,
120
120
};
121
121
122
122
static const struct mtk_pmic_regs mt6359_regs = {
···
131
129
MTK_PMIC_HOMEKEY_RST),
132
130
.pmic_rst_reg = MT6359_TOP_RST_MISC,
133
131
.rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
132
+
.key_release_irq = true,
134
133
};
135
134
136
135
struct mtk_pmic_keys_info {
···
371
368
if (keys->keys[index].irq < 0)
372
369
return keys->keys[index].irq;
373
370
374
-
if (of_device_is_compatible(node, "mediatek,mt6358-keys")) {
371
+
if (mtk_pmic_regs->key_release_irq) {
375
372
keys->keys[index].irq_r = platform_get_irq_byname(pdev,
376
373
irqnames_r[index]);
377
374
+3
drivers/input/misc/iqs7222.c
+3
drivers/input/misc/iqs7222.c
+14
drivers/input/serio/i8042-acpipnpio.h
+14
drivers/input/serio/i8042-acpipnpio.h
···
1155
1155
.driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS |
1156
1156
SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP)
1157
1157
},
1158
+
{
1159
+
.matches = {
1160
+
DMI_MATCH(DMI_BOARD_NAME, "XxHP4NAx"),
1161
+
},
1162
+
.driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS |
1163
+
SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP)
1164
+
},
1165
+
{
1166
+
.matches = {
1167
+
DMI_MATCH(DMI_BOARD_NAME, "XxKK4NAx_XxSP4NAx"),
1168
+
},
1169
+
.driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS |
1170
+
SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP)
1171
+
},
1158
1172
/*
1159
1173
* A lot of modern Clevo barebones have touchpad and/or keyboard issues
1160
1174
* after suspend fixable with the forcenorestore quirk.
+2
-2
drivers/mtd/devices/Kconfig
+2
-2
drivers/mtd/devices/Kconfig
···
185
185
186
186
config MTD_INTEL_DG
187
187
tristate "Intel Discrete Graphics non-volatile memory driver"
188
-
depends on AUXILIARY_BUS
189
-
depends on MTD
188
+
depends on AUXILIARY_BUS && MTD
189
+
depends on DRM_I915!=n || DRM_XE!=n || COMPILE_TEST
190
190
help
191
191
This provides an MTD device to access Intel Discrete Graphics
192
192
non-volatile memory.
+13
-3
drivers/mtd/nand/raw/atmel/nand-controller.c
+13
-3
drivers/mtd/nand/raw/atmel/nand-controller.c
···
1378
1378
return ret;
1379
1379
1380
1380
/*
1381
+
* Read setup timing depends on the operation done on the NAND:
1382
+
*
1383
+
* NRD_SETUP = max(tAR, tCLR)
1384
+
*/
1385
+
timeps = max(conf->timings.sdr.tAR_min, conf->timings.sdr.tCLR_min);
1386
+
ncycles = DIV_ROUND_UP(timeps, mckperiodps);
1387
+
totalcycles += ncycles;
1388
+
ret = atmel_smc_cs_conf_set_setup(smcconf, ATMEL_SMC_NRD_SHIFT, ncycles);
1389
+
if (ret)
1390
+
return ret;
1391
+
1392
+
/*
1381
1393
* The read cycle timing is directly matching tRC, but is also
1382
1394
* dependent on the setup and hold timings we calculated earlier,
1383
1395
* which gives:
1384
1396
*
1385
-
* NRD_CYCLE = max(tRC, NRD_PULSE + NRD_HOLD)
1386
-
*
1387
-
* NRD_SETUP is always 0.
1397
+
* NRD_CYCLE = max(tRC, NRD_SETUP + NRD_PULSE + NRD_HOLD)
1388
1398
*/
1389
1399
ncycles = DIV_ROUND_UP(conf->timings.sdr.tRC_min, mckperiodps);
1390
1400
ncycles = max(totalcycles, ncycles);
+2
-2
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
+2
-2
drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c
···
935
935
936
936
static int ma35_nand_chips_init(struct device *dev, struct ma35_nand_info *nand)
937
937
{
938
-
struct device_node *np = dev->of_node, *nand_np;
938
+
struct device_node *np = dev->of_node;
939
939
int ret;
940
940
941
-
for_each_child_of_node(np, nand_np) {
941
+
for_each_child_of_node_scoped(np, nand_np) {
942
942
ret = ma35_nand_chip_init(dev, nand, nand_np);
943
943
if (ret) {
944
944
ma35_chips_cleanup(nand);
+24
-22
drivers/mtd/nand/raw/stm32_fmc2_nand.c
+24
-22
drivers/mtd/nand/raw/stm32_fmc2_nand.c
···
272
272
struct sg_table dma_data_sg;
273
273
struct sg_table dma_ecc_sg;
274
274
u8 *ecc_buf;
275
+
dma_addr_t dma_ecc_addr;
275
276
int dma_ecc_len;
276
277
u32 tx_dma_max_burst;
277
278
u32 rx_dma_max_burst;
···
903
902
904
903
if (!write_data && !raw) {
905
904
/* Configure DMA ECC status */
906
-
p = nfc->ecc_buf;
907
905
for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) {
908
-
sg_set_buf(sg, p, nfc->dma_ecc_len);
909
-
p += nfc->dma_ecc_len;
910
-
}
911
-
912
-
ret = dma_map_sg(nfc->dev, nfc->dma_ecc_sg.sgl,
913
-
eccsteps, dma_data_dir);
914
-
if (!ret) {
915
-
ret = -EIO;
916
-
goto err_unmap_data;
906
+
sg_dma_address(sg) = nfc->dma_ecc_addr +
907
+
s * nfc->dma_ecc_len;
908
+
sg_dma_len(sg) = nfc->dma_ecc_len;
917
909
}
918
910
919
911
desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch,
···
915
921
DMA_PREP_INTERRUPT);
916
922
if (!desc_ecc) {
917
923
ret = -ENOMEM;
918
-
goto err_unmap_ecc;
924
+
goto err_unmap_data;
919
925
}
920
926
921
927
reinit_completion(&nfc->dma_ecc_complete);
···
923
929
desc_ecc->callback_param = &nfc->dma_ecc_complete;
924
930
ret = dma_submit_error(dmaengine_submit(desc_ecc));
925
931
if (ret)
926
-
goto err_unmap_ecc;
932
+
goto err_unmap_data;
927
933
928
934
dma_async_issue_pending(nfc->dma_ecc_ch);
929
935
}
···
943
949
if (!write_data && !raw)
944
950
dmaengine_terminate_all(nfc->dma_ecc_ch);
945
951
ret = -ETIMEDOUT;
946
-
goto err_unmap_ecc;
952
+
goto err_unmap_data;
947
953
}
948
954
949
955
/* Wait DMA data transfer completion */
···
962
968
ret = -ETIMEDOUT;
963
969
}
964
970
}
965
-
966
-
err_unmap_ecc:
967
-
if (!write_data && !raw)
968
-
dma_unmap_sg(nfc->dev, nfc->dma_ecc_sg.sgl,
969
-
eccsteps, dma_data_dir);
970
971
971
972
err_unmap_data:
972
973
dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir);
···
985
996
986
997
/* Write oob */
987
998
if (oob_required) {
988
-
ret = nand_change_write_column_op(chip, mtd->writesize,
989
-
chip->oob_poi, mtd->oobsize,
990
-
false);
999
+
unsigned int offset_in_page = mtd->writesize;
1000
+
const void *buf = chip->oob_poi;
1001
+
unsigned int len = mtd->oobsize;
1002
+
1003
+
if (!raw) {
1004
+
struct mtd_oob_region oob_free;
1005
+
1006
+
mtd_ooblayout_free(mtd, 0, &oob_free);
1007
+
offset_in_page += oob_free.offset;
1008
+
buf += oob_free.offset;
1009
+
len = oob_free.length;
1010
+
}
1011
+
1012
+
ret = nand_change_write_column_op(chip, offset_in_page,
1013
+
buf, len, false);
991
1014
if (ret)
992
1015
return ret;
993
1016
}
···
1611
1610
return ret;
1612
1611
1613
1612
/* Allocate a buffer to store ECC status registers */
1614
-
nfc->ecc_buf = devm_kzalloc(nfc->dev, FMC2_MAX_ECC_BUF_LEN, GFP_KERNEL);
1613
+
nfc->ecc_buf = dmam_alloc_coherent(nfc->dev, FMC2_MAX_ECC_BUF_LEN,
1614
+
&nfc->dma_ecc_addr, GFP_KERNEL);
1615
1615
if (!nfc->ecc_buf)
1616
1616
return -ENOMEM;
1617
1617
+36
-1
drivers/mtd/nand/spi/winbond.c
+36
-1
drivers/mtd/nand/spi/winbond.c
···
176
176
.free = w25n02kv_ooblayout_free,
177
177
};
178
178
179
+
static int w25n01jw_ooblayout_ecc(struct mtd_info *mtd, int section,
180
+
struct mtd_oob_region *region)
181
+
{
182
+
if (section > 3)
183
+
return -ERANGE;
184
+
185
+
region->offset = (16 * section) + 12;
186
+
region->length = 4;
187
+
188
+
return 0;
189
+
}
190
+
191
+
static int w25n01jw_ooblayout_free(struct mtd_info *mtd, int section,
192
+
struct mtd_oob_region *region)
193
+
{
194
+
if (section > 3)
195
+
return -ERANGE;
196
+
197
+
region->offset = (16 * section);
198
+
region->length = 12;
199
+
200
+
/* Extract BBM */
201
+
if (!section) {
202
+
region->offset += 2;
203
+
region->length -= 2;
204
+
}
205
+
206
+
return 0;
207
+
}
208
+
179
209
static int w35n01jw_ooblayout_ecc(struct mtd_info *mtd, int section,
180
210
struct mtd_oob_region *region)
181
211
{
···
235
205
236
206
return 0;
237
207
}
208
+
209
+
static const struct mtd_ooblayout_ops w25n01jw_ooblayout = {
210
+
.ecc = w25n01jw_ooblayout_ecc,
211
+
.free = w25n01jw_ooblayout_free,
212
+
};
238
213
239
214
static const struct mtd_ooblayout_ops w35n01jw_ooblayout = {
240
215
.ecc = w35n01jw_ooblayout_ecc,
···
429
394
&write_cache_variants,
430
395
&update_cache_variants),
431
396
0,
432
-
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
397
+
SPINAND_ECCINFO(&w25n01jw_ooblayout, NULL),
433
398
SPINAND_CONFIGURE_CHIP(w25n0xjw_hs_cfg)),
434
399
SPINAND_INFO("W25N01KV", /* 3.3V */
435
400
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
+1
-7
drivers/net/can/rcar/rcar_can.c
+1
-7
drivers/net/can/rcar/rcar_can.c
···
861
861
{
862
862
struct net_device *ndev = dev_get_drvdata(dev);
863
863
struct rcar_can_priv *priv = netdev_priv(ndev);
864
-
u16 ctlr;
865
864
int err;
866
865
867
866
if (!netif_running(ndev))
···
872
873
return err;
873
874
}
874
875
875
-
ctlr = readw(&priv->regs->ctlr);
876
-
ctlr &= ~RCAR_CAN_CTLR_SLPM;
877
-
writew(ctlr, &priv->regs->ctlr);
878
-
ctlr &= ~RCAR_CAN_CTLR_CANM;
879
-
writew(ctlr, &priv->regs->ctlr);
880
-
priv->can.state = CAN_STATE_ERROR_ACTIVE;
876
+
rcar_can_start(ndev);
881
877
882
878
netif_device_attach(ndev);
883
879
netif_start_queue(ndev);
+8
-8
drivers/net/can/xilinx_can.c
+8
-8
drivers/net/can/xilinx_can.c
···
690
690
dlc |= XCAN_DLCR_EDL_MASK;
691
691
}
692
692
693
-
if (!(priv->devtype.flags & XCAN_FLAG_TX_MAILBOXES) &&
694
-
(priv->devtype.flags & XCAN_FLAG_TXFEMP))
695
-
can_put_echo_skb(skb, ndev, priv->tx_head % priv->tx_max, 0);
696
-
else
697
-
can_put_echo_skb(skb, ndev, 0, 0);
698
-
699
-
priv->tx_head++;
700
-
701
693
priv->write_reg(priv, XCAN_FRAME_ID_OFFSET(frame_offset), id);
702
694
/* If the CAN frame is RTR frame this write triggers transmission
703
695
* (not on CAN FD)
···
722
730
data[1]);
723
731
}
724
732
}
733
+
734
+
if (!(priv->devtype.flags & XCAN_FLAG_TX_MAILBOXES) &&
735
+
(priv->devtype.flags & XCAN_FLAG_TXFEMP))
736
+
can_put_echo_skb(skb, ndev, priv->tx_head % priv->tx_max, 0);
737
+
else
738
+
can_put_echo_skb(skb, ndev, 0, 0);
739
+
740
+
priv->tx_head++;
725
741
}
726
742
727
743
/**
+13
-4
drivers/net/dsa/b53/b53_common.c
+13
-4
drivers/net/dsa/b53/b53_common.c
···
1273
1273
*/
1274
1274
ds->untag_vlan_aware_bridge_pvid = true;
1275
1275
1276
-
/* Ageing time is set in seconds */
1277
-
ds->ageing_time_min = 1 * 1000;
1278
-
ds->ageing_time_max = AGE_TIME_MAX * 1000;
1276
+
if (dev->chip_id == BCM53101_DEVICE_ID) {
1277
+
/* BCM53101 uses 0.5 second increments */
1278
+
ds->ageing_time_min = 1 * 500;
1279
+
ds->ageing_time_max = AGE_TIME_MAX * 500;
1280
+
} else {
1281
+
/* Everything else uses 1 second increments */
1282
+
ds->ageing_time_min = 1 * 1000;
1283
+
ds->ageing_time_max = AGE_TIME_MAX * 1000;
1284
+
}
1279
1285
1280
1286
ret = b53_reset_switch(dev);
1281
1287
if (ret) {
···
2565
2559
else
2566
2560
reg = B53_AGING_TIME_CONTROL;
2567
2561
2568
-
atc = DIV_ROUND_CLOSEST(msecs, 1000);
2562
+
if (dev->chip_id == BCM53101_DEVICE_ID)
2563
+
atc = DIV_ROUND_CLOSEST(msecs, 500);
2564
+
else
2565
+
atc = DIV_ROUND_CLOSEST(msecs, 1000);
2569
2566
2570
2567
if (!is5325(dev) && !is5365(dev))
2571
2568
atc |= AGE_CHANGE;
+2
-1
drivers/net/ethernet/freescale/fec_main.c
+2
-1
drivers/net/ethernet/freescale/fec_main.c
+1
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+1
drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h
+34
drivers/net/ethernet/intel/i40e/i40e_common.c
+34
drivers/net/ethernet/intel/i40e/i40e_common.c
···
1190
1190
}
1191
1191
1192
1192
/**
1193
+
* i40e_aq_set_mac_config - Configure MAC settings
1194
+
* @hw: pointer to the hw struct
1195
+
* @max_frame_size: Maximum Frame Size to be supported by the port
1196
+
* @cmd_details: pointer to command details structure or NULL
1197
+
*
1198
+
* Set MAC configuration (0x0603). Note that max_frame_size must be greater
1199
+
* than zero.
1200
+
*
1201
+
* Return: 0 on success, or a negative error code on failure.
1202
+
*/
1203
+
int i40e_aq_set_mac_config(struct i40e_hw *hw, u16 max_frame_size,
1204
+
struct i40e_asq_cmd_details *cmd_details)
1205
+
{
1206
+
struct i40e_aq_set_mac_config *cmd;
1207
+
struct libie_aq_desc desc;
1208
+
1209
+
cmd = libie_aq_raw(&desc);
1210
+
1211
+
if (max_frame_size == 0)
1212
+
return -EINVAL;
1213
+
1214
+
i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_set_mac_config);
1215
+
1216
+
cmd->max_frame_size = cpu_to_le16(max_frame_size);
1217
+
cmd->params = I40E_AQ_SET_MAC_CONFIG_CRC_EN;
1218
+
1219
+
#define I40E_AQ_SET_MAC_CONFIG_FC_DEFAULT_THRESHOLD 0x7FFF
1220
+
cmd->fc_refresh_threshold =
1221
+
cpu_to_le16(I40E_AQ_SET_MAC_CONFIG_FC_DEFAULT_THRESHOLD);
1222
+
1223
+
return i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1224
+
}
1225
+
1226
+
/**
1193
1227
* i40e_aq_clear_pxe_mode
1194
1228
* @hw: pointer to the hw struct
1195
1229
* @cmd_details: pointer to command details structure or NULL
+11
-7
drivers/net/ethernet/intel/i40e/i40e_main.c
+11
-7
drivers/net/ethernet/intel/i40e/i40e_main.c
···
4156
4156
irq_num = pf->msix_entries[base + vector].vector;
4157
4157
irq_set_affinity_notifier(irq_num, NULL);
4158
4158
irq_update_affinity_hint(irq_num, NULL);
4159
-
free_irq(irq_num, &vsi->q_vectors[vector]);
4159
+
free_irq(irq_num, vsi->q_vectors[vector]);
4160
4160
}
4161
4161
return err;
4162
4162
}
···
16045
16045
dev_dbg(&pf->pdev->dev, "get supported phy types ret = %pe last_status = %s\n",
16046
16046
ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
16047
16047
16048
-
/* make sure the MFS hasn't been set lower than the default */
16049
16048
#define MAX_FRAME_SIZE_DEFAULT 0x2600
16050
-
val = FIELD_GET(I40E_PRTGL_SAH_MFS_MASK,
16051
-
rd32(&pf->hw, I40E_PRTGL_SAH));
16052
-
if (val < MAX_FRAME_SIZE_DEFAULT)
16053
-
dev_warn(&pdev->dev, "MFS for port %x (%d) has been set below the default (%d)\n",
16054
-
pf->hw.port, val, MAX_FRAME_SIZE_DEFAULT);
16049
+
16050
+
err = i40e_aq_set_mac_config(hw, MAX_FRAME_SIZE_DEFAULT, NULL);
16051
+
if (err)
16052
+
dev_warn(&pdev->dev, "set mac config ret = %pe last_status = %s\n",
16053
+
ERR_PTR(err), libie_aq_str(pf->hw.aq.asq_last_status));
16054
+
16055
+
/* Make sure the MFS is set to the expected value */
16056
+
val = rd32(hw, I40E_PRTGL_SAH);
16057
+
FIELD_MODIFY(I40E_PRTGL_SAH_MFS_MASK, &val, MAX_FRAME_SIZE_DEFAULT);
16058
+
wr32(hw, I40E_PRTGL_SAH, val);
16055
16059
16056
16060
/* Add a filter to drop all Flow control frames from any VSI from being
16057
16061
* transmitted. By doing so we stop a malicious VF from sending out
+2
drivers/net/ethernet/intel/i40e/i40e_prototype.h
+2
drivers/net/ethernet/intel/i40e/i40e_prototype.h
···
98
98
struct i40e_asq_cmd_details *cmd_details);
99
99
int i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask,
100
100
struct i40e_asq_cmd_details *cmd_details);
101
+
int i40e_aq_set_mac_config(struct i40e_hw *hw, u16 max_frame_size,
102
+
struct i40e_asq_cmd_details *cmd_details);
101
103
int i40e_aq_clear_pxe_mode(struct i40e_hw *hw,
102
104
struct i40e_asq_cmd_details *cmd_details);
103
105
int i40e_aq_set_link_restart_an(struct i40e_hw *hw,
+1
-4
drivers/net/ethernet/intel/igb/igb_ethtool.c
+1
-4
drivers/net/ethernet/intel/igb/igb_ethtool.c
···
2081
2081
} else {
2082
2082
dev_info(&adapter->pdev->dev, "online testing starting\n");
2083
2083
2084
-
/* PHY is powered down when interface is down */
2085
-
if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2084
+
if (igb_link_test(adapter, &data[TEST_LINK]))
2086
2085
eth_test->flags |= ETH_TEST_FL_FAILED;
2087
-
else
2088
-
data[TEST_LINK] = 0;
2089
2086
2090
2087
/* Online tests aren't run; pass by default */
2091
2088
data[TEST_REG] = 0;
+1
-2
drivers/net/ethernet/intel/igb/igb_main.c
+1
-2
drivers/net/ethernet/intel/igb/igb_main.c
···
4453
4453
if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4454
4454
xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4455
4455
res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4456
-
rx_ring->queue_index,
4457
-
rx_ring->q_vector->napi.napi_id);
4456
+
rx_ring->queue_index, 0);
4458
4457
if (res < 0) {
4459
4458
dev_err(dev, "Failed to register xdp_rxq index %u\n",
4460
4459
rx_ring->queue_index);
+14
-6
drivers/net/ethernet/ti/icssg/icssg_prueth.c
+14
-6
drivers/net/ethernet/ti/icssg/icssg_prueth.c
···
654
654
655
655
static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)
656
656
{
657
-
struct net_device *real_dev;
657
+
struct net_device *real_dev, *port_dev;
658
658
struct prueth_emac *emac;
659
659
u8 vlan_id, i;
660
660
···
663
663
664
664
if (is_hsr_master(real_dev)) {
665
665
for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
666
-
emac = netdev_priv(hsr_get_port_ndev(real_dev, i));
667
-
if (!emac)
666
+
port_dev = hsr_get_port_ndev(real_dev, i);
667
+
emac = netdev_priv(port_dev);
668
+
if (!emac) {
669
+
dev_put(port_dev);
668
670
return -EINVAL;
671
+
}
669
672
icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
670
673
true);
674
+
dev_put(port_dev);
671
675
}
672
676
} else {
673
677
emac = netdev_priv(real_dev);
···
683
679
684
680
static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)
685
681
{
686
-
struct net_device *real_dev;
682
+
struct net_device *real_dev, *port_dev;
687
683
struct prueth_emac *emac;
688
684
u8 vlan_id, i;
689
685
···
692
688
693
689
if (is_hsr_master(real_dev)) {
694
690
for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
695
-
emac = netdev_priv(hsr_get_port_ndev(real_dev, i));
696
-
if (!emac)
691
+
port_dev = hsr_get_port_ndev(real_dev, i);
692
+
emac = netdev_priv(port_dev);
693
+
if (!emac) {
694
+
dev_put(port_dev);
697
695
return -EINVAL;
696
+
}
698
697
icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
699
698
false);
699
+
dev_put(port_dev);
700
700
}
701
701
} else {
702
702
emac = netdev_priv(real_dev);
-4
drivers/net/ethernet/wangxun/libwx/wx_hw.c
-4
drivers/net/ethernet/wangxun/libwx/wx_hw.c
···
2078
2078
{
2079
2079
u32 rss_field = 0;
2080
2080
2081
-
/* VT, and RSS do not coexist at the same time */
2082
-
if (test_bit(WX_FLAG_VMDQ_ENABLED, wx->flags))
2083
-
return;
2084
-
2085
2081
/* Disable indicating checksum in descriptor, enables RSS hash */
2086
2082
wr32m(wx, WX_PSR_CTL, WX_PSR_CTL_PCSD, WX_PSR_CTL_PCSD);
2087
2083
+1
drivers/net/macsec.c
+1
drivers/net/macsec.c
+1
-1
drivers/net/phy/Kconfig
+1
-1
drivers/net/phy/Kconfig
+4
-8
drivers/net/phy/phy.c
+4
-8
drivers/net/phy/phy.c
···
1065
1065
*/
1066
1066
int phy_config_inband(struct phy_device *phydev, unsigned int modes)
1067
1067
{
1068
-
int err;
1068
+
lockdep_assert_held(&phydev->lock);
1069
1069
1070
1070
if (!!(modes & LINK_INBAND_DISABLE) +
1071
1071
!!(modes & LINK_INBAND_ENABLE) +
1072
1072
!!(modes & LINK_INBAND_BYPASS) != 1)
1073
1073
return -EINVAL;
1074
1074
1075
-
mutex_lock(&phydev->lock);
1076
1075
if (!phydev->drv)
1077
-
err = -EIO;
1076
+
return -EIO;
1078
1077
else if (!phydev->drv->config_inband)
1079
-
err = -EOPNOTSUPP;
1080
-
else
1081
-
err = phydev->drv->config_inband(phydev, modes);
1082
-
mutex_unlock(&phydev->lock);
1078
+
return -EOPNOTSUPP;
1083
1079
1084
-
return err;
1080
+
return phydev->drv->config_inband(phydev, modes);
1085
1081
}
1086
1082
EXPORT_SYMBOL(phy_config_inband);
1087
1083
+3
-2
drivers/net/phy/phy_device.c
+3
-2
drivers/net/phy/phy_device.c
···
287
287
if (phydev->phy_link_change == phy_link_change)
288
288
return phydev->attached_dev && phydev->adjust_link;
289
289
290
-
/* phydev->phy_link_change is implicitly phylink_phy_change() */
291
-
return true;
290
+
return !!phydev->phy_link_change;
292
291
}
293
292
294
293
static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
···
1863
1864
phydev->attached_dev = NULL;
1864
1865
phy_link_topo_del_phy(dev, phydev);
1865
1866
}
1867
+
1868
+
phydev->phy_link_change = NULL;
1866
1869
phydev->phylink = NULL;
1867
1870
1868
1871
if (!phydev->is_on_sfp_module)
+25
-3
drivers/net/phy/phylink.c
+25
-3
drivers/net/phy/phylink.c
···
67
67
struct timer_list link_poll;
68
68
69
69
struct mutex state_mutex;
70
+
/* Serialize updates to pl->phydev with phylink_resolve() */
71
+
struct mutex phydev_mutex;
70
72
struct phylink_link_state phy_state;
71
73
unsigned int phy_ib_mode;
72
74
struct work_struct resolve;
···
1434
1432
static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1435
1433
{
1436
1434
struct phylink_link_state link_state;
1435
+
struct phy_device *phy = pl->phydev;
1437
1436
1438
1437
switch (pl->req_link_an_mode) {
1439
1438
case MLO_AN_PHY:
···
1458
1455
link_state.link = false;
1459
1456
1460
1457
phylink_apply_manual_flow(pl, &link_state);
1458
+
if (phy)
1459
+
mutex_lock(&phy->lock);
1461
1460
phylink_major_config(pl, force_restart, &link_state);
1461
+
if (phy)
1462
+
mutex_unlock(&phy->lock);
1462
1463
}
1463
1464
1464
1465
static const char *phylink_pause_to_str(int pause)
···
1598
1591
struct phylink_link_state link_state;
1599
1592
bool mac_config = false;
1600
1593
bool retrigger = false;
1594
+
struct phy_device *phy;
1601
1595
bool cur_link_state;
1602
1596
1597
+
mutex_lock(&pl->phydev_mutex);
1598
+
phy = pl->phydev;
1599
+
if (phy)
1600
+
mutex_lock(&phy->lock);
1603
1601
mutex_lock(&pl->state_mutex);
1604
1602
cur_link_state = phylink_link_is_up(pl);
1605
1603
···
1638
1626
/* If we have a phy, the "up" state is the union of both the
1639
1627
* PHY and the MAC
1640
1628
*/
1641
-
if (pl->phydev)
1629
+
if (phy)
1642
1630
link_state.link &= pl->phy_state.link;
1643
1631
1644
1632
/* Only update if the PHY link is up */
1645
-
if (pl->phydev && pl->phy_state.link) {
1633
+
if (phy && pl->phy_state.link) {
1646
1634
/* If the interface has changed, force a link down
1647
1635
* event if the link isn't already down, and re-resolve.
1648
1636
*/
···
1706
1694
queue_work(system_power_efficient_wq, &pl->resolve);
1707
1695
}
1708
1696
mutex_unlock(&pl->state_mutex);
1697
+
if (phy)
1698
+
mutex_unlock(&phy->lock);
1699
+
mutex_unlock(&pl->phydev_mutex);
1709
1700
}
1710
1701
1711
1702
static void phylink_run_resolve(struct phylink *pl)
···
1844
1829
if (!pl)
1845
1830
return ERR_PTR(-ENOMEM);
1846
1831
1832
+
mutex_init(&pl->phydev_mutex);
1847
1833
mutex_init(&pl->state_mutex);
1848
1834
INIT_WORK(&pl->resolve, phylink_resolve);
1849
1835
···
2105
2089
dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2106
2090
kfree(irq_str);
2107
2091
2092
+
mutex_lock(&pl->phydev_mutex);
2108
2093
mutex_lock(&phy->lock);
2109
2094
mutex_lock(&pl->state_mutex);
2110
2095
pl->phydev = phy;
···
2151
2134
2152
2135
mutex_unlock(&pl->state_mutex);
2153
2136
mutex_unlock(&phy->lock);
2137
+
mutex_unlock(&pl->phydev_mutex);
2154
2138
2155
2139
phylink_dbg(pl,
2156
2140
"phy: %s setting supported %*pb advertising %*pb\n",
···
2330
2312
2331
2313
ASSERT_RTNL();
2332
2314
2315
+
mutex_lock(&pl->phydev_mutex);
2333
2316
phy = pl->phydev;
2334
2317
if (phy) {
2335
2318
mutex_lock(&phy->lock);
···
2340
2321
pl->mac_tx_clk_stop = false;
2341
2322
mutex_unlock(&pl->state_mutex);
2342
2323
mutex_unlock(&phy->lock);
2343
-
flush_work(&pl->resolve);
2324
+
}
2325
+
mutex_unlock(&pl->phydev_mutex);
2344
2326
2327
+
if (phy) {
2328
+
flush_work(&pl->resolve);
2345
2329
phy_disconnect(phy);
2346
2330
}
2347
2331
}
+67
-55
drivers/net/wireless/ath/ath12k/mac.c
+67
-55
drivers/net/wireless/ath/ath12k/mac.c
···
4078
4078
return ret;
4079
4079
}
4080
4080
4081
+
static void ath12k_mac_vif_setup_ps(struct ath12k_link_vif *arvif)
4082
+
{
4083
+
struct ath12k *ar = arvif->ar;
4084
+
struct ieee80211_vif *vif = arvif->ahvif->vif;
4085
+
struct ieee80211_conf *conf = &ath12k_ar_to_hw(ar)->conf;
4086
+
enum wmi_sta_powersave_param param;
4087
+
struct ieee80211_bss_conf *info;
4088
+
enum wmi_sta_ps_mode psmode;
4089
+
int ret;
4090
+
int timeout;
4091
+
bool enable_ps;
4092
+
4093
+
lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy);
4094
+
4095
+
if (vif->type != NL80211_IFTYPE_STATION)
4096
+
return;
4097
+
4098
+
enable_ps = arvif->ahvif->ps;
4099
+
if (enable_ps) {
4100
+
psmode = WMI_STA_PS_MODE_ENABLED;
4101
+
param = WMI_STA_PS_PARAM_INACTIVITY_TIME;
4102
+
4103
+
timeout = conf->dynamic_ps_timeout;
4104
+
if (timeout == 0) {
4105
+
info = ath12k_mac_get_link_bss_conf(arvif);
4106
+
if (!info) {
4107
+
ath12k_warn(ar->ab, "unable to access bss link conf in setup ps for vif %pM link %u\n",
4108
+
vif->addr, arvif->link_id);
4109
+
return;
4110
+
}
4111
+
4112
+
/* firmware doesn't like 0 */
4113
+
timeout = ieee80211_tu_to_usec(info->beacon_int) / 1000;
4114
+
}
4115
+
4116
+
ret = ath12k_wmi_set_sta_ps_param(ar, arvif->vdev_id, param,
4117
+
timeout);
4118
+
if (ret) {
4119
+
ath12k_warn(ar->ab, "failed to set inactivity time for vdev %d: %i\n",
4120
+
arvif->vdev_id, ret);
4121
+
return;
4122
+
}
4123
+
} else {
4124
+
psmode = WMI_STA_PS_MODE_DISABLED;
4125
+
}
4126
+
4127
+
ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac vdev %d psmode %s\n",
4128
+
arvif->vdev_id, psmode ? "enable" : "disable");
4129
+
4130
+
ret = ath12k_wmi_pdev_set_ps_mode(ar, arvif->vdev_id, psmode);
4131
+
if (ret)
4132
+
ath12k_warn(ar->ab, "failed to set sta power save mode %d for vdev %d: %d\n",
4133
+
psmode, arvif->vdev_id, ret);
4134
+
}
4135
+
4081
4136
static void ath12k_mac_op_vif_cfg_changed(struct ieee80211_hw *hw,
4082
4137
struct ieee80211_vif *vif,
4083
4138
u64 changed)
4084
4139
{
4085
4140
struct ath12k_vif *ahvif = ath12k_vif_to_ahvif(vif);
4086
4141
unsigned long links = ahvif->links_map;
4142
+
struct ieee80211_vif_cfg *vif_cfg;
4087
4143
struct ieee80211_bss_conf *info;
4088
4144
struct ath12k_link_vif *arvif;
4089
4145
struct ieee80211_sta *sta;
···
4203
4147
}
4204
4148
}
4205
4149
}
4206
-
}
4207
4150
4208
-
static void ath12k_mac_vif_setup_ps(struct ath12k_link_vif *arvif)
4209
-
{
4210
-
struct ath12k *ar = arvif->ar;
4211
-
struct ieee80211_vif *vif = arvif->ahvif->vif;
4212
-
struct ieee80211_conf *conf = &ath12k_ar_to_hw(ar)->conf;
4213
-
enum wmi_sta_powersave_param param;
4214
-
struct ieee80211_bss_conf *info;
4215
-
enum wmi_sta_ps_mode psmode;
4216
-
int ret;
4217
-
int timeout;
4218
-
bool enable_ps;
4151
+
if (changed & BSS_CHANGED_PS) {
4152
+
links = ahvif->links_map;
4153
+
vif_cfg = &vif->cfg;
4219
4154
4220
-
lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy);
4155
+
for_each_set_bit(link_id, &links, IEEE80211_MLD_MAX_NUM_LINKS) {
4156
+
arvif = wiphy_dereference(hw->wiphy, ahvif->link[link_id]);
4157
+
if (!arvif || !arvif->ar)
4158
+
continue;
4221
4159
4222
-
if (vif->type != NL80211_IFTYPE_STATION)
4223
-
return;
4160
+
ar = arvif->ar;
4224
4161
4225
-
enable_ps = arvif->ahvif->ps;
4226
-
if (enable_ps) {
4227
-
psmode = WMI_STA_PS_MODE_ENABLED;
4228
-
param = WMI_STA_PS_PARAM_INACTIVITY_TIME;
4229
-
4230
-
timeout = conf->dynamic_ps_timeout;
4231
-
if (timeout == 0) {
4232
-
info = ath12k_mac_get_link_bss_conf(arvif);
4233
-
if (!info) {
4234
-
ath12k_warn(ar->ab, "unable to access bss link conf in setup ps for vif %pM link %u\n",
4235
-
vif->addr, arvif->link_id);
4236
-
return;
4162
+
if (ar->ab->hw_params->supports_sta_ps) {
4163
+
ahvif->ps = vif_cfg->ps;
4164
+
ath12k_mac_vif_setup_ps(arvif);
4237
4165
}
4238
-
4239
-
/* firmware doesn't like 0 */
4240
-
timeout = ieee80211_tu_to_usec(info->beacon_int) / 1000;
4241
4166
}
4242
-
4243
-
ret = ath12k_wmi_set_sta_ps_param(ar, arvif->vdev_id, param,
4244
-
timeout);
4245
-
if (ret) {
4246
-
ath12k_warn(ar->ab, "failed to set inactivity time for vdev %d: %i\n",
4247
-
arvif->vdev_id, ret);
4248
-
return;
4249
-
}
4250
-
} else {
4251
-
psmode = WMI_STA_PS_MODE_DISABLED;
4252
4167
}
4253
-
4254
-
ath12k_dbg(ar->ab, ATH12K_DBG_MAC, "mac vdev %d psmode %s\n",
4255
-
arvif->vdev_id, psmode ? "enable" : "disable");
4256
-
4257
-
ret = ath12k_wmi_pdev_set_ps_mode(ar, arvif->vdev_id, psmode);
4258
-
if (ret)
4259
-
ath12k_warn(ar->ab, "failed to set sta power save mode %d for vdev %d: %d\n",
4260
-
psmode, arvif->vdev_id, ret);
4261
4168
}
4262
4169
4263
4170
static bool ath12k_mac_supports_tpc(struct ath12k *ar, struct ath12k_vif *ahvif,
···
4242
4223
{
4243
4224
struct ath12k_vif *ahvif = arvif->ahvif;
4244
4225
struct ieee80211_vif *vif = ath12k_ahvif_to_vif(ahvif);
4245
-
struct ieee80211_vif_cfg *vif_cfg = &vif->cfg;
4246
4226
struct cfg80211_chan_def def;
4247
4227
u32 param_id, param_value;
4248
4228
enum nl80211_band band;
···
4528
4510
}
4529
4511
4530
4512
ath12k_mac_fils_discovery(arvif, info);
4531
-
4532
-
if (changed & BSS_CHANGED_PS &&
4533
-
ar->ab->hw_params->supports_sta_ps) {
4534
-
ahvif->ps = vif_cfg->ps;
4535
-
ath12k_mac_vif_setup_ps(arvif);
4536
-
}
4537
4513
}
4538
4514
4539
4515
static struct ath12k_vif_cache *ath12k_ahvif_get_link_cache(struct ath12k_vif *ahvif,
+1
-1
drivers/net/wireless/ath/ath12k/wmi.c
+1
-1
drivers/net/wireless/ath/ath12k/wmi.c
···
843
843
cmd->tx_params_valid = 0;
844
844
845
845
frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
846
-
frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len);
846
+
frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len_aligned);
847
847
848
848
memcpy(frame_tlv->value, frame->data, buf_len);
849
849
+13
-13
drivers/net/wireless/intel/iwlwifi/pcie/drv.c
+13
-13
drivers/net/wireless/intel/iwlwifi/pcie/drv.c
···
124
124
{IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_mac_cfg)},/* low 5GHz active */
125
125
{IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_mac_cfg)},/* high 5GHz active */
126
126
127
-
/* 6x30 Series */
128
-
{IWL_PCI_DEVICE(0x008A, 0x5305, iwl1000_mac_cfg)},
129
-
{IWL_PCI_DEVICE(0x008A, 0x5307, iwl1000_mac_cfg)},
130
-
{IWL_PCI_DEVICE(0x008A, 0x5325, iwl1000_mac_cfg)},
131
-
{IWL_PCI_DEVICE(0x008A, 0x5327, iwl1000_mac_cfg)},
132
-
{IWL_PCI_DEVICE(0x008B, 0x5315, iwl1000_mac_cfg)},
133
-
{IWL_PCI_DEVICE(0x008B, 0x5317, iwl1000_mac_cfg)},
127
+
/* 1030/6x30 Series */
128
+
{IWL_PCI_DEVICE(0x008A, 0x5305, iwl6030_mac_cfg)},
129
+
{IWL_PCI_DEVICE(0x008A, 0x5307, iwl6030_mac_cfg)},
130
+
{IWL_PCI_DEVICE(0x008A, 0x5325, iwl6030_mac_cfg)},
131
+
{IWL_PCI_DEVICE(0x008A, 0x5327, iwl6030_mac_cfg)},
132
+
{IWL_PCI_DEVICE(0x008B, 0x5315, iwl6030_mac_cfg)},
133
+
{IWL_PCI_DEVICE(0x008B, 0x5317, iwl6030_mac_cfg)},
134
134
{IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_mac_cfg)},
135
135
{IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_mac_cfg)},
136
136
{IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_mac_cfg)},
···
181
181
{IWL_PCI_DEVICE(0x08AE, 0x1027, iwl1000_mac_cfg)},
182
182
183
183
/* 130 Series WiFi */
184
-
{IWL_PCI_DEVICE(0x0896, 0x5005, iwl1000_mac_cfg)},
185
-
{IWL_PCI_DEVICE(0x0896, 0x5007, iwl1000_mac_cfg)},
186
-
{IWL_PCI_DEVICE(0x0897, 0x5015, iwl1000_mac_cfg)},
187
-
{IWL_PCI_DEVICE(0x0897, 0x5017, iwl1000_mac_cfg)},
188
-
{IWL_PCI_DEVICE(0x0896, 0x5025, iwl1000_mac_cfg)},
189
-
{IWL_PCI_DEVICE(0x0896, 0x5027, iwl1000_mac_cfg)},
184
+
{IWL_PCI_DEVICE(0x0896, 0x5005, iwl6030_mac_cfg)},
185
+
{IWL_PCI_DEVICE(0x0896, 0x5007, iwl6030_mac_cfg)},
186
+
{IWL_PCI_DEVICE(0x0897, 0x5015, iwl6030_mac_cfg)},
187
+
{IWL_PCI_DEVICE(0x0897, 0x5017, iwl6030_mac_cfg)},
188
+
{IWL_PCI_DEVICE(0x0896, 0x5025, iwl6030_mac_cfg)},
189
+
{IWL_PCI_DEVICE(0x0896, 0x5027, iwl6030_mac_cfg)},
190
190
191
191
/* 2x00 Series */
192
192
{IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_mac_cfg)},
+3
-1
drivers/net/wireless/virtual/virt_wifi.c
+3
-1
drivers/net/wireless/virtual/virt_wifi.c
···
277
277
priv->is_connected = true;
278
278
279
279
/* Schedules an event that acquires the rtnl lock. */
280
-
cfg80211_connect_result(priv->upperdev, requested_bss, NULL, 0, NULL, 0,
280
+
cfg80211_connect_result(priv->upperdev,
281
+
priv->is_connected ? fake_router_bssid : NULL,
282
+
NULL, 0, NULL, 0,
281
283
status, GFP_KERNEL);
282
284
netif_carrier_on(priv->upperdev);
283
285
}
+4
-17
drivers/pci/controller/pci-mvebu.c
+4
-17
drivers/pci/controller/pci-mvebu.c
···
1168
1168
return devm_ioremap_resource(&pdev->dev, &port->regs);
1169
1169
}
1170
1170
1171
-
#define DT_FLAGS_TO_TYPE(flags) (((flags) >> 24) & 0x03)
1172
-
#define DT_TYPE_IO 0x1
1173
-
#define DT_TYPE_MEM32 0x2
1174
-
#define DT_CPUADDR_TO_TARGET(cpuaddr) (((cpuaddr) >> 56) & 0xFF)
1175
-
#define DT_CPUADDR_TO_ATTR(cpuaddr) (((cpuaddr) >> 48) & 0xFF)
1176
-
1177
1171
static int mvebu_get_tgt_attr(struct device_node *np, int devfn,
1178
1172
unsigned long type,
1179
1173
unsigned int *tgt,
···
1183
1189
return -EINVAL;
1184
1190
1185
1191
for_each_of_range(&parser, &range) {
1186
-
unsigned long rtype;
1187
1192
u32 slot = upper_32_bits(range.bus_addr);
1188
1193
1189
-
if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_IO)
1190
-
rtype = IORESOURCE_IO;
1191
-
else if (DT_FLAGS_TO_TYPE(range.flags) == DT_TYPE_MEM32)
1192
-
rtype = IORESOURCE_MEM;
1193
-
else
1194
-
continue;
1195
-
1196
-
if (slot == PCI_SLOT(devfn) && type == rtype) {
1197
-
*tgt = DT_CPUADDR_TO_TARGET(range.cpu_addr);
1198
-
*attr = DT_CPUADDR_TO_ATTR(range.cpu_addr);
1194
+
if (slot == PCI_SLOT(devfn) &&
1195
+
type == (range.flags & IORESOURCE_TYPE_BITS)) {
1196
+
*tgt = (range.parent_bus_addr >> 56) & 0xFF;
1197
+
*attr = (range.parent_bus_addr >> 48) & 0xFF;
1199
1198
return 0;
1200
1199
}
1201
1200
}
+2
-2
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
+2
-2
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
···
127
127
rptr->cfg->init_tbl[i].value);
128
128
129
129
/* Override registers from devicetree values */
130
-
if (!of_property_read_u8(np, "qcom,tune-usb2-amplitude", &val))
130
+
if (!of_property_read_u8(np, "qcom,tune-usb2-preem", &val))
131
131
regmap_write(regmap, base + EUSB2_TUNE_USB2_PREEM, val);
132
132
133
133
if (!of_property_read_u8(np, "qcom,tune-usb2-disc-thres", &val))
134
134
regmap_write(regmap, base + EUSB2_TUNE_HSDISC, val);
135
135
136
-
if (!of_property_read_u8(np, "qcom,tune-usb2-preem", &val))
136
+
if (!of_property_read_u8(np, "qcom,tune-usb2-amplitude", &val))
137
137
regmap_write(regmap, base + EUSB2_TUNE_IUSB2, val);
138
138
139
139
/* Wait for status OK */
+19
-6
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+19
-6
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
···
3067
3067
struct clk_fixed_rate aux_clk_fixed;
3068
3068
};
3069
3069
3070
+
static bool qphy_checkbits(const void __iomem *base, u32 offset, u32 val)
3071
+
{
3072
+
u32 reg;
3073
+
3074
+
reg = readl(base + offset);
3075
+
return (reg & val) == val;
3076
+
}
3077
+
3070
3078
static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
3071
3079
{
3072
3080
u32 reg;
···
4347
4339
struct qmp_pcie *qmp = phy_get_drvdata(phy);
4348
4340
const struct qmp_phy_cfg *cfg = qmp->cfg;
4349
4341
void __iomem *pcs = qmp->pcs;
4350
-
bool phy_initialized = !!(readl(pcs + cfg->regs[QPHY_START_CTRL]));
4351
4342
int ret;
4352
4343
4353
-
qmp->skip_init = qmp->nocsr_reset && phy_initialized;
4354
4344
/*
4355
-
* We need to check the existence of init sequences in two cases:
4356
-
* 1. The PHY doesn't support no_csr reset.
4357
-
* 2. The PHY supports no_csr reset but isn't initialized by bootloader.
4358
-
* As we can't skip init in these two cases.
4345
+
* We can skip PHY initialization if all of the following conditions
4346
+
* are met:
4347
+
* 1. The PHY supports the nocsr_reset that preserves the PHY config.
4348
+
* 2. The PHY was started (and not powered down again) by the
4349
+
* bootloader, with all of the expected bits set correctly.
4350
+
* In this case, we can continue without having the init sequence
4351
+
* defined in the driver.
4359
4352
*/
4353
+
qmp->skip_init = qmp->nocsr_reset &&
4354
+
qphy_checkbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START) &&
4355
+
qphy_checkbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], cfg->pwrdn_ctrl);
4356
+
4360
4357
if (!qmp->skip_init && !cfg->tbls.serdes_num) {
4361
4358
dev_err(qmp->dev, "Init sequence not available\n");
4362
4359
return -ENODATA;
+5
-1
drivers/phy/tegra/xusb-tegra210.c
+5
-1
drivers/phy/tegra/xusb-tegra210.c
···
3164
3164
}
3165
3165
3166
3166
pdev = of_find_device_by_node(np);
3167
+
of_node_put(np);
3167
3168
if (!pdev) {
3168
3169
dev_warn(dev, "PMC device is not available\n");
3169
3170
goto out;
3170
3171
}
3171
3172
3172
-
if (!platform_get_drvdata(pdev))
3173
+
if (!platform_get_drvdata(pdev)) {
3174
+
put_device(&pdev->dev);
3173
3175
return ERR_PTR(-EPROBE_DEFER);
3176
+
}
3174
3177
3175
3178
padctl->regmap = dev_get_regmap(&pdev->dev, "usb_sleepwalk");
3176
3179
if (!padctl->regmap)
3177
3180
dev_info(dev, "failed to find PMC regmap\n");
3178
3181
3182
+
put_device(&pdev->dev);
3179
3183
out:
3180
3184
return &padctl->base;
3181
3185
}
+39
-8
drivers/phy/ti/phy-gmii-sel.c
+39
-8
drivers/phy/ti/phy-gmii-sel.c
···
34
34
PHY_GMII_SEL_PORT_MODE = 0,
35
35
PHY_GMII_SEL_RGMII_ID_MODE,
36
36
PHY_GMII_SEL_RMII_IO_CLK_EN,
37
+
PHY_GMII_SEL_FIXED_TX_DELAY,
37
38
PHY_GMII_SEL_LAST,
38
39
};
39
40
···
128
127
goto unsupported;
129
128
}
130
129
130
+
/* With a fixed delay, some modes are not supported at all. */
131
+
if (soc_data->features & BIT(PHY_GMII_SEL_FIXED_TX_DELAY) &&
132
+
rgmii_id != 0)
133
+
return -EINVAL;
134
+
131
135
if_phy->phy_if_mode = submode;
132
136
133
137
dev_dbg(dev, "%s id:%u mode:%u rgmii_id:%d rmii_clk_ext:%d\n",
···
216
210
217
211
static const
218
212
struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
219
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2), },
220
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2), },
221
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2), },
222
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2), },
223
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2), },
224
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2), },
225
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2), },
226
-
{ [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2), },
213
+
{
214
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2),
215
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x0, 4, 4),
216
+
}, {
217
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2),
218
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x4, 4, 4),
219
+
}, {
220
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2),
221
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x8, 4, 4),
222
+
}, {
223
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2),
224
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0xC, 4, 4),
225
+
}, {
226
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2),
227
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x10, 4, 4),
228
+
}, {
229
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2),
230
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x14, 4, 4),
231
+
}, {
232
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2),
233
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x18, 4, 4),
234
+
}, {
235
+
[PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2),
236
+
[PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD(0x1C, 4, 4),
237
+
},
227
238
};
228
239
229
240
static const
230
241
struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
231
242
.use_of_data = true,
243
+
.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE) |
244
+
BIT(PHY_GMII_SEL_FIXED_TX_DELAY),
232
245
.regfields = phy_gmii_sel_fields_am654,
233
246
};
234
247
235
248
static const
236
249
struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw5g_soc_j7200 = {
237
250
.use_of_data = true,
251
+
.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE) |
252
+
BIT(PHY_GMII_SEL_FIXED_TX_DELAY),
238
253
.regfields = phy_gmii_sel_fields_am654,
239
254
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
240
255
BIT(PHY_INTERFACE_MODE_USXGMII),
···
266
239
static const
267
240
struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw9g_soc_j721e = {
268
241
.use_of_data = true,
242
+
.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE) |
243
+
BIT(PHY_GMII_SEL_FIXED_TX_DELAY),
269
244
.regfields = phy_gmii_sel_fields_am654,
270
245
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII),
271
246
.num_ports = 8,
···
277
248
static const
278
249
struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw9g_soc_j784s4 = {
279
250
.use_of_data = true,
251
+
.features = BIT(PHY_GMII_SEL_RGMII_ID_MODE) |
252
+
BIT(PHY_GMII_SEL_FIXED_TX_DELAY),
280
253
.regfields = phy_gmii_sel_fields_am654,
281
254
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII) |
282
255
BIT(PHY_INTERFACE_MODE_USXGMII),
+13
drivers/phy/ti/phy-omap-usb2.c
+13
drivers/phy/ti/phy-omap-usb2.c
···
363
363
phy->flags |= OMAP_USB2_DISABLE_CHRG_DET;
364
364
}
365
365
366
+
static void omap_usb2_put_device(void *_dev)
367
+
{
368
+
struct device *dev = _dev;
369
+
370
+
put_device(dev);
371
+
}
372
+
366
373
static int omap_usb2_probe(struct platform_device *pdev)
367
374
{
368
375
struct omap_usb *phy;
···
380
373
struct device_node *control_node;
381
374
struct platform_device *control_pdev;
382
375
const struct usb_phy_data *phy_data;
376
+
int ret;
383
377
384
378
phy_data = device_get_match_data(&pdev->dev);
385
379
if (!phy_data)
···
431
423
return -EINVAL;
432
424
}
433
425
phy->control_dev = &control_pdev->dev;
426
+
427
+
ret = devm_add_action_or_reset(&pdev->dev, omap_usb2_put_device,
428
+
phy->control_dev);
429
+
if (ret)
430
+
return ret;
434
431
} else {
435
432
if (of_property_read_u32_index(node,
436
433
"syscon-phy-power", 1,
+13
drivers/phy/ti/phy-ti-pipe3.c
+13
drivers/phy/ti/phy-ti-pipe3.c
···
667
667
return 0;
668
668
}
669
669
670
+
static void ti_pipe3_put_device(void *_dev)
671
+
{
672
+
struct device *dev = _dev;
673
+
674
+
put_device(dev);
675
+
}
676
+
670
677
static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy)
671
678
{
672
679
struct device *dev = phy->dev;
673
680
struct device_node *node = dev->of_node;
674
681
struct device_node *control_node;
675
682
struct platform_device *control_pdev;
683
+
int ret;
676
684
677
685
phy->phy_power_syscon = syscon_regmap_lookup_by_phandle(node,
678
686
"syscon-phy-power");
···
712
704
}
713
705
714
706
phy->control_dev = &control_pdev->dev;
707
+
708
+
ret = devm_add_action_or_reset(dev, ti_pipe3_put_device,
709
+
phy->control_dev);
710
+
if (ret)
711
+
return ret;
715
712
}
716
713
717
714
if (phy->mode == PIPE3_MODE_PCIE) {
+4
-3
drivers/regulator/sy7636a-regulator.c
+4
-3
drivers/regulator/sy7636a-regulator.c
···
83
83
if (!regmap)
84
84
return -EPROBE_DEFER;
85
85
86
-
gdp = devm_gpiod_get(pdev->dev.parent, "epd-pwr-good", GPIOD_IN);
86
+
device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);
87
+
88
+
gdp = devm_gpiod_get(&pdev->dev, "epd-pwr-good", GPIOD_IN);
87
89
if (IS_ERR(gdp)) {
88
-
dev_err(pdev->dev.parent, "Power good GPIO fault %ld\n", PTR_ERR(gdp));
90
+
dev_err(&pdev->dev, "Power good GPIO fault %ld\n", PTR_ERR(gdp));
89
91
return PTR_ERR(gdp);
90
92
}
91
93
···
107
105
}
108
106
109
107
config.dev = &pdev->dev;
110
-
config.dev->of_node = pdev->dev.parent->of_node;
111
108
config.regmap = regmap;
112
109
113
110
rdev = devm_regulator_register(&pdev->dev, &desc, &config);
+102
-32
drivers/spi/atmel-quadspi.c
+102
-32
drivers/spi/atmel-quadspi.c
···
63
63
64
64
#define SAMA7G5_QSPI0_MAX_SPEED_HZ 200000000
65
65
#define SAMA7G5_QSPI1_SDR_MAX_SPEED_HZ 133000000
66
+
#define SAM9X7_QSPI_MAX_SPEED_HZ 100000000
66
67
67
68
/* Bitfields in QSPI_CR (Control Register) */
68
69
#define QSPI_CR_QSPIEN BIT(0)
···
263
262
bool has_ricr;
264
263
bool octal;
265
264
bool has_dma;
265
+
bool has_2xgclk;
266
+
bool has_padcalib;
267
+
bool has_dllon;
266
268
};
267
269
268
270
struct atmel_qspi_ops;
···
1031
1027
aq, QSPI_PCALCFG);
1032
1028
1033
1029
/* DLL On + start calibration. */
1034
-
atmel_qspi_write(QSPI_CR_DLLON | QSPI_CR_STPCAL, aq, QSPI_CR);
1030
+
if (aq->caps->has_dllon)
1031
+
atmel_qspi_write(QSPI_CR_DLLON | QSPI_CR_STPCAL, aq, QSPI_CR);
1032
+
/* If there is no DLL support only start calibration. */
1033
+
else
1034
+
atmel_qspi_write(QSPI_CR_STPCAL, aq, QSPI_CR);
1035
1035
1036
-
/* Check synchronization status before updating configuration. */
1037
-
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1038
-
(val & QSPI_SR2_DLOCK) &&
1039
-
!(val & QSPI_SR2_CALBSY), 40,
1040
-
ATMEL_QSPI_TIMEOUT);
1036
+
/*
1037
+
* Check DLL clock lock and synchronization status before updating
1038
+
* configuration.
1039
+
*/
1040
+
if (aq->caps->has_dllon)
1041
+
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1042
+
(val & QSPI_SR2_DLOCK) &&
1043
+
!(val & QSPI_SR2_CALBSY), 40,
1044
+
ATMEL_QSPI_TIMEOUT);
1045
+
else
1046
+
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1047
+
!(val & QSPI_SR2_CALBSY), 40,
1048
+
ATMEL_QSPI_TIMEOUT);
1041
1049
1042
1050
/* Refresh analogic blocks every 1 ms.*/
1043
1051
atmel_qspi_write(FIELD_PREP(QSPI_REFRESH_DELAY_COUNTER,
···
1065
1049
int ret;
1066
1050
1067
1051
/* Disable DLL before setting GCLK */
1068
-
status = atmel_qspi_read(aq, QSPI_SR2);
1069
-
if (status & QSPI_SR2_DLOCK) {
1070
-
atmel_qspi_write(QSPI_CR_DLLOFF, aq, QSPI_CR);
1052
+
if (aq->caps->has_dllon) {
1053
+
status = atmel_qspi_read(aq, QSPI_SR2);
1054
+
if (status & QSPI_SR2_DLOCK) {
1055
+
atmel_qspi_write(QSPI_CR_DLLOFF, aq, QSPI_CR);
1056
+
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1057
+
!(val & QSPI_SR2_DLOCK), 40,
1058
+
ATMEL_QSPI_TIMEOUT);
1059
+
if (ret)
1060
+
return ret;
1061
+
}
1071
1062
1072
-
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1073
-
!(val & QSPI_SR2_DLOCK), 40,
1074
-
ATMEL_QSPI_TIMEOUT);
1075
-
if (ret)
1076
-
return ret;
1063
+
if (aq->target_max_speed_hz > QSPI_DLLCFG_THRESHOLD_FREQ)
1064
+
atmel_qspi_write(QSPI_DLLCFG_RANGE, aq, QSPI_DLLCFG);
1065
+
else
1066
+
atmel_qspi_write(0, aq, QSPI_DLLCFG);
1077
1067
}
1078
1068
1079
-
if (aq->target_max_speed_hz > QSPI_DLLCFG_THRESHOLD_FREQ)
1080
-
atmel_qspi_write(QSPI_DLLCFG_RANGE, aq, QSPI_DLLCFG);
1069
+
if (aq->caps->has_2xgclk)
1070
+
ret = clk_set_rate(aq->gclk, 2 * aq->target_max_speed_hz);
1081
1071
else
1082
-
atmel_qspi_write(0, aq, QSPI_DLLCFG);
1072
+
ret = clk_set_rate(aq->gclk, aq->target_max_speed_hz);
1083
1073
1084
-
ret = clk_set_rate(aq->gclk, aq->target_max_speed_hz);
1085
1074
if (ret) {
1086
1075
dev_err(&aq->pdev->dev, "Failed to set generic clock rate.\n");
1087
1076
return ret;
···
1109
1088
if (ret)
1110
1089
return ret;
1111
1090
1112
-
if (aq->caps->octal) {
1091
+
/*
1092
+
* Check if the SoC supports pad calibration in Octal SPI mode.
1093
+
* Proceed only if both the capabilities are true.
1094
+
*/
1095
+
if (aq->caps->octal && aq->caps->has_padcalib) {
1113
1096
ret = atmel_qspi_set_pad_calibration(aq);
1114
1097
if (ret)
1115
1098
return ret;
1116
-
} else {
1099
+
/* Start DLL on only if the SoC supports the same */
1100
+
} else if (aq->caps->has_dllon) {
1117
1101
atmel_qspi_write(QSPI_CR_DLLON, aq, QSPI_CR);
1118
1102
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1119
1103
(val & QSPI_SR2_DLOCK), 40,
···
1484
1458
1485
1459
clk_disable_unprepare(aq->gclk);
1486
1460
1487
-
atmel_qspi_write(QSPI_CR_DLLOFF, aq, QSPI_CR);
1488
-
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1489
-
!(val & QSPI_SR2_DLOCK), 40,
1490
-
ATMEL_QSPI_TIMEOUT);
1491
-
if (ret)
1492
-
return ret;
1461
+
if (aq->caps->has_dllon) {
1462
+
atmel_qspi_write(QSPI_CR_DLLOFF, aq, QSPI_CR);
1463
+
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1464
+
!(val & QSPI_SR2_DLOCK), 40,
1465
+
ATMEL_QSPI_TIMEOUT);
1466
+
if (ret)
1467
+
return ret;
1468
+
}
1493
1469
1494
-
ret = readl_poll_timeout(aq->regs + QSPI_SR2, val,
1495
-
!(val & QSPI_SR2_CALBSY), 40,
1496
-
ATMEL_QSPI_TIMEOUT);
1497
-
if (ret)
1498
-
return ret;
1499
-
1470
+
if (aq->caps->has_padcalib)
1471
+
return readl_poll_timeout(aq->regs + QSPI_SR2, val,
1472
+
!(val & QSPI_SR2_CALBSY), 40,
1473
+
ATMEL_QSPI_TIMEOUT);
1500
1474
return 0;
1501
1475
}
1502
1476
···
1628
1602
.has_ricr = true,
1629
1603
};
1630
1604
1605
+
static const struct atmel_qspi_caps atmel_sam9x7_ospi_caps = {
1606
+
.max_speed_hz = SAM9X7_QSPI_MAX_SPEED_HZ,
1607
+
.has_gclk = true,
1608
+
.octal = true,
1609
+
.has_dma = true,
1610
+
.has_2xgclk = true,
1611
+
.has_padcalib = false,
1612
+
.has_dllon = false,
1613
+
};
1614
+
1615
+
static const struct atmel_qspi_caps atmel_sama7d65_ospi_caps = {
1616
+
.max_speed_hz = SAMA7G5_QSPI0_MAX_SPEED_HZ,
1617
+
.has_gclk = true,
1618
+
.octal = true,
1619
+
.has_dma = true,
1620
+
.has_2xgclk = true,
1621
+
.has_padcalib = true,
1622
+
.has_dllon = false,
1623
+
};
1624
+
1625
+
static const struct atmel_qspi_caps atmel_sama7d65_qspi_caps = {
1626
+
.max_speed_hz = SAMA7G5_QSPI1_SDR_MAX_SPEED_HZ,
1627
+
.has_gclk = true,
1628
+
.has_dma = true,
1629
+
.has_2xgclk = true,
1630
+
.has_dllon = false,
1631
+
};
1632
+
1631
1633
static const struct atmel_qspi_caps atmel_sama7g5_ospi_caps = {
1632
1634
.max_speed_hz = SAMA7G5_QSPI0_MAX_SPEED_HZ,
1633
1635
.has_gclk = true,
1634
1636
.octal = true,
1635
1637
.has_dma = true,
1638
+
.has_padcalib = true,
1639
+
.has_dllon = true,
1636
1640
};
1637
1641
1638
1642
static const struct atmel_qspi_caps atmel_sama7g5_qspi_caps = {
1639
1643
.max_speed_hz = SAMA7G5_QSPI1_SDR_MAX_SPEED_HZ,
1640
1644
.has_gclk = true,
1641
1645
.has_dma = true,
1646
+
.has_dllon = true,
1642
1647
};
1643
1648
1644
1649
static const struct of_device_id atmel_qspi_dt_ids[] = {
···
1689
1632
.compatible = "microchip,sama7g5-qspi",
1690
1633
.data = &atmel_sama7g5_qspi_caps,
1691
1634
},
1635
+
{
1636
+
.compatible = "microchip,sam9x7-ospi",
1637
+
.data = &atmel_sam9x7_ospi_caps,
1638
+
},
1639
+
{
1640
+
.compatible = "microchip,sama7d65-ospi",
1641
+
.data = &atmel_sama7d65_ospi_caps,
1642
+
},
1643
+
{
1644
+
.compatible = "microchip,sama7d65-qspi",
1645
+
.data = &atmel_sama7d65_qspi_caps,
1646
+
},
1647
+
1692
1648
1693
1649
{ /* sentinel */ }
1694
1650
};
+3
-3
drivers/tty/hvc/hvc_console.c
+3
-3
drivers/tty/hvc/hvc_console.c
···
543
543
}
544
544
545
545
/*
546
-
* Racy, but harmless, kick thread if there is still pending data.
546
+
* Kick thread to flush if there's still pending data
547
+
* or to wakeup the write queue.
547
548
*/
548
-
if (hp->n_outbuf)
549
-
hvc_kick();
549
+
hvc_kick();
550
550
551
551
return written;
552
552
}
+2
-12
drivers/tty/serial/sc16is7xx.c
+2
-12
drivers/tty/serial/sc16is7xx.c
···
1177
1177
sc16is7xx_port_write(port, SC16IS7XX_FCR_REG,
1178
1178
SC16IS7XX_FCR_FIFO_BIT);
1179
1179
1180
-
/* Enable EFR */
1181
-
sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
1182
-
SC16IS7XX_LCR_CONF_MODE_B);
1183
-
1184
-
regcache_cache_bypass(one->regmap, true);
1185
-
1186
-
/* Enable write access to enhanced features and internal clock div */
1187
-
sc16is7xx_port_update(port, SC16IS7XX_EFR_REG,
1188
-
SC16IS7XX_EFR_ENABLE_BIT,
1189
-
SC16IS7XX_EFR_ENABLE_BIT);
1190
-
1191
1180
/* Enable TCR/TLR */
1192
1181
sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
1193
1182
SC16IS7XX_MCR_TCRTLR_BIT,
···
1188
1199
SC16IS7XX_TCR_RX_RESUME(24) |
1189
1200
SC16IS7XX_TCR_RX_HALT(48));
1190
1201
1191
-
regcache_cache_bypass(one->regmap, false);
1202
+
/* Disable TCR/TLR access */
1203
+
sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, SC16IS7XX_MCR_TCRTLR_BIT, 0);
1192
1204
1193
1205
/* Now, initialize the UART */
1194
1206
sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8);
+5
-5
drivers/tty/serial/xilinx_uartps.c
+5
-5
drivers/tty/serial/xilinx_uartps.c
···
33
33
#define CDNS_UART_MINOR 0 /* works best with devtmpfs */
34
34
#define CDNS_UART_NR_PORTS 16
35
35
#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */
36
-
#define CDNS_UART_REGISTER_SPACE 0x1000
37
36
#define TX_TIMEOUT 500000
38
37
39
38
/* Rx Trigger level */
···
1097
1098
*/
1098
1099
static int cdns_uart_request_port(struct uart_port *port)
1099
1100
{
1100
-
if (!request_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE,
1101
+
if (!request_mem_region(port->mapbase, port->mapsize,
1101
1102
CDNS_UART_NAME)) {
1102
1103
return -ENOMEM;
1103
1104
}
1104
1105
1105
-
port->membase = ioremap(port->mapbase, CDNS_UART_REGISTER_SPACE);
1106
+
port->membase = ioremap(port->mapbase, port->mapsize);
1106
1107
if (!port->membase) {
1107
1108
dev_err(port->dev, "Unable to map registers\n");
1108
-
release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE);
1109
+
release_mem_region(port->mapbase, port->mapsize);
1109
1110
return -ENOMEM;
1110
1111
}
1111
1112
return 0;
···
1120
1121
*/
1121
1122
static void cdns_uart_release_port(struct uart_port *port)
1122
1123
{
1123
-
release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE);
1124
+
release_mem_region(port->mapbase, port->mapsize);
1124
1125
iounmap(port->membase);
1125
1126
port->membase = NULL;
1126
1127
}
···
1779
1780
* and triggers invocation of the config_port() entry point.
1780
1781
*/
1781
1782
port->mapbase = res->start;
1783
+
port->mapsize = resource_size(res);
1782
1784
port->irq = irq;
1783
1785
port->dev = &pdev->dev;
1784
1786
port->uartclk = clk_get_rate(cdns_uart_data->uartclk);
+2
-2
drivers/usb/core/driver.c
+2
-2
drivers/usb/core/driver.c
···
119
119
guard(mutex)(&usb_dynids_lock);
120
120
list_for_each_entry(dynid, &dynids->list, node)
121
121
if (dynid->id.bInterfaceClass != 0)
122
-
count += sysfs_emit_at(&buf[count], count, "%04x %04x %02x\n",
122
+
count += sysfs_emit_at(buf, count, "%04x %04x %02x\n",
123
123
dynid->id.idVendor, dynid->id.idProduct,
124
124
dynid->id.bInterfaceClass);
125
125
else
126
-
count += sysfs_emit_at(&buf[count], count, "%04x %04x\n",
126
+
count += sysfs_emit_at(buf, count, "%04x %04x\n",
127
127
dynid->id.idVendor, dynid->id.idProduct);
128
128
return count;
129
129
}
+9
-2
drivers/usb/gadget/function/f_midi2.c
+9
-2
drivers/usb/gadget/function/f_midi2.c
···
1599
1599
strscpy(fb->info.name, ump_fb_name(b),
1600
1600
sizeof(fb->info.name));
1601
1601
}
1602
+
snd_ump_update_group_attrs(ump);
1602
1603
}
1603
1604
1604
1605
for (i = 0; i < midi2->num_eps; i++) {
···
1737
1736
case USB_SPEED_HIGH:
1738
1737
midi2_midi1_ep_out_desc.wMaxPacketSize = cpu_to_le16(512);
1739
1738
midi2_midi1_ep_in_desc.wMaxPacketSize = cpu_to_le16(512);
1740
-
for (i = 0; i < midi2->num_eps; i++)
1739
+
for (i = 0; i < midi2->num_eps; i++) {
1741
1740
midi2_midi2_ep_out_desc[i].wMaxPacketSize =
1742
1741
cpu_to_le16(512);
1742
+
midi2_midi2_ep_in_desc[i].wMaxPacketSize =
1743
+
cpu_to_le16(512);
1744
+
}
1743
1745
fallthrough;
1744
1746
case USB_SPEED_FULL:
1745
1747
midi1_in_eps = midi2_midi1_ep_in_descs;
···
1751
1747
case USB_SPEED_SUPER:
1752
1748
midi2_midi1_ep_out_desc.wMaxPacketSize = cpu_to_le16(1024);
1753
1749
midi2_midi1_ep_in_desc.wMaxPacketSize = cpu_to_le16(1024);
1754
-
for (i = 0; i < midi2->num_eps; i++)
1750
+
for (i = 0; i < midi2->num_eps; i++) {
1755
1751
midi2_midi2_ep_out_desc[i].wMaxPacketSize =
1756
1752
cpu_to_le16(1024);
1753
+
midi2_midi2_ep_in_desc[i].wMaxPacketSize =
1754
+
cpu_to_le16(1024);
1755
+
}
1757
1756
midi1_in_eps = midi2_midi1_ep_in_ss_descs;
1758
1757
midi1_out_eps = midi2_midi1_ep_out_ss_descs;
1759
1758
break;
+4
-4
drivers/usb/gadget/udc/dummy_hcd.c
+4
-4
drivers/usb/gadget/udc/dummy_hcd.c
···
765
765
if (!dum->driver)
766
766
return -ESHUTDOWN;
767
767
768
-
local_irq_save(flags);
769
-
spin_lock(&dum->lock);
768
+
spin_lock_irqsave(&dum->lock, flags);
770
769
list_for_each_entry(iter, &ep->queue, queue) {
771
770
if (&iter->req != _req)
772
771
continue;
···
775
776
retval = 0;
776
777
break;
777
778
}
778
-
spin_unlock(&dum->lock);
779
779
780
780
if (retval == 0) {
781
781
dev_dbg(udc_dev(dum),
782
782
"dequeued req %p from %s, len %d buf %p\n",
783
783
req, _ep->name, _req->length, _req->buf);
784
+
spin_unlock(&dum->lock);
784
785
usb_gadget_giveback_request(_ep, _req);
786
+
spin_lock(&dum->lock);
785
787
}
786
-
local_irq_restore(flags);
788
+
spin_unlock_irqrestore(&dum->lock, flags);
787
789
return retval;
788
790
}
789
791
+67
-27
drivers/usb/host/xhci-dbgcap.c
+67
-27
drivers/usb/host/xhci-dbgcap.c
···
101
101
return string_length;
102
102
}
103
103
104
+
static void xhci_dbc_init_ep_contexts(struct xhci_dbc *dbc)
105
+
{
106
+
struct xhci_ep_ctx *ep_ctx;
107
+
unsigned int max_burst;
108
+
dma_addr_t deq;
109
+
110
+
max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
111
+
112
+
/* Populate bulk out endpoint context: */
113
+
ep_ctx = dbc_bulkout_ctx(dbc);
114
+
deq = dbc_bulkout_enq(dbc);
115
+
ep_ctx->ep_info = 0;
116
+
ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
117
+
ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
118
+
119
+
/* Populate bulk in endpoint context: */
120
+
ep_ctx = dbc_bulkin_ctx(dbc);
121
+
deq = dbc_bulkin_enq(dbc);
122
+
ep_ctx->ep_info = 0;
123
+
ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
124
+
ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
125
+
}
126
+
104
127
static void xhci_dbc_init_contexts(struct xhci_dbc *dbc, u32 string_length)
105
128
{
106
129
struct dbc_info_context *info;
107
-
struct xhci_ep_ctx *ep_ctx;
108
130
u32 dev_info;
109
-
dma_addr_t deq, dma;
110
-
unsigned int max_burst;
131
+
dma_addr_t dma;
111
132
112
133
if (!dbc)
113
134
return;
···
142
121
info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
143
122
info->length = cpu_to_le32(string_length);
144
123
145
-
/* Populate bulk out endpoint context: */
146
-
ep_ctx = dbc_bulkout_ctx(dbc);
147
-
max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
148
-
deq = dbc_bulkout_enq(dbc);
149
-
ep_ctx->ep_info = 0;
150
-
ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
151
-
ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
152
-
153
-
/* Populate bulk in endpoint context: */
154
-
ep_ctx = dbc_bulkin_ctx(dbc);
155
-
deq = dbc_bulkin_enq(dbc);
156
-
ep_ctx->ep_info = 0;
157
-
ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
158
-
ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
124
+
/* Populate bulk in and out endpoint contexts: */
125
+
xhci_dbc_init_ep_contexts(dbc);
159
126
160
127
/* Set DbC context and info registers: */
161
128
lo_hi_writeq(dbc->ctx->dma, &dbc->regs->dccp);
···
445
436
return ctx;
446
437
}
447
438
439
+
static void xhci_dbc_ring_init(struct xhci_ring *ring)
440
+
{
441
+
struct xhci_segment *seg = ring->first_seg;
442
+
443
+
/* clear all trbs on ring in case of old ring */
444
+
memset(seg->trbs, 0, TRB_SEGMENT_SIZE);
445
+
446
+
/* Only event ring does not use link TRB */
447
+
if (ring->type != TYPE_EVENT) {
448
+
union xhci_trb *trb = &seg->trbs[TRBS_PER_SEGMENT - 1];
449
+
450
+
trb->link.segment_ptr = cpu_to_le64(ring->first_seg->dma);
451
+
trb->link.control = cpu_to_le32(LINK_TOGGLE | TRB_TYPE(TRB_LINK));
452
+
}
453
+
xhci_initialize_ring_info(ring);
454
+
}
455
+
456
+
static int xhci_dbc_reinit_ep_rings(struct xhci_dbc *dbc)
457
+
{
458
+
struct xhci_ring *in_ring = dbc->eps[BULK_IN].ring;
459
+
struct xhci_ring *out_ring = dbc->eps[BULK_OUT].ring;
460
+
461
+
if (!in_ring || !out_ring || !dbc->ctx) {
462
+
dev_warn(dbc->dev, "Can't re-init unallocated endpoints\n");
463
+
return -ENODEV;
464
+
}
465
+
466
+
xhci_dbc_ring_init(in_ring);
467
+
xhci_dbc_ring_init(out_ring);
468
+
469
+
/* set ep context enqueue, dequeue, and cycle to initial values */
470
+
xhci_dbc_init_ep_contexts(dbc);
471
+
472
+
return 0;
473
+
}
474
+
448
475
static struct xhci_ring *
449
476
xhci_dbc_ring_alloc(struct device *dev, enum xhci_ring_type type, gfp_t flags)
450
477
{
···
509
464
510
465
seg->dma = dma;
511
466
512
-
/* Only event ring does not use link TRB */
513
-
if (type != TYPE_EVENT) {
514
-
union xhci_trb *trb = &seg->trbs[TRBS_PER_SEGMENT - 1];
515
-
516
-
trb->link.segment_ptr = cpu_to_le64(dma);
517
-
trb->link.control = cpu_to_le32(LINK_TOGGLE | TRB_TYPE(TRB_LINK));
518
-
}
519
467
INIT_LIST_HEAD(&ring->td_list);
520
-
xhci_initialize_ring_info(ring);
468
+
469
+
xhci_dbc_ring_init(ring);
470
+
521
471
return ring;
522
472
dma_fail:
523
473
kfree(seg);
···
904
864
dev_info(dbc->dev, "DbC cable unplugged\n");
905
865
dbc->state = DS_ENABLED;
906
866
xhci_dbc_flush_requests(dbc);
907
-
867
+
xhci_dbc_reinit_ep_rings(dbc);
908
868
return EVT_DISC;
909
869
}
910
870
···
914
874
writel(portsc, &dbc->regs->portsc);
915
875
dbc->state = DS_ENABLED;
916
876
xhci_dbc_flush_requests(dbc);
917
-
877
+
xhci_dbc_reinit_ep_rings(dbc);
918
878
return EVT_DISC;
919
879
}
920
880
+1
-1
drivers/usb/host/xhci-mem.c
+1
-1
drivers/usb/host/xhci-mem.c
···
962
962
out:
963
963
/* we are now at a leaf device */
964
964
xhci_debugfs_remove_slot(xhci, slot_id);
965
-
xhci_free_virt_device(xhci, vdev, slot_id);
965
+
xhci_free_virt_device(xhci, xhci->devs[slot_id], slot_id);
966
966
}
967
967
968
968
int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
+17
drivers/usb/serial/option.c
+17
drivers/usb/serial/option.c
···
1322
1322
.driver_info = NCTRL(0) | RSVD(3) },
1323
1323
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1033, 0xff), /* Telit LE910C1-EUX (ECM) */
1324
1324
.driver_info = NCTRL(0) },
1325
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1034, 0xff), /* Telit LE910C4-WWX (rmnet) */
1326
+
.driver_info = RSVD(2) },
1325
1327
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1035, 0xff) }, /* Telit LE910C4-WWX (ECM) */
1328
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1036, 0xff) }, /* Telit LE910C4-WWX */
1329
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1037, 0xff), /* Telit LE910C4-WWX (rmnet) */
1330
+
.driver_info = NCTRL(0) | NCTRL(1) | RSVD(4) },
1331
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1038, 0xff), /* Telit LE910C4-WWX (rmnet) */
1332
+
.driver_info = NCTRL(0) | RSVD(3) },
1333
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x103b, 0xff), /* Telit LE910C4-WWX */
1334
+
.driver_info = NCTRL(0) | NCTRL(1) },
1335
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x103c, 0xff), /* Telit LE910C4-WWX */
1336
+
.driver_info = NCTRL(0) },
1326
1337
{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG0),
1327
1338
.driver_info = RSVD(0) | RSVD(1) | NCTRL(2) | RSVD(3) },
1328
1339
{ USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_LE922_USBCFG1),
···
1380
1369
.driver_info = NCTRL(0) | RSVD(1) },
1381
1370
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1075, 0xff), /* Telit FN990A (PCIe) */
1382
1371
.driver_info = RSVD(0) },
1372
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1077, 0xff), /* Telit FN990A (rmnet + audio) */
1373
+
.driver_info = NCTRL(0) | RSVD(1) | RSVD(2) },
1374
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1078, 0xff), /* Telit FN990A (MBIM + audio) */
1375
+
.driver_info = NCTRL(0) | RSVD(1) },
1376
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1079, 0xff), /* Telit FN990A (RNDIS + audio) */
1377
+
.driver_info = NCTRL(2) | RSVD(3) },
1383
1378
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1080, 0xff), /* Telit FE990A (rmnet) */
1384
1379
.driver_info = NCTRL(0) | RSVD(1) | RSVD(2) },
1385
1380
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x1081, 0xff), /* Telit FE990A (MBIM) */
+8
-4
drivers/usb/typec/tcpm/tcpm.c
+8
-4
drivers/usb/typec/tcpm/tcpm.c
···
2426
2426
case ADEV_NONE:
2427
2427
break;
2428
2428
case ADEV_NOTIFY_USB_AND_QUEUE_VDM:
2429
-
WARN_ON(typec_altmode_notify(adev, TYPEC_STATE_USB, NULL));
2430
-
typec_altmode_vdm(adev, p[0], &p[1], cnt);
2429
+
if (rx_sop_type == TCPC_TX_SOP_PRIME) {
2430
+
typec_cable_altmode_vdm(adev, TYPEC_PLUG_SOP_P, p[0], &p[1], cnt);
2431
+
} else {
2432
+
WARN_ON(typec_altmode_notify(adev, TYPEC_STATE_USB, NULL));
2433
+
typec_altmode_vdm(adev, p[0], &p[1], cnt);
2434
+
}
2431
2435
break;
2432
2436
case ADEV_QUEUE_VDM:
2433
-
if (response_tx_sop_type == TCPC_TX_SOP_PRIME)
2437
+
if (rx_sop_type == TCPC_TX_SOP_PRIME)
2434
2438
typec_cable_altmode_vdm(adev, TYPEC_PLUG_SOP_P, p[0], &p[1], cnt);
2435
2439
else
2436
2440
typec_altmode_vdm(adev, p[0], &p[1], cnt);
2437
2441
break;
2438
2442
case ADEV_QUEUE_VDM_SEND_EXIT_MODE_ON_FAIL:
2439
-
if (response_tx_sop_type == TCPC_TX_SOP_PRIME) {
2443
+
if (rx_sop_type == TCPC_TX_SOP_PRIME) {
2440
2444
if (typec_cable_altmode_vdm(adev, TYPEC_PLUG_SOP_P,
2441
2445
p[0], &p[1], cnt)) {
2442
2446
int svdm_version = typec_get_cable_svdm_version(
+30
-10
fs/btrfs/extent_io.c
+30
-10
fs/btrfs/extent_io.c
···
111
111
*/
112
112
unsigned long submit_bitmap;
113
113
struct readahead_control *ractl;
114
+
115
+
/*
116
+
* The start offset of the last used extent map by a read operation.
117
+
*
118
+
* This is for proper compressed read merge.
119
+
* U64_MAX means we are starting the read and have made no progress yet.
120
+
*
121
+
* The current btrfs_bio_is_contig() only uses disk_bytenr as
122
+
* the condition to check if the read can be merged with previous
123
+
* bio, which is not correct. E.g. two file extents pointing to the
124
+
* same extent but with different offset.
125
+
*
126
+
* So here we need to do extra checks to only merge reads that are
127
+
* covered by the same extent map.
128
+
* Just extent_map::start will be enough, as they are unique
129
+
* inside the same inode.
130
+
*/
131
+
u64 last_em_start;
114
132
};
115
133
116
134
static void submit_one_bio(struct btrfs_bio_ctrl *bio_ctrl)
···
927
909
* return 0 on success, otherwise return error
928
910
*/
929
911
static int btrfs_do_readpage(struct folio *folio, struct extent_map **em_cached,
930
-
struct btrfs_bio_ctrl *bio_ctrl, u64 *prev_em_start)
912
+
struct btrfs_bio_ctrl *bio_ctrl)
931
913
{
932
914
struct inode *inode = folio->mapping->host;
933
915
struct btrfs_fs_info *fs_info = inode_to_fs_info(inode);
···
1037
1019
* non-optimal behavior (submitting 2 bios for the same extent).
1038
1020
*/
1039
1021
if (compress_type != BTRFS_COMPRESS_NONE &&
1040
-
prev_em_start && *prev_em_start != (u64)-1 &&
1041
-
*prev_em_start != em->start)
1022
+
bio_ctrl->last_em_start != U64_MAX &&
1023
+
bio_ctrl->last_em_start != em->start)
1042
1024
force_bio_submit = true;
1043
1025
1044
-
if (prev_em_start)
1045
-
*prev_em_start = em->start;
1026
+
bio_ctrl->last_em_start = em->start;
1046
1027
1047
1028
btrfs_free_extent_map(em);
1048
1029
em = NULL;
···
1255
1238
const u64 start = folio_pos(folio);
1256
1239
const u64 end = start + folio_size(folio) - 1;
1257
1240
struct extent_state *cached_state = NULL;
1258
-
struct btrfs_bio_ctrl bio_ctrl = { .opf = REQ_OP_READ };
1241
+
struct btrfs_bio_ctrl bio_ctrl = {
1242
+
.opf = REQ_OP_READ,
1243
+
.last_em_start = U64_MAX,
1244
+
};
1259
1245
struct extent_map *em_cached = NULL;
1260
1246
int ret;
1261
1247
1262
1248
lock_extents_for_read(inode, start, end, &cached_state);
1263
-
ret = btrfs_do_readpage(folio, &em_cached, &bio_ctrl, NULL);
1249
+
ret = btrfs_do_readpage(folio, &em_cached, &bio_ctrl);
1264
1250
btrfs_unlock_extent(&inode->io_tree, start, end, &cached_state);
1265
1251
1266
1252
btrfs_free_extent_map(em_cached);
···
2603
2583
{
2604
2584
struct btrfs_bio_ctrl bio_ctrl = {
2605
2585
.opf = REQ_OP_READ | REQ_RAHEAD,
2606
-
.ractl = rac
2586
+
.ractl = rac,
2587
+
.last_em_start = U64_MAX,
2607
2588
};
2608
2589
struct folio *folio;
2609
2590
struct btrfs_inode *inode = BTRFS_I(rac->mapping->host);
···
2612
2591
const u64 end = start + readahead_length(rac) - 1;
2613
2592
struct extent_state *cached_state = NULL;
2614
2593
struct extent_map *em_cached = NULL;
2615
-
u64 prev_em_start = (u64)-1;
2616
2594
2617
2595
lock_extents_for_read(inode, start, end, &cached_state);
2618
2596
2619
2597
while ((folio = readahead_folio(rac)) != NULL)
2620
-
btrfs_do_readpage(folio, &em_cached, &bio_ctrl, &prev_em_start);
2598
+
btrfs_do_readpage(folio, &em_cached, &bio_ctrl);
2621
2599
2622
2600
btrfs_unlock_extent(&inode->io_tree, start, end, &cached_state);
2623
2601
+11
-1
fs/btrfs/inode.c
+11
-1
fs/btrfs/inode.c
···
5696
5696
bool empty = false;
5697
5697
5698
5698
xa_lock(&root->inodes);
5699
-
entry = __xa_erase(&root->inodes, btrfs_ino(inode));
5699
+
/*
5700
+
* This btrfs_inode is being freed and has already been unhashed at this
5701
+
* point. It's possible that another btrfs_inode has already been
5702
+
* allocated for the same inode and inserted itself into the root, so
5703
+
* don't delete it in that case.
5704
+
*
5705
+
* Note that this shouldn't need to allocate memory, so the gfp flags
5706
+
* don't really matter.
5707
+
*/
5708
+
entry = __xa_cmpxchg(&root->inodes, btrfs_ino(inode), inode, NULL,
5709
+
GFP_ATOMIC);
5700
5710
if (entry == inode)
5701
5711
empty = xa_empty(&root->inodes);
5702
5712
xa_unlock(&root->inodes);
+4
-2
fs/btrfs/qgroup.c
+4
-2
fs/btrfs/qgroup.c
···
1455
1455
struct btrfs_qgroup *qgroup;
1456
1456
LIST_HEAD(qgroup_list);
1457
1457
u64 num_bytes = src->excl;
1458
+
u64 num_bytes_cmpr = src->excl_cmpr;
1458
1459
int ret = 0;
1459
1460
1460
1461
qgroup = find_qgroup_rb(fs_info, ref_root);
···
1467
1466
struct btrfs_qgroup_list *glist;
1468
1467
1469
1468
qgroup->rfer += sign * num_bytes;
1470
-
qgroup->rfer_cmpr += sign * num_bytes;
1469
+
qgroup->rfer_cmpr += sign * num_bytes_cmpr;
1471
1470
1472
1471
WARN_ON(sign < 0 && qgroup->excl < num_bytes);
1472
+
WARN_ON(sign < 0 && qgroup->excl_cmpr < num_bytes_cmpr);
1473
1473
qgroup->excl += sign * num_bytes;
1474
-
qgroup->excl_cmpr += sign * num_bytes;
1474
+
qgroup->excl_cmpr += sign * num_bytes_cmpr;
1475
1475
1476
1476
if (sign > 0)
1477
1477
qgroup_rsv_add_by_qgroup(fs_info, qgroup, src);
+6
-3
fs/btrfs/super.c
+6
-3
fs/btrfs/super.c
···
299
299
btrfs_set_opt(ctx->mount_opt, COMPRESS);
300
300
btrfs_clear_opt(ctx->mount_opt, NODATACOW);
301
301
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
302
-
} else if (btrfs_match_compress_type(string, "lzo", false)) {
302
+
} else if (btrfs_match_compress_type(string, "lzo", true)) {
303
303
ctx->compress_type = BTRFS_COMPRESS_LZO;
304
-
ctx->compress_level = 0;
304
+
ctx->compress_level = btrfs_compress_str2level(BTRFS_COMPRESS_LZO,
305
+
string + 3);
306
+
if (string[3] == ':' && string[4])
307
+
btrfs_warn(NULL, "Compression level ignored for LZO");
305
308
btrfs_set_opt(ctx->mount_opt, COMPRESS);
306
309
btrfs_clear_opt(ctx->mount_opt, NODATACOW);
307
310
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
···
1082
1079
seq_printf(seq, ",compress-force=%s", compress_type);
1083
1080
else
1084
1081
seq_printf(seq, ",compress=%s", compress_type);
1085
-
if (info->compress_level)
1082
+
if (info->compress_level && info->compress_type != BTRFS_COMPRESS_LZO)
1086
1083
seq_printf(seq, ":%d", info->compress_level);
1087
1084
}
1088
1085
if (btrfs_test_opt(info, NOSSD))
+5
fs/btrfs/volumes.c
+5
fs/btrfs/volumes.c
+5
-4
fs/ceph/addr.c
+5
-4
fs/ceph/addr.c
···
1264
1264
0,
1265
1265
gfp_flags);
1266
1266
if (IS_ERR(pages[index])) {
1267
-
if (PTR_ERR(pages[index]) == -EINVAL) {
1267
+
int err = PTR_ERR(pages[index]);
1268
+
1269
+
if (err == -EINVAL) {
1268
1270
pr_err_client(cl, "inode->i_blkbits=%hhu\n",
1269
1271
inode->i_blkbits);
1270
1272
}
···
1275
1273
BUG_ON(ceph_wbc->locked_pages == 0);
1276
1274
1277
1275
pages[index] = NULL;
1278
-
return PTR_ERR(pages[index]);
1276
+
return err;
1279
1277
}
1280
1278
} else {
1281
1279
pages[index] = &folio->page;
···
1689
1687
1690
1688
process_folio_batch:
1691
1689
rc = ceph_process_folio_batch(mapping, wbc, &ceph_wbc);
1690
+
ceph_shift_unused_folios_left(&ceph_wbc.fbatch);
1692
1691
if (rc)
1693
1692
goto release_folios;
1694
1693
···
1698
1695
goto release_folios;
1699
1696
1700
1697
if (ceph_wbc.processed_in_fbatch) {
1701
-
ceph_shift_unused_folios_left(&ceph_wbc.fbatch);
1702
-
1703
1698
if (folio_batch_count(&ceph_wbc.fbatch) == 0 &&
1704
1699
ceph_wbc.locked_pages < ceph_wbc.max_pages) {
1705
1700
doutc(cl, "reached end fbatch, trying for more\n");
+6
-8
fs/ceph/debugfs.c
+6
-8
fs/ceph/debugfs.c
···
55
55
struct ceph_mds_client *mdsc = fsc->mdsc;
56
56
struct ceph_mds_request *req;
57
57
struct rb_node *rp;
58
-
int pathlen = 0;
59
-
u64 pathbase;
60
58
char *path;
61
59
62
60
mutex_lock(&mdsc->mutex);
···
79
81
if (req->r_inode) {
80
82
seq_printf(s, " #%llx", ceph_ino(req->r_inode));
81
83
} else if (req->r_dentry) {
82
-
path = ceph_mdsc_build_path(mdsc, req->r_dentry, &pathlen,
83
-
&pathbase, 0);
84
+
struct ceph_path_info path_info;
85
+
path = ceph_mdsc_build_path(mdsc, req->r_dentry, &path_info, 0);
84
86
if (IS_ERR(path))
85
87
path = NULL;
86
88
spin_lock(&req->r_dentry->d_lock);
···
89
91
req->r_dentry,
90
92
path ? path : "");
91
93
spin_unlock(&req->r_dentry->d_lock);
92
-
ceph_mdsc_free_path(path, pathlen);
94
+
ceph_mdsc_free_path_info(&path_info);
93
95
} else if (req->r_path1) {
94
96
seq_printf(s, " #%llx/%s", req->r_ino1.ino,
95
97
req->r_path1);
···
98
100
}
99
101
100
102
if (req->r_old_dentry) {
101
-
path = ceph_mdsc_build_path(mdsc, req->r_old_dentry, &pathlen,
102
-
&pathbase, 0);
103
+
struct ceph_path_info path_info;
104
+
path = ceph_mdsc_build_path(mdsc, req->r_old_dentry, &path_info, 0);
103
105
if (IS_ERR(path))
104
106
path = NULL;
105
107
spin_lock(&req->r_old_dentry->d_lock);
···
109
111
req->r_old_dentry,
110
112
path ? path : "");
111
113
spin_unlock(&req->r_old_dentry->d_lock);
112
-
ceph_mdsc_free_path(path, pathlen);
114
+
ceph_mdsc_free_path_info(&path_info);
113
115
} else if (req->r_path2 && req->r_op != CEPH_MDS_OP_SYMLINK) {
114
116
if (req->r_ino2.ino)
115
117
seq_printf(s, " #%llx/%s", req->r_ino2.ino,
+7
-10
fs/ceph/dir.c
+7
-10
fs/ceph/dir.c
···
1271
1271
1272
1272
/* If op failed, mark everyone involved for errors */
1273
1273
if (result) {
1274
-
int pathlen = 0;
1275
-
u64 base = 0;
1276
-
char *path = ceph_mdsc_build_path(mdsc, dentry, &pathlen,
1277
-
&base, 0);
1274
+
struct ceph_path_info path_info = {0};
1275
+
char *path = ceph_mdsc_build_path(mdsc, dentry, &path_info, 0);
1278
1276
1279
1277
/* mark error on parent + clear complete */
1280
1278
mapping_set_error(req->r_parent->i_mapping, result);
···
1286
1288
mapping_set_error(req->r_old_inode->i_mapping, result);
1287
1289
1288
1290
pr_warn_client(cl, "failure path=(%llx)%s result=%d!\n",
1289
-
base, IS_ERR(path) ? "<<bad>>" : path, result);
1290
-
ceph_mdsc_free_path(path, pathlen);
1291
+
path_info.vino.ino, IS_ERR(path) ? "<<bad>>" : path, result);
1292
+
ceph_mdsc_free_path_info(&path_info);
1291
1293
}
1292
1294
out:
1293
1295
iput(req->r_old_inode);
···
1345
1347
int err = -EROFS;
1346
1348
int op;
1347
1349
char *path;
1348
-
int pathlen;
1349
-
u64 pathbase;
1350
1350
1351
1351
if (ceph_snap(dir) == CEPH_SNAPDIR) {
1352
1352
/* rmdir .snap/foo is RMSNAP */
···
1363
1367
if (!dn) {
1364
1368
try_async = false;
1365
1369
} else {
1366
-
path = ceph_mdsc_build_path(mdsc, dn, &pathlen, &pathbase, 0);
1370
+
struct ceph_path_info path_info;
1371
+
path = ceph_mdsc_build_path(mdsc, dn, &path_info, 0);
1367
1372
if (IS_ERR(path)) {
1368
1373
try_async = false;
1369
1374
err = 0;
1370
1375
} else {
1371
1376
err = ceph_mds_check_access(mdsc, path, MAY_WRITE);
1372
1377
}
1373
-
ceph_mdsc_free_path(path, pathlen);
1378
+
ceph_mdsc_free_path_info(&path_info);
1374
1379
dput(dn);
1375
1380
1376
1381
/* For none EACCES cases will let the MDS do the mds auth check */
+10
-14
fs/ceph/file.c
+10
-14
fs/ceph/file.c
···
368
368
int flags, fmode, wanted;
369
369
struct dentry *dentry;
370
370
char *path;
371
-
int pathlen;
372
-
u64 pathbase;
373
371
bool do_sync = false;
374
372
int mask = MAY_READ;
375
373
···
397
399
if (!dentry) {
398
400
do_sync = true;
399
401
} else {
400
-
path = ceph_mdsc_build_path(mdsc, dentry, &pathlen, &pathbase, 0);
402
+
struct ceph_path_info path_info;
403
+
path = ceph_mdsc_build_path(mdsc, dentry, &path_info, 0);
401
404
if (IS_ERR(path)) {
402
405
do_sync = true;
403
406
err = 0;
404
407
} else {
405
408
err = ceph_mds_check_access(mdsc, path, mask);
406
409
}
407
-
ceph_mdsc_free_path(path, pathlen);
410
+
ceph_mdsc_free_path_info(&path_info);
408
411
dput(dentry);
409
412
410
413
/* For none EACCES cases will let the MDS do the mds auth check */
···
613
614
mapping_set_error(req->r_parent->i_mapping, result);
614
615
615
616
if (result) {
616
-
int pathlen = 0;
617
-
u64 base = 0;
618
-
char *path = ceph_mdsc_build_path(mdsc, req->r_dentry, &pathlen,
619
-
&base, 0);
617
+
struct ceph_path_info path_info = {0};
618
+
char *path = ceph_mdsc_build_path(mdsc, req->r_dentry, &path_info, 0);
620
619
621
620
pr_warn_client(cl,
622
621
"async create failure path=(%llx)%s result=%d!\n",
623
-
base, IS_ERR(path) ? "<<bad>>" : path, result);
624
-
ceph_mdsc_free_path(path, pathlen);
622
+
path_info.vino.ino, IS_ERR(path) ? "<<bad>>" : path, result);
623
+
ceph_mdsc_free_path_info(&path_info);
625
624
626
625
ceph_dir_clear_complete(req->r_parent);
627
626
if (!d_unhashed(dentry))
···
788
791
int mask;
789
792
int err;
790
793
char *path;
791
-
int pathlen;
792
-
u64 pathbase;
793
794
794
795
doutc(cl, "%p %llx.%llx dentry %p '%pd' %s flags %d mode 0%o\n",
795
796
dir, ceph_vinop(dir), dentry, dentry,
···
809
814
if (!dn) {
810
815
try_async = false;
811
816
} else {
812
-
path = ceph_mdsc_build_path(mdsc, dn, &pathlen, &pathbase, 0);
817
+
struct ceph_path_info path_info;
818
+
path = ceph_mdsc_build_path(mdsc, dn, &path_info, 0);
813
819
if (IS_ERR(path)) {
814
820
try_async = false;
815
821
err = 0;
···
822
826
mask |= MAY_WRITE;
823
827
err = ceph_mds_check_access(mdsc, path, mask);
824
828
}
825
-
ceph_mdsc_free_path(path, pathlen);
829
+
ceph_mdsc_free_path_info(&path_info);
826
830
dput(dn);
827
831
828
832
/* For none EACCES cases will let the MDS do the mds auth check */
+72
-16
fs/ceph/inode.c
+72
-16
fs/ceph/inode.c
···
55
55
return 0;
56
56
}
57
57
58
+
/*
59
+
* Check if the parent inode matches the vino from directory reply info
60
+
*/
61
+
static inline bool ceph_vino_matches_parent(struct inode *parent,
62
+
struct ceph_vino vino)
63
+
{
64
+
return ceph_ino(parent) == vino.ino && ceph_snap(parent) == vino.snap;
65
+
}
66
+
67
+
/*
68
+
* Validate that the directory inode referenced by @req->r_parent matches the
69
+
* inode number and snapshot id contained in the reply's directory record. If
70
+
* they do not match – which can theoretically happen if the parent dentry was
71
+
* moved between the time the request was issued and the reply arrived – fall
72
+
* back to looking up the correct inode in the inode cache.
73
+
*
74
+
* A reference is *always* returned. Callers that receive a different inode
75
+
* than the original @parent are responsible for dropping the extra reference
76
+
* once the reply has been processed.
77
+
*/
78
+
static struct inode *ceph_get_reply_dir(struct super_block *sb,
79
+
struct inode *parent,
80
+
struct ceph_mds_reply_info_parsed *rinfo)
81
+
{
82
+
struct ceph_vino vino;
83
+
84
+
if (unlikely(!rinfo->diri.in))
85
+
return parent; /* nothing to compare against */
86
+
87
+
/* If we didn't have a cached parent inode to begin with, just bail out. */
88
+
if (!parent)
89
+
return NULL;
90
+
91
+
vino.ino = le64_to_cpu(rinfo->diri.in->ino);
92
+
vino.snap = le64_to_cpu(rinfo->diri.in->snapid);
93
+
94
+
if (likely(ceph_vino_matches_parent(parent, vino)))
95
+
return parent; /* matches – use the original reference */
96
+
97
+
/* Mismatch – this should be rare. Emit a WARN and obtain the correct inode. */
98
+
WARN_ONCE(1, "ceph: reply dir mismatch (parent valid %llx.%llx reply %llx.%llx)\n",
99
+
ceph_ino(parent), ceph_snap(parent), vino.ino, vino.snap);
100
+
101
+
return ceph_get_inode(sb, vino, NULL);
102
+
}
103
+
58
104
/**
59
105
* ceph_new_inode - allocate a new inode in advance of an expected create
60
106
* @dir: parent directory for new inode
···
1569
1523
struct ceph_vino tvino, dvino;
1570
1524
struct ceph_fs_client *fsc = ceph_sb_to_fs_client(sb);
1571
1525
struct ceph_client *cl = fsc->client;
1526
+
struct inode *parent_dir = NULL;
1572
1527
int err = 0;
1573
1528
1574
1529
doutc(cl, "%p is_dentry %d is_target %d\n", req,
···
1583
1536
}
1584
1537
1585
1538
if (rinfo->head->is_dentry) {
1586
-
struct inode *dir = req->r_parent;
1587
-
1588
-
if (dir) {
1589
-
err = ceph_fill_inode(dir, NULL, &rinfo->diri,
1539
+
/*
1540
+
* r_parent may be stale, in cases when R_PARENT_LOCKED is not set,
1541
+
* so we need to get the correct inode
1542
+
*/
1543
+
parent_dir = ceph_get_reply_dir(sb, req->r_parent, rinfo);
1544
+
if (unlikely(IS_ERR(parent_dir))) {
1545
+
err = PTR_ERR(parent_dir);
1546
+
goto done;
1547
+
}
1548
+
if (parent_dir) {
1549
+
err = ceph_fill_inode(parent_dir, NULL, &rinfo->diri,
1590
1550
rinfo->dirfrag, session, -1,
1591
1551
&req->r_caps_reservation);
1592
1552
if (err < 0)
···
1602
1548
WARN_ON_ONCE(1);
1603
1549
}
1604
1550
1605
-
if (dir && req->r_op == CEPH_MDS_OP_LOOKUPNAME &&
1551
+
if (parent_dir && req->r_op == CEPH_MDS_OP_LOOKUPNAME &&
1606
1552
test_bit(CEPH_MDS_R_PARENT_LOCKED, &req->r_req_flags) &&
1607
1553
!test_bit(CEPH_MDS_R_ABORTED, &req->r_req_flags)) {
1608
1554
bool is_nokey = false;
1609
1555
struct qstr dname;
1610
1556
struct dentry *dn, *parent;
1611
1557
struct fscrypt_str oname = FSTR_INIT(NULL, 0);
1612
-
struct ceph_fname fname = { .dir = dir,
1558
+
struct ceph_fname fname = { .dir = parent_dir,
1613
1559
.name = rinfo->dname,
1614
1560
.ctext = rinfo->altname,
1615
1561
.name_len = rinfo->dname_len,
···
1618
1564
BUG_ON(!rinfo->head->is_target);
1619
1565
BUG_ON(req->r_dentry);
1620
1566
1621
-
parent = d_find_any_alias(dir);
1567
+
parent = d_find_any_alias(parent_dir);
1622
1568
BUG_ON(!parent);
1623
1569
1624
-
err = ceph_fname_alloc_buffer(dir, &oname);
1570
+
err = ceph_fname_alloc_buffer(parent_dir, &oname);
1625
1571
if (err < 0) {
1626
1572
dput(parent);
1627
1573
goto done;
···
1630
1576
err = ceph_fname_to_usr(&fname, NULL, &oname, &is_nokey);
1631
1577
if (err < 0) {
1632
1578
dput(parent);
1633
-
ceph_fname_free_buffer(dir, &oname);
1579
+
ceph_fname_free_buffer(parent_dir, &oname);
1634
1580
goto done;
1635
1581
}
1636
1582
dname.name = oname.name;
···
1649
1595
dname.len, dname.name, dn);
1650
1596
if (!dn) {
1651
1597
dput(parent);
1652
-
ceph_fname_free_buffer(dir, &oname);
1598
+
ceph_fname_free_buffer(parent_dir, &oname);
1653
1599
err = -ENOMEM;
1654
1600
goto done;
1655
1601
}
···
1664
1610
ceph_snap(d_inode(dn)) != tvino.snap)) {
1665
1611
doutc(cl, " dn %p points to wrong inode %p\n",
1666
1612
dn, d_inode(dn));
1667
-
ceph_dir_clear_ordered(dir);
1613
+
ceph_dir_clear_ordered(parent_dir);
1668
1614
d_delete(dn);
1669
1615
dput(dn);
1670
1616
goto retry_lookup;
1671
1617
}
1672
-
ceph_fname_free_buffer(dir, &oname);
1618
+
ceph_fname_free_buffer(parent_dir, &oname);
1673
1619
1674
1620
req->r_dentry = dn;
1675
1621
dput(parent);
···
1848
1794
&dvino, ptvino);
1849
1795
}
1850
1796
done:
1797
+
/* Drop extra ref from ceph_get_reply_dir() if it returned a new inode */
1798
+
if (unlikely(!IS_ERR_OR_NULL(parent_dir) && parent_dir != req->r_parent))
1799
+
iput(parent_dir);
1851
1800
doutc(cl, "done err=%d\n", err);
1852
1801
return err;
1853
1802
}
···
2544
2487
int truncate_retry = 20; /* The RMW will take around 50ms */
2545
2488
struct dentry *dentry;
2546
2489
char *path;
2547
-
int pathlen;
2548
-
u64 pathbase;
2549
2490
bool do_sync = false;
2550
2491
2551
2492
dentry = d_find_alias(inode);
2552
2493
if (!dentry) {
2553
2494
do_sync = true;
2554
2495
} else {
2555
-
path = ceph_mdsc_build_path(mdsc, dentry, &pathlen, &pathbase, 0);
2496
+
struct ceph_path_info path_info;
2497
+
path = ceph_mdsc_build_path(mdsc, dentry, &path_info, 0);
2556
2498
if (IS_ERR(path)) {
2557
2499
do_sync = true;
2558
2500
err = 0;
2559
2501
} else {
2560
2502
err = ceph_mds_check_access(mdsc, path, MAY_WRITE);
2561
2503
}
2562
-
ceph_mdsc_free_path(path, pathlen);
2504
+
ceph_mdsc_free_path_info(&path_info);
2563
2505
dput(dentry);
2564
2506
2565
2507
/* For none EACCES cases will let the MDS do the mds auth check */
+105
-67
fs/ceph/mds_client.c
+105
-67
fs/ceph/mds_client.c
···
2681
2681
* ceph_mdsc_build_path - build a path string to a given dentry
2682
2682
* @mdsc: mds client
2683
2683
* @dentry: dentry to which path should be built
2684
-
* @plen: returned length of string
2685
-
* @pbase: returned base inode number
2684
+
* @path_info: output path, length, base ino+snap, and freepath ownership flag
2686
2685
* @for_wire: is this path going to be sent to the MDS?
2687
2686
*
2688
2687
* Build a string that represents the path to the dentry. This is mostly called
···
2699
2700
* foo/.snap/bar -> foo//bar
2700
2701
*/
2701
2702
char *ceph_mdsc_build_path(struct ceph_mds_client *mdsc, struct dentry *dentry,
2702
-
int *plen, u64 *pbase, int for_wire)
2703
+
struct ceph_path_info *path_info, int for_wire)
2703
2704
{
2704
2705
struct ceph_client *cl = mdsc->fsc->client;
2705
2706
struct dentry *cur;
···
2809
2810
return ERR_PTR(-ENAMETOOLONG);
2810
2811
}
2811
2812
2812
-
*pbase = base;
2813
-
*plen = PATH_MAX - 1 - pos;
2813
+
/* Initialize the output structure */
2814
+
memset(path_info, 0, sizeof(*path_info));
2815
+
2816
+
path_info->vino.ino = base;
2817
+
path_info->pathlen = PATH_MAX - 1 - pos;
2818
+
path_info->path = path + pos;
2819
+
path_info->freepath = true;
2820
+
2821
+
/* Set snap from dentry if available */
2822
+
if (d_inode(dentry))
2823
+
path_info->vino.snap = ceph_snap(d_inode(dentry));
2824
+
else
2825
+
path_info->vino.snap = CEPH_NOSNAP;
2826
+
2814
2827
doutc(cl, "on %p %d built %llx '%.*s'\n", dentry, d_count(dentry),
2815
-
base, *plen, path + pos);
2828
+
base, PATH_MAX - 1 - pos, path + pos);
2816
2829
return path + pos;
2817
2830
}
2818
2831
2819
2832
static int build_dentry_path(struct ceph_mds_client *mdsc, struct dentry *dentry,
2820
-
struct inode *dir, const char **ppath, int *ppathlen,
2821
-
u64 *pino, bool *pfreepath, bool parent_locked)
2833
+
struct inode *dir, struct ceph_path_info *path_info,
2834
+
bool parent_locked)
2822
2835
{
2823
2836
char *path;
2824
2837
···
2839
2828
dir = d_inode_rcu(dentry->d_parent);
2840
2829
if (dir && parent_locked && ceph_snap(dir) == CEPH_NOSNAP &&
2841
2830
!IS_ENCRYPTED(dir)) {
2842
-
*pino = ceph_ino(dir);
2831
+
path_info->vino.ino = ceph_ino(dir);
2832
+
path_info->vino.snap = ceph_snap(dir);
2843
2833
rcu_read_unlock();
2844
-
*ppath = dentry->d_name.name;
2845
-
*ppathlen = dentry->d_name.len;
2834
+
path_info->path = dentry->d_name.name;
2835
+
path_info->pathlen = dentry->d_name.len;
2836
+
path_info->freepath = false;
2846
2837
return 0;
2847
2838
}
2848
2839
rcu_read_unlock();
2849
-
path = ceph_mdsc_build_path(mdsc, dentry, ppathlen, pino, 1);
2840
+
path = ceph_mdsc_build_path(mdsc, dentry, path_info, 1);
2850
2841
if (IS_ERR(path))
2851
2842
return PTR_ERR(path);
2852
-
*ppath = path;
2853
-
*pfreepath = true;
2843
+
/*
2844
+
* ceph_mdsc_build_path already fills path_info, including snap handling.
2845
+
*/
2854
2846
return 0;
2855
2847
}
2856
2848
2857
-
static int build_inode_path(struct inode *inode,
2858
-
const char **ppath, int *ppathlen, u64 *pino,
2859
-
bool *pfreepath)
2849
+
static int build_inode_path(struct inode *inode, struct ceph_path_info *path_info)
2860
2850
{
2861
2851
struct ceph_mds_client *mdsc = ceph_sb_to_mdsc(inode->i_sb);
2862
2852
struct dentry *dentry;
2863
2853
char *path;
2864
2854
2865
2855
if (ceph_snap(inode) == CEPH_NOSNAP) {
2866
-
*pino = ceph_ino(inode);
2867
-
*ppathlen = 0;
2856
+
path_info->vino.ino = ceph_ino(inode);
2857
+
path_info->vino.snap = ceph_snap(inode);
2858
+
path_info->pathlen = 0;
2859
+
path_info->freepath = false;
2868
2860
return 0;
2869
2861
}
2870
2862
dentry = d_find_alias(inode);
2871
-
path = ceph_mdsc_build_path(mdsc, dentry, ppathlen, pino, 1);
2863
+
path = ceph_mdsc_build_path(mdsc, dentry, path_info, 1);
2872
2864
dput(dentry);
2873
2865
if (IS_ERR(path))
2874
2866
return PTR_ERR(path);
2875
-
*ppath = path;
2876
-
*pfreepath = true;
2867
+
/*
2868
+
* ceph_mdsc_build_path already fills path_info, including snap from dentry.
2869
+
* Override with inode's snap since that's what this function is for.
2870
+
*/
2871
+
path_info->vino.snap = ceph_snap(inode);
2877
2872
return 0;
2878
2873
}
2879
2874
···
2889
2872
*/
2890
2873
static int set_request_path_attr(struct ceph_mds_client *mdsc, struct inode *rinode,
2891
2874
struct dentry *rdentry, struct inode *rdiri,
2892
-
const char *rpath, u64 rino, const char **ppath,
2893
-
int *pathlen, u64 *ino, bool *freepath,
2875
+
const char *rpath, u64 rino,
2876
+
struct ceph_path_info *path_info,
2894
2877
bool parent_locked)
2895
2878
{
2896
2879
struct ceph_client *cl = mdsc->fsc->client;
2897
2880
int r = 0;
2898
2881
2882
+
/* Initialize the output structure */
2883
+
memset(path_info, 0, sizeof(*path_info));
2884
+
2899
2885
if (rinode) {
2900
-
r = build_inode_path(rinode, ppath, pathlen, ino, freepath);
2886
+
r = build_inode_path(rinode, path_info);
2901
2887
doutc(cl, " inode %p %llx.%llx\n", rinode, ceph_ino(rinode),
2902
2888
ceph_snap(rinode));
2903
2889
} else if (rdentry) {
2904
-
r = build_dentry_path(mdsc, rdentry, rdiri, ppath, pathlen, ino,
2905
-
freepath, parent_locked);
2906
-
doutc(cl, " dentry %p %llx/%.*s\n", rdentry, *ino, *pathlen, *ppath);
2890
+
r = build_dentry_path(mdsc, rdentry, rdiri, path_info, parent_locked);
2891
+
doutc(cl, " dentry %p %llx/%.*s\n", rdentry, path_info->vino.ino,
2892
+
path_info->pathlen, path_info->path);
2907
2893
} else if (rpath || rino) {
2908
-
*ino = rino;
2909
-
*ppath = rpath;
2910
-
*pathlen = rpath ? strlen(rpath) : 0;
2911
-
doutc(cl, " path %.*s\n", *pathlen, rpath);
2894
+
path_info->vino.ino = rino;
2895
+
path_info->vino.snap = CEPH_NOSNAP;
2896
+
path_info->path = rpath;
2897
+
path_info->pathlen = rpath ? strlen(rpath) : 0;
2898
+
path_info->freepath = false;
2899
+
2900
+
doutc(cl, " path %.*s\n", path_info->pathlen, rpath);
2912
2901
}
2913
2902
2914
2903
return r;
···
2991
2968
struct ceph_client *cl = mdsc->fsc->client;
2992
2969
struct ceph_msg *msg;
2993
2970
struct ceph_mds_request_head_legacy *lhead;
2994
-
const char *path1 = NULL;
2995
-
const char *path2 = NULL;
2996
-
u64 ino1 = 0, ino2 = 0;
2997
-
int pathlen1 = 0, pathlen2 = 0;
2998
-
bool freepath1 = false, freepath2 = false;
2971
+
struct ceph_path_info path_info1 = {0};
2972
+
struct ceph_path_info path_info2 = {0};
2999
2973
struct dentry *old_dentry = NULL;
3000
2974
int len;
3001
2975
u16 releases;
···
3002
2982
u16 request_head_version = mds_supported_head_version(session);
3003
2983
kuid_t caller_fsuid = req->r_cred->fsuid;
3004
2984
kgid_t caller_fsgid = req->r_cred->fsgid;
2985
+
bool parent_locked = test_bit(CEPH_MDS_R_PARENT_LOCKED, &req->r_req_flags);
3005
2986
3006
2987
ret = set_request_path_attr(mdsc, req->r_inode, req->r_dentry,
3007
-
req->r_parent, req->r_path1, req->r_ino1.ino,
3008
-
&path1, &pathlen1, &ino1, &freepath1,
3009
-
test_bit(CEPH_MDS_R_PARENT_LOCKED,
3010
-
&req->r_req_flags));
2988
+
req->r_parent, req->r_path1, req->r_ino1.ino,
2989
+
&path_info1, parent_locked);
3011
2990
if (ret < 0) {
3012
2991
msg = ERR_PTR(ret);
3013
2992
goto out;
2993
+
}
2994
+
2995
+
/*
2996
+
* When the parent directory's i_rwsem is *not* locked, req->r_parent may
2997
+
* have become stale (e.g. after a concurrent rename) between the time the
2998
+
* dentry was looked up and now. If we detect that the stored r_parent
2999
+
* does not match the inode number we just encoded for the request, switch
3000
+
* to the correct inode so that the MDS receives a valid parent reference.
3001
+
*/
3002
+
if (!parent_locked && req->r_parent && path_info1.vino.ino &&
3003
+
ceph_ino(req->r_parent) != path_info1.vino.ino) {
3004
+
struct inode *old_parent = req->r_parent;
3005
+
struct inode *correct_dir = ceph_get_inode(mdsc->fsc->sb, path_info1.vino, NULL);
3006
+
if (!IS_ERR(correct_dir)) {
3007
+
WARN_ONCE(1, "ceph: r_parent mismatch (had %llx wanted %llx) - updating\n",
3008
+
ceph_ino(old_parent), path_info1.vino.ino);
3009
+
/*
3010
+
* Transfer CEPH_CAP_PIN from the old parent to the new one.
3011
+
* The pin was taken earlier in ceph_mdsc_submit_request().
3012
+
*/
3013
+
ceph_put_cap_refs(ceph_inode(old_parent), CEPH_CAP_PIN);
3014
+
iput(old_parent);
3015
+
req->r_parent = correct_dir;
3016
+
ceph_get_cap_refs(ceph_inode(req->r_parent), CEPH_CAP_PIN);
3017
+
}
3014
3018
}
3015
3019
3016
3020
/* If r_old_dentry is set, then assume that its parent is locked */
···
3042
2998
!(req->r_old_dentry->d_flags & DCACHE_DISCONNECTED))
3043
2999
old_dentry = req->r_old_dentry;
3044
3000
ret = set_request_path_attr(mdsc, NULL, old_dentry,
3045
-
req->r_old_dentry_dir,
3046
-
req->r_path2, req->r_ino2.ino,
3047
-
&path2, &pathlen2, &ino2, &freepath2, true);
3001
+
req->r_old_dentry_dir,
3002
+
req->r_path2, req->r_ino2.ino,
3003
+
&path_info2, true);
3048
3004
if (ret < 0) {
3049
3005
msg = ERR_PTR(ret);
3050
3006
goto out_free1;
···
3075
3031
3076
3032
/* filepaths */
3077
3033
len += 2 * (1 + sizeof(u32) + sizeof(u64));
3078
-
len += pathlen1 + pathlen2;
3034
+
len += path_info1.pathlen + path_info2.pathlen;
3079
3035
3080
3036
/* cap releases */
3081
3037
len += sizeof(struct ceph_mds_request_release) *
···
3083
3039
!!req->r_old_inode_drop + !!req->r_old_dentry_drop);
3084
3040
3085
3041
if (req->r_dentry_drop)
3086
-
len += pathlen1;
3042
+
len += path_info1.pathlen;
3087
3043
if (req->r_old_dentry_drop)
3088
-
len += pathlen2;
3044
+
len += path_info2.pathlen;
3089
3045
3090
3046
/* MClientRequest tail */
3091
3047
···
3198
3154
lhead->ino = cpu_to_le64(req->r_deleg_ino);
3199
3155
lhead->args = req->r_args;
3200
3156
3201
-
ceph_encode_filepath(&p, end, ino1, path1);
3202
-
ceph_encode_filepath(&p, end, ino2, path2);
3157
+
ceph_encode_filepath(&p, end, path_info1.vino.ino, path_info1.path);
3158
+
ceph_encode_filepath(&p, end, path_info2.vino.ino, path_info2.path);
3203
3159
3204
3160
/* make note of release offset, in case we need to replay */
3205
3161
req->r_request_release_offset = p - msg->front.iov_base;
···
3262
3218
msg->hdr.data_off = cpu_to_le16(0);
3263
3219
3264
3220
out_free2:
3265
-
if (freepath2)
3266
-
ceph_mdsc_free_path((char *)path2, pathlen2);
3221
+
ceph_mdsc_free_path_info(&path_info2);
3267
3222
out_free1:
3268
-
if (freepath1)
3269
-
ceph_mdsc_free_path((char *)path1, pathlen1);
3223
+
ceph_mdsc_free_path_info(&path_info1);
3270
3224
out:
3271
3225
return msg;
3272
3226
out_err:
···
4621
4579
struct ceph_pagelist *pagelist = recon_state->pagelist;
4622
4580
struct dentry *dentry;
4623
4581
struct ceph_cap *cap;
4624
-
char *path;
4625
-
int pathlen = 0, err;
4626
-
u64 pathbase;
4582
+
struct ceph_path_info path_info = {0};
4583
+
int err;
4627
4584
u64 snap_follows;
4628
4585
4629
4586
dentry = d_find_primary(inode);
4630
4587
if (dentry) {
4631
4588
/* set pathbase to parent dir when msg_version >= 2 */
4632
-
path = ceph_mdsc_build_path(mdsc, dentry, &pathlen, &pathbase,
4589
+
char *path = ceph_mdsc_build_path(mdsc, dentry, &path_info,
4633
4590
recon_state->msg_version >= 2);
4634
4591
dput(dentry);
4635
4592
if (IS_ERR(path)) {
4636
4593
err = PTR_ERR(path);
4637
4594
goto out_err;
4638
4595
}
4639
-
} else {
4640
-
path = NULL;
4641
-
pathbase = 0;
4642
4596
}
4643
4597
4644
4598
spin_lock(&ci->i_ceph_lock);
···
4667
4629
rec.v2.wanted = cpu_to_le32(__ceph_caps_wanted(ci));
4668
4630
rec.v2.issued = cpu_to_le32(cap->issued);
4669
4631
rec.v2.snaprealm = cpu_to_le64(ci->i_snap_realm->ino);
4670
-
rec.v2.pathbase = cpu_to_le64(pathbase);
4632
+
rec.v2.pathbase = cpu_to_le64(path_info.vino.ino);
4671
4633
rec.v2.flock_len = (__force __le32)
4672
4634
((ci->i_ceph_flags & CEPH_I_ERROR_FILELOCK) ? 0 : 1);
4673
4635
} else {
···
4682
4644
ts = inode_get_atime(inode);
4683
4645
ceph_encode_timespec64(&rec.v1.atime, &ts);
4684
4646
rec.v1.snaprealm = cpu_to_le64(ci->i_snap_realm->ino);
4685
-
rec.v1.pathbase = cpu_to_le64(pathbase);
4647
+
rec.v1.pathbase = cpu_to_le64(path_info.vino.ino);
4686
4648
}
4687
4649
4688
4650
if (list_empty(&ci->i_cap_snaps)) {
···
4744
4706
sizeof(struct ceph_filelock);
4745
4707
rec.v2.flock_len = cpu_to_le32(struct_len);
4746
4708
4747
-
struct_len += sizeof(u32) + pathlen + sizeof(rec.v2);
4709
+
struct_len += sizeof(u32) + path_info.pathlen + sizeof(rec.v2);
4748
4710
4749
4711
if (struct_v >= 2)
4750
4712
struct_len += sizeof(u64); /* snap_follows */
···
4768
4730
ceph_pagelist_encode_8(pagelist, 1);
4769
4731
ceph_pagelist_encode_32(pagelist, struct_len);
4770
4732
}
4771
-
ceph_pagelist_encode_string(pagelist, path, pathlen);
4733
+
ceph_pagelist_encode_string(pagelist, (char *)path_info.path, path_info.pathlen);
4772
4734
ceph_pagelist_append(pagelist, &rec, sizeof(rec.v2));
4773
4735
ceph_locks_to_pagelist(flocks, pagelist,
4774
4736
num_fcntl_locks, num_flock_locks);
···
4779
4741
} else {
4780
4742
err = ceph_pagelist_reserve(pagelist,
4781
4743
sizeof(u64) + sizeof(u32) +
4782
-
pathlen + sizeof(rec.v1));
4744
+
path_info.pathlen + sizeof(rec.v1));
4783
4745
if (err)
4784
4746
goto out_err;
4785
4747
4786
4748
ceph_pagelist_encode_64(pagelist, ceph_ino(inode));
4787
-
ceph_pagelist_encode_string(pagelist, path, pathlen);
4749
+
ceph_pagelist_encode_string(pagelist, (char *)path_info.path, path_info.pathlen);
4788
4750
ceph_pagelist_append(pagelist, &rec, sizeof(rec.v1));
4789
4751
}
4790
4752
4791
4753
out_err:
4792
-
ceph_mdsc_free_path(path, pathlen);
4754
+
ceph_mdsc_free_path_info(&path_info);
4793
4755
if (!err)
4794
4756
recon_state->nr_caps++;
4795
4757
return err;
+14
-4
fs/ceph/mds_client.h
+14
-4
fs/ceph/mds_client.h
···
617
617
618
618
extern void ceph_mdsc_pre_umount(struct ceph_mds_client *mdsc);
619
619
620
-
static inline void ceph_mdsc_free_path(char *path, int len)
620
+
/*
621
+
* Structure to group path-related output parameters for build_*_path functions
622
+
*/
623
+
struct ceph_path_info {
624
+
const char *path;
625
+
int pathlen;
626
+
struct ceph_vino vino;
627
+
bool freepath;
628
+
};
629
+
630
+
static inline void ceph_mdsc_free_path_info(const struct ceph_path_info *path_info)
621
631
{
622
-
if (!IS_ERR_OR_NULL(path))
623
-
__putname(path - (PATH_MAX - 1 - len));
632
+
if (path_info && path_info->freepath && !IS_ERR_OR_NULL(path_info->path))
633
+
__putname((char *)path_info->path - (PATH_MAX - 1 - path_info->pathlen));
624
634
}
625
635
626
636
extern char *ceph_mdsc_build_path(struct ceph_mds_client *mdsc,
627
-
struct dentry *dentry, int *plen, u64 *base,
637
+
struct dentry *dentry, struct ceph_path_info *path_info,
628
638
int for_wire);
629
639
630
640
extern void __ceph_mdsc_drop_dentry_lease(struct dentry *dentry);
+4
fs/coredump.c
+4
fs/coredump.c
···
1466
1466
ssize_t retval;
1467
1467
char old_core_pattern[CORENAME_MAX_SIZE];
1468
1468
1469
+
if (write)
1470
+
return proc_dostring(table, write, buffer, lenp, ppos);
1471
+
1469
1472
retval = strscpy(old_core_pattern, core_pattern, CORENAME_MAX_SIZE);
1470
1473
1471
1474
error = proc_dostring(table, write, buffer, lenp, ppos);
1472
1475
if (error)
1473
1476
return error;
1477
+
1474
1478
if (!check_coredump_socket()) {
1475
1479
strscpy(core_pattern, old_core_pattern, retval + 1);
1476
1480
return -EINVAL;
+5
-3
fs/erofs/erofs_fs.h
+5
-3
fs/erofs/erofs_fs.h
···
12
12
/* to allow for x86 boot sectors and other oddities. */
13
13
#define EROFS_SUPER_OFFSET 1024
14
14
15
-
#define EROFS_FEATURE_COMPAT_SB_CHKSUM 0x00000001
16
-
#define EROFS_FEATURE_COMPAT_MTIME 0x00000002
17
-
#define EROFS_FEATURE_COMPAT_XATTR_FILTER 0x00000004
15
+
#define EROFS_FEATURE_COMPAT_SB_CHKSUM 0x00000001
16
+
#define EROFS_FEATURE_COMPAT_MTIME 0x00000002
17
+
#define EROFS_FEATURE_COMPAT_XATTR_FILTER 0x00000004
18
18
#define EROFS_FEATURE_COMPAT_SHARED_EA_IN_METABOX 0x00000008
19
+
#define EROFS_FEATURE_COMPAT_PLAIN_XATTR_PFX 0x00000010
20
+
19
21
20
22
/*
21
23
* Any bits that aren't in EROFS_ALL_FEATURE_INCOMPAT should
+1
fs/erofs/internal.h
+1
fs/erofs/internal.h
···
234
234
EROFS_FEATURE_FUNCS(sb_chksum, compat, COMPAT_SB_CHKSUM)
235
235
EROFS_FEATURE_FUNCS(xattr_filter, compat, COMPAT_XATTR_FILTER)
236
236
EROFS_FEATURE_FUNCS(shared_ea_in_metabox, compat, COMPAT_SHARED_EA_IN_METABOX)
237
+
EROFS_FEATURE_FUNCS(plain_xattr_pfx, compat, COMPAT_PLAIN_XATTR_PFX)
237
238
238
239
static inline u64 erofs_nid_to_ino64(struct erofs_sb_info *sbi, erofs_nid_t nid)
239
240
{
+12
fs/erofs/super.c
+12
fs/erofs/super.c
···
1018
1018
return 0;
1019
1019
}
1020
1020
1021
+
static void erofs_evict_inode(struct inode *inode)
1022
+
{
1023
+
#ifdef CONFIG_FS_DAX
1024
+
if (IS_DAX(inode))
1025
+
dax_break_layout_final(inode);
1026
+
#endif
1027
+
1028
+
truncate_inode_pages_final(&inode->i_data);
1029
+
clear_inode(inode);
1030
+
}
1031
+
1021
1032
const struct super_operations erofs_sops = {
1022
1033
.put_super = erofs_put_super,
1023
1034
.alloc_inode = erofs_alloc_inode,
1024
1035
.free_inode = erofs_free_inode,
1036
+
.evict_inode = erofs_evict_inode,
1025
1037
.statfs = erofs_statfs,
1026
1038
.show_options = erofs_show_options,
1027
1039
};
+10
-3
fs/erofs/xattr.c
+10
-3
fs/erofs/xattr.c
···
482
482
erofs_off_t pos = (erofs_off_t)sbi->xattr_prefix_start << 2;
483
483
struct erofs_xattr_prefix_item *pfs;
484
484
int ret = 0, i, len;
485
+
bool plain = erofs_sb_has_plain_xattr_pfx(sbi);
485
486
486
487
if (!sbi->xattr_prefix_count)
487
488
return 0;
···
491
490
if (!pfs)
492
491
return -ENOMEM;
493
492
494
-
if (sbi->packed_inode)
495
-
buf.mapping = sbi->packed_inode->i_mapping;
496
-
else
493
+
if (!plain) {
494
+
if (erofs_sb_has_metabox(sbi))
495
+
(void)erofs_init_metabuf(&buf, sb, true);
496
+
else if (sbi->packed_inode)
497
+
buf.mapping = sbi->packed_inode->i_mapping;
498
+
else
499
+
plain = true;
500
+
}
501
+
if (plain)
497
502
(void)erofs_init_metabuf(&buf, sb, false);
498
503
499
504
for (i = 0; i < sbi->xattr_prefix_count; i++) {
+37
-30
fs/erofs/zmap.c
+37
-30
fs/erofs/zmap.c
···
394
394
.map = map,
395
395
.in_mbox = erofs_inode_in_metabox(inode),
396
396
};
397
-
int err = 0;
398
-
unsigned int endoff, afmt;
397
+
unsigned int endoff;
399
398
unsigned long initial_lcn;
400
399
unsigned long long ofs, end;
400
+
int err;
401
401
402
402
ofs = flags & EROFS_GET_BLOCKS_FINDTAIL ? inode->i_size - 1 : map->m_la;
403
403
if (fragment && !(flags & EROFS_GET_BLOCKS_FINDTAIL) &&
···
482
482
err = -EFSCORRUPTED;
483
483
goto unmap_out;
484
484
}
485
-
afmt = vi->z_advise & Z_EROFS_ADVISE_INTERLACED_PCLUSTER ?
486
-
Z_EROFS_COMPRESSION_INTERLACED :
487
-
Z_EROFS_COMPRESSION_SHIFTED;
485
+
if (vi->z_advise & Z_EROFS_ADVISE_INTERLACED_PCLUSTER)
486
+
map->m_algorithmformat = Z_EROFS_COMPRESSION_INTERLACED;
487
+
else
488
+
map->m_algorithmformat = Z_EROFS_COMPRESSION_SHIFTED;
489
+
} else if (m.headtype == Z_EROFS_LCLUSTER_TYPE_HEAD2) {
490
+
map->m_algorithmformat = vi->z_algorithmtype[1];
488
491
} else {
489
-
afmt = m.headtype == Z_EROFS_LCLUSTER_TYPE_HEAD2 ?
490
-
vi->z_algorithmtype[1] : vi->z_algorithmtype[0];
491
-
if (!(EROFS_I_SB(inode)->available_compr_algs & (1 << afmt))) {
492
-
erofs_err(sb, "inconsistent algorithmtype %u for nid %llu",
493
-
afmt, vi->nid);
494
-
err = -EFSCORRUPTED;
495
-
goto unmap_out;
496
-
}
492
+
map->m_algorithmformat = vi->z_algorithmtype[0];
497
493
}
498
-
map->m_algorithmformat = afmt;
499
494
500
495
if ((flags & EROFS_GET_BLOCKS_FIEMAP) ||
501
496
((flags & EROFS_GET_BLOCKS_READMORE) &&
···
621
626
{
622
627
struct erofs_inode *const vi = EROFS_I(inode);
623
628
struct super_block *const sb = inode->i_sb;
624
-
int err, headnr;
625
-
erofs_off_t pos;
626
629
struct z_erofs_map_header *h;
630
+
erofs_off_t pos;
631
+
int err = 0;
627
632
628
633
if (test_bit(EROFS_I_Z_INITED_BIT, &vi->flags)) {
629
634
/*
···
637
642
if (wait_on_bit_lock(&vi->flags, EROFS_I_BL_Z_BIT, TASK_KILLABLE))
638
643
return -ERESTARTSYS;
639
644
640
-
err = 0;
641
645
if (test_bit(EROFS_I_Z_INITED_BIT, &vi->flags))
642
646
goto out_unlock;
643
647
···
672
678
vi->z_fragmentoff = le32_to_cpu(h->h_fragmentoff);
673
679
else if (vi->z_advise & Z_EROFS_ADVISE_INLINE_PCLUSTER)
674
680
vi->z_idata_size = le16_to_cpu(h->h_idata_size);
675
-
676
-
headnr = 0;
677
-
if (vi->z_algorithmtype[0] >= Z_EROFS_COMPRESSION_MAX ||
678
-
vi->z_algorithmtype[++headnr] >= Z_EROFS_COMPRESSION_MAX) {
679
-
erofs_err(sb, "unknown HEAD%u format %u for nid %llu, please upgrade kernel",
680
-
headnr + 1, vi->z_algorithmtype[headnr], vi->nid);
681
-
err = -EOPNOTSUPP;
682
-
goto out_unlock;
683
-
}
684
681
685
682
if (!erofs_sb_has_big_pcluster(EROFS_SB(sb)) &&
686
683
vi->z_advise & (Z_EROFS_ADVISE_BIG_PCLUSTER_1 |
···
711
726
return err;
712
727
}
713
728
729
+
static int z_erofs_map_sanity_check(struct inode *inode,
730
+
struct erofs_map_blocks *map)
731
+
{
732
+
struct erofs_sb_info *sbi = EROFS_I_SB(inode);
733
+
734
+
if (!(map->m_flags & EROFS_MAP_ENCODED))
735
+
return 0;
736
+
if (unlikely(map->m_algorithmformat >= Z_EROFS_COMPRESSION_RUNTIME_MAX)) {
737
+
erofs_err(inode->i_sb, "unknown algorithm %d @ pos %llu for nid %llu, please upgrade kernel",
738
+
map->m_algorithmformat, map->m_la, EROFS_I(inode)->nid);
739
+
return -EOPNOTSUPP;
740
+
}
741
+
if (unlikely(map->m_algorithmformat < Z_EROFS_COMPRESSION_MAX &&
742
+
!(sbi->available_compr_algs & (1 << map->m_algorithmformat)))) {
743
+
erofs_err(inode->i_sb, "inconsistent algorithmtype %u for nid %llu",
744
+
map->m_algorithmformat, EROFS_I(inode)->nid);
745
+
return -EFSCORRUPTED;
746
+
}
747
+
if (unlikely(map->m_plen > Z_EROFS_PCLUSTER_MAX_SIZE ||
748
+
map->m_llen > Z_EROFS_PCLUSTER_MAX_DSIZE))
749
+
return -EOPNOTSUPP;
750
+
return 0;
751
+
}
752
+
714
753
int z_erofs_map_blocks_iter(struct inode *inode, struct erofs_map_blocks *map,
715
754
int flags)
716
755
{
···
755
746
else
756
747
err = z_erofs_map_blocks_fo(inode, map, flags);
757
748
}
758
-
if (!err && (map->m_flags & EROFS_MAP_ENCODED) &&
759
-
unlikely(map->m_plen > Z_EROFS_PCLUSTER_MAX_SIZE ||
760
-
map->m_llen > Z_EROFS_PCLUSTER_MAX_DSIZE))
761
-
err = -EOPNOTSUPP;
749
+
if (!err)
750
+
err = z_erofs_map_sanity_check(inode, map);
762
751
if (err)
763
752
map->m_llen = 0;
764
753
}
+1
-1
fs/exec.c
+1
-1
fs/exec.c
+8
fs/fhandle.c
+8
fs/fhandle.c
···
208
208
return 1;
209
209
210
210
/*
211
+
* Verify that the decoded dentry itself has a valid id mapping.
212
+
* In case the decoded dentry is the mountfd root itself, this
213
+
* verifies that the mountfd inode itself has a valid id mapping.
214
+
*/
215
+
if (!privileged_wrt_inode_uidgid(user_ns, idmap, d_inode(dentry)))
216
+
return 0;
217
+
218
+
/*
211
219
* It's racy as we're not taking rename_lock but we're able to ignore
212
220
* permissions and we just need an approximation whether we were able
213
221
* to follow a path to the file.
+1
-1
fs/fuse/dev.c
+1
-1
fs/fuse/dev.c
+2
-1
fs/fuse/dir.c
+2
-1
fs/fuse/dir.c
···
1199
1199
if (attr->blksize != 0)
1200
1200
blkbits = ilog2(attr->blksize);
1201
1201
else
1202
-
blkbits = inode->i_sb->s_blocksize_bits;
1202
+
blkbits = fc->blkbits;
1203
1203
1204
1204
stat->blksize = 1 << blkbits;
1205
1205
}
···
1377
1377
generic_fillattr(idmap, request_mask, inode, stat);
1378
1378
stat->mode = fi->orig_i_mode;
1379
1379
stat->ino = fi->orig_ino;
1380
+
stat->blksize = 1 << fi->cached_i_blkbits;
1380
1381
if (test_bit(FUSE_I_BTIME, &fi->state)) {
1381
1382
stat->btime = fi->i_btime;
1382
1383
stat->result_mask |= STATX_BTIME;
+4
-1
fs/fuse/file.c
+4
-1
fs/fuse/file.c
···
2960
2960
.nodeid_out = ff_out->nodeid,
2961
2961
.fh_out = ff_out->fh,
2962
2962
.off_out = pos_out,
2963
-
.len = len,
2963
+
.len = min_t(size_t, len, UINT_MAX & PAGE_MASK),
2964
2964
.flags = flags
2965
2965
};
2966
2966
struct fuse_write_out outarg;
···
3026
3026
fc->no_copy_file_range = 1;
3027
3027
err = -EOPNOTSUPP;
3028
3028
}
3029
+
if (!err && outarg.size > len)
3030
+
err = -EIO;
3031
+
3029
3032
if (err)
3030
3033
goto out;
3031
3034
+14
fs/fuse/fuse_i.h
+14
fs/fuse/fuse_i.h
···
210
210
/** Reference to backing file in passthrough mode */
211
211
struct fuse_backing *fb;
212
212
#endif
213
+
214
+
/*
215
+
* The underlying inode->i_blkbits value will not be modified,
216
+
* so preserve the blocksize specified by the server.
217
+
*/
218
+
u8 cached_i_blkbits;
213
219
};
214
220
215
221
/** FUSE inode state bits */
···
975
969
/* Request timeout (in jiffies). 0 = no timeout */
976
970
unsigned int req_timeout;
977
971
} timeout;
972
+
973
+
/*
974
+
* This is a workaround until fuse uses iomap for reads.
975
+
* For fuseblk servers, this represents the blocksize passed in at
976
+
* mount time and for regular fuse servers, this is equivalent to
977
+
* inode->i_blkbits.
978
+
*/
979
+
u8 blkbits;
978
980
};
979
981
980
982
/*
+16
fs/fuse/inode.c
+16
fs/fuse/inode.c
···
289
289
}
290
290
}
291
291
292
+
if (attr->blksize)
293
+
fi->cached_i_blkbits = ilog2(attr->blksize);
294
+
else
295
+
fi->cached_i_blkbits = fc->blkbits;
296
+
292
297
/*
293
298
* Don't set the sticky bit in i_mode, unless we want the VFS
294
299
* to check permissions. This prevents failures due to the
···
1810
1805
err = -EINVAL;
1811
1806
if (!sb_set_blocksize(sb, ctx->blksize))
1812
1807
goto err;
1808
+
/*
1809
+
* This is a workaround until fuse hooks into iomap for reads.
1810
+
* Use PAGE_SIZE for the blocksize else if the writeback cache
1811
+
* is enabled, buffered writes go through iomap and a read may
1812
+
* overwrite partially written data if blocksize < PAGE_SIZE
1813
+
*/
1814
+
fc->blkbits = sb->s_blocksize_bits;
1815
+
if (ctx->blksize != PAGE_SIZE &&
1816
+
!sb_set_blocksize(sb, PAGE_SIZE))
1817
+
goto err;
1813
1818
#endif
1814
1819
} else {
1815
1820
sb->s_blocksize = PAGE_SIZE;
1816
1821
sb->s_blocksize_bits = PAGE_SHIFT;
1822
+
fc->blkbits = sb->s_blocksize_bits;
1817
1823
}
1818
1824
1819
1825
sb->s_subtype = ctx->subtype;
+5
fs/fuse/passthrough.c
+5
fs/fuse/passthrough.c
···
237
237
if (!file)
238
238
goto out;
239
239
240
+
/* read/write/splice/mmap passthrough only relevant for regular files */
241
+
res = d_is_dir(file->f_path.dentry) ? -EISDIR : -EINVAL;
242
+
if (!d_is_reg(file->f_path.dentry))
243
+
goto out_fput;
244
+
240
245
backing_sb = file_inode(file)->i_sb;
241
246
res = -ELOOP;
242
247
if (backing_sb->s_stack_depth >= fc->max_stack_depth)
+1
-1
fs/fuse/virtio_fs.c
+1
-1
fs/fuse/virtio_fs.c
+38
-20
fs/kernfs/file.c
+38
-20
fs/kernfs/file.c
···
70
70
!list_empty(&of->list));
71
71
}
72
72
73
+
/* Get active reference to kernfs node for an open file */
74
+
static struct kernfs_open_file *kernfs_get_active_of(struct kernfs_open_file *of)
75
+
{
76
+
/* Skip if file was already released */
77
+
if (unlikely(of->released))
78
+
return NULL;
79
+
80
+
if (!kernfs_get_active(of->kn))
81
+
return NULL;
82
+
83
+
return of;
84
+
}
85
+
86
+
static void kernfs_put_active_of(struct kernfs_open_file *of)
87
+
{
88
+
return kernfs_put_active(of->kn);
89
+
}
90
+
73
91
/**
74
92
* kernfs_deref_open_node_locked - Get kernfs_open_node corresponding to @kn
75
93
*
···
157
139
158
140
if (ops->seq_stop)
159
141
ops->seq_stop(sf, v);
160
-
kernfs_put_active(of->kn);
142
+
kernfs_put_active_of(of);
161
143
}
162
144
163
145
static void *kernfs_seq_start(struct seq_file *sf, loff_t *ppos)
···
170
152
* the ops aren't called concurrently for the same open file.
171
153
*/
172
154
mutex_lock(&of->mutex);
173
-
if (!kernfs_get_active(of->kn))
155
+
if (!kernfs_get_active_of(of))
174
156
return ERR_PTR(-ENODEV);
175
157
176
158
ops = kernfs_ops(of->kn);
···
256
238
* the ops aren't called concurrently for the same open file.
257
239
*/
258
240
mutex_lock(&of->mutex);
259
-
if (!kernfs_get_active(of->kn)) {
241
+
if (!kernfs_get_active_of(of)) {
260
242
len = -ENODEV;
261
243
mutex_unlock(&of->mutex);
262
244
goto out_free;
···
270
252
else
271
253
len = -EINVAL;
272
254
273
-
kernfs_put_active(of->kn);
255
+
kernfs_put_active_of(of);
274
256
mutex_unlock(&of->mutex);
275
257
276
258
if (len < 0)
···
341
323
* the ops aren't called concurrently for the same open file.
342
324
*/
343
325
mutex_lock(&of->mutex);
344
-
if (!kernfs_get_active(of->kn)) {
326
+
if (!kernfs_get_active_of(of)) {
345
327
mutex_unlock(&of->mutex);
346
328
len = -ENODEV;
347
329
goto out_free;
···
353
335
else
354
336
len = -EINVAL;
355
337
356
-
kernfs_put_active(of->kn);
338
+
kernfs_put_active_of(of);
357
339
mutex_unlock(&of->mutex);
358
340
359
341
if (len > 0)
···
375
357
if (!of->vm_ops)
376
358
return;
377
359
378
-
if (!kernfs_get_active(of->kn))
360
+
if (!kernfs_get_active_of(of))
379
361
return;
380
362
381
363
if (of->vm_ops->open)
382
364
of->vm_ops->open(vma);
383
365
384
-
kernfs_put_active(of->kn);
366
+
kernfs_put_active_of(of);
385
367
}
386
368
387
369
static vm_fault_t kernfs_vma_fault(struct vm_fault *vmf)
···
393
375
if (!of->vm_ops)
394
376
return VM_FAULT_SIGBUS;
395
377
396
-
if (!kernfs_get_active(of->kn))
378
+
if (!kernfs_get_active_of(of))
397
379
return VM_FAULT_SIGBUS;
398
380
399
381
ret = VM_FAULT_SIGBUS;
400
382
if (of->vm_ops->fault)
401
383
ret = of->vm_ops->fault(vmf);
402
384
403
-
kernfs_put_active(of->kn);
385
+
kernfs_put_active_of(of);
404
386
return ret;
405
387
}
406
388
···
413
395
if (!of->vm_ops)
414
396
return VM_FAULT_SIGBUS;
415
397
416
-
if (!kernfs_get_active(of->kn))
398
+
if (!kernfs_get_active_of(of))
417
399
return VM_FAULT_SIGBUS;
418
400
419
401
ret = 0;
···
422
404
else
423
405
file_update_time(file);
424
406
425
-
kernfs_put_active(of->kn);
407
+
kernfs_put_active_of(of);
426
408
return ret;
427
409
}
428
410
···
436
418
if (!of->vm_ops)
437
419
return -EINVAL;
438
420
439
-
if (!kernfs_get_active(of->kn))
421
+
if (!kernfs_get_active_of(of))
440
422
return -EINVAL;
441
423
442
424
ret = -EINVAL;
443
425
if (of->vm_ops->access)
444
426
ret = of->vm_ops->access(vma, addr, buf, len, write);
445
427
446
-
kernfs_put_active(of->kn);
428
+
kernfs_put_active_of(of);
447
429
return ret;
448
430
}
449
431
···
473
455
mutex_lock(&of->mutex);
474
456
475
457
rc = -ENODEV;
476
-
if (!kernfs_get_active(of->kn))
458
+
if (!kernfs_get_active_of(of))
477
459
goto out_unlock;
478
460
479
461
ops = kernfs_ops(of->kn);
···
508
490
}
509
491
vma->vm_ops = &kernfs_vm_ops;
510
492
out_put:
511
-
kernfs_put_active(of->kn);
493
+
kernfs_put_active_of(of);
512
494
out_unlock:
513
495
mutex_unlock(&of->mutex);
514
496
···
870
852
struct kernfs_node *kn = kernfs_dentry_node(filp->f_path.dentry);
871
853
__poll_t ret;
872
854
873
-
if (!kernfs_get_active(kn))
855
+
if (!kernfs_get_active_of(of))
874
856
return DEFAULT_POLLMASK|EPOLLERR|EPOLLPRI;
875
857
876
858
if (kn->attr.ops->poll)
···
878
860
else
879
861
ret = kernfs_generic_poll(of, wait);
880
862
881
-
kernfs_put_active(kn);
863
+
kernfs_put_active_of(of);
882
864
return ret;
883
865
}
884
866
···
893
875
* the ops aren't called concurrently for the same open file.
894
876
*/
895
877
mutex_lock(&of->mutex);
896
-
if (!kernfs_get_active(of->kn)) {
878
+
if (!kernfs_get_active_of(of)) {
897
879
mutex_unlock(&of->mutex);
898
880
return -ENODEV;
899
881
}
···
904
886
else
905
887
ret = generic_file_llseek(file, offset, whence);
906
888
907
-
kernfs_put_active(of->kn);
889
+
kernfs_put_active_of(of);
908
890
mutex_unlock(&of->mutex);
909
891
return ret;
910
892
}
+1
-1
fs/namespace.c
+1
-1
fs/namespace.c
+2
fs/nfs/client.c
+2
fs/nfs/client.c
+37
-3
fs/nfs/file.c
+37
-3
fs/nfs/file.c
···
28
28
#include <linux/mm.h>
29
29
#include <linux/pagemap.h>
30
30
#include <linux/gfp.h>
31
+
#include <linux/rmap.h>
31
32
#include <linux/swap.h>
32
33
#include <linux/compaction.h>
33
34
···
281
280
}
282
281
EXPORT_SYMBOL_GPL(nfs_file_fsync);
283
282
283
+
void nfs_truncate_last_folio(struct address_space *mapping, loff_t from,
284
+
loff_t to)
285
+
{
286
+
struct folio *folio;
287
+
288
+
if (from >= to)
289
+
return;
290
+
291
+
folio = filemap_lock_folio(mapping, from >> PAGE_SHIFT);
292
+
if (IS_ERR(folio))
293
+
return;
294
+
295
+
if (folio_mkclean(folio))
296
+
folio_mark_dirty(folio);
297
+
298
+
if (folio_test_uptodate(folio)) {
299
+
loff_t fpos = folio_pos(folio);
300
+
size_t offset = from - fpos;
301
+
size_t end = folio_size(folio);
302
+
303
+
if (to - fpos < end)
304
+
end = to - fpos;
305
+
folio_zero_segment(folio, offset, end);
306
+
trace_nfs_size_truncate_folio(mapping->host, to);
307
+
}
308
+
309
+
folio_unlock(folio);
310
+
folio_put(folio);
311
+
}
312
+
EXPORT_SYMBOL_GPL(nfs_truncate_last_folio);
313
+
284
314
/*
285
315
* Decide whether a read/modify/write cycle may be more efficient
286
316
* then a modify/write/read cycle when writing to a page in the
···
388
356
389
357
dfprintk(PAGECACHE, "NFS: write_begin(%pD2(%lu), %u@%lld)\n",
390
358
file, mapping->host->i_ino, len, (long long) pos);
359
+
nfs_truncate_last_folio(mapping, i_size_read(mapping->host), pos);
391
360
392
361
fgp |= fgf_set_order(len);
393
362
start:
···
475
442
dfprintk(PAGECACHE, "NFS: invalidate_folio(%lu, %zu, %zu)\n",
476
443
folio->index, offset, length);
477
444
478
-
if (offset != 0 || length < folio_size(folio))
479
-
return;
480
445
/* Cancel any unstarted writes on this page */
481
-
nfs_wb_folio_cancel(inode, folio);
446
+
if (offset != 0 || length < folio_size(folio))
447
+
nfs_wb_folio(inode, folio);
448
+
else
449
+
nfs_wb_folio_cancel(inode, folio);
482
450
folio_wait_private_2(folio); /* [DEPRECATED] */
483
451
trace_nfs_invalidate_folio(inode, folio_pos(folio) + offset, length);
484
452
}
+13
-8
fs/nfs/flexfilelayout/flexfilelayout.c
+13
-8
fs/nfs/flexfilelayout/flexfilelayout.c
···
293
293
struct pnfs_layout_segment *l2)
294
294
{
295
295
const struct nfs4_ff_layout_segment *fl1 = FF_LAYOUT_LSEG(l1);
296
-
const struct nfs4_ff_layout_segment *fl2 = FF_LAYOUT_LSEG(l1);
296
+
const struct nfs4_ff_layout_segment *fl2 = FF_LAYOUT_LSEG(l2);
297
297
u32 i;
298
298
299
299
if (fl1->mirror_array_cnt != fl2->mirror_array_cnt)
···
773
773
continue;
774
774
775
775
if (check_device &&
776
-
nfs4_test_deviceid_unavailable(&mirror->mirror_ds->id_node))
776
+
nfs4_test_deviceid_unavailable(&mirror->mirror_ds->id_node)) {
777
+
// reinitialize the error state in case if this is the last iteration
778
+
ds = ERR_PTR(-EINVAL);
777
779
continue;
780
+
}
778
781
779
782
*best_idx = idx;
780
783
break;
···
807
804
struct nfs4_pnfs_ds *ds;
808
805
809
806
ds = ff_layout_choose_valid_ds_for_read(lseg, start_idx, best_idx);
810
-
if (ds)
807
+
if (!IS_ERR(ds))
811
808
return ds;
812
809
return ff_layout_choose_any_ds_for_read(lseg, start_idx, best_idx);
813
810
}
···
821
818
822
819
ds = ff_layout_choose_best_ds_for_read(lseg, pgio->pg_mirror_idx,
823
820
best_idx);
824
-
if (ds || !pgio->pg_mirror_idx)
821
+
if (!IS_ERR(ds) || !pgio->pg_mirror_idx)
825
822
return ds;
826
823
return ff_layout_choose_best_ds_for_read(lseg, 0, best_idx);
827
824
}
···
871
868
req->wb_nio = 0;
872
869
873
870
ds = ff_layout_get_ds_for_read(pgio, &ds_idx);
874
-
if (!ds) {
871
+
if (IS_ERR(ds)) {
875
872
if (!ff_layout_no_fallback_to_mds(pgio->pg_lseg))
876
873
goto out_mds;
877
874
pnfs_generic_pg_cleanup(pgio);
···
1075
1072
{
1076
1073
u32 idx = hdr->pgio_mirror_idx + 1;
1077
1074
u32 new_idx = 0;
1075
+
struct nfs4_pnfs_ds *ds;
1078
1076
1079
-
if (ff_layout_choose_any_ds_for_read(hdr->lseg, idx, &new_idx))
1080
-
ff_layout_send_layouterror(hdr->lseg);
1081
-
else
1077
+
ds = ff_layout_choose_any_ds_for_read(hdr->lseg, idx, &new_idx);
1078
+
if (IS_ERR(ds))
1082
1079
pnfs_error_mark_layout_for_return(hdr->inode, hdr->lseg);
1080
+
else
1081
+
ff_layout_send_layouterror(hdr->lseg);
1083
1082
pnfs_read_resend_pnfs(hdr, new_idx);
1084
1083
}
1085
1084
+10
-3
fs/nfs/inode.c
+10
-3
fs/nfs/inode.c
···
716
716
{
717
717
struct inode *inode = d_inode(dentry);
718
718
struct nfs_fattr *fattr;
719
+
loff_t oldsize = i_size_read(inode);
719
720
int error = 0;
720
721
721
722
nfs_inc_stats(inode, NFSIOS_VFSSETATTR);
···
732
731
if (error)
733
732
return error;
734
733
735
-
if (attr->ia_size == i_size_read(inode))
734
+
if (attr->ia_size == oldsize)
736
735
attr->ia_valid &= ~ATTR_SIZE;
737
736
}
738
737
···
768
767
trace_nfs_setattr_enter(inode);
769
768
770
769
/* Write all dirty data */
771
-
if (S_ISREG(inode->i_mode))
770
+
if (S_ISREG(inode->i_mode)) {
771
+
nfs_file_block_o_direct(NFS_I(inode));
772
772
nfs_sync_inode(inode);
773
+
}
773
774
774
775
fattr = nfs_alloc_fattr_with_label(NFS_SERVER(inode));
775
776
if (fattr == NULL) {
···
780
777
}
781
778
782
779
error = NFS_PROTO(inode)->setattr(dentry, fattr, attr);
783
-
if (error == 0)
780
+
if (error == 0) {
781
+
if (attr->ia_valid & ATTR_SIZE)
782
+
nfs_truncate_last_folio(inode->i_mapping, oldsize,
783
+
attr->ia_size);
784
784
error = nfs_refresh_inode(inode, fattr);
785
+
}
785
786
nfs_free_fattr(fattr);
786
787
out:
787
788
trace_nfs_setattr_exit(inode, error);
+12
fs/nfs/internal.h
+12
fs/nfs/internal.h
···
437
437
int nfs_lock(struct file *, int, struct file_lock *);
438
438
int nfs_flock(struct file *, int, struct file_lock *);
439
439
int nfs_check_flags(int);
440
+
void nfs_truncate_last_folio(struct address_space *mapping, loff_t from,
441
+
loff_t to);
440
442
441
443
/* inode.c */
442
444
extern struct workqueue_struct *nfsiod_workqueue;
···
531
529
{
532
530
return test_bit(NFS_INO_ODIRECT, &nfsi->flags) == 0;
533
531
}
532
+
533
+
/* Must be called with exclusively locked inode->i_rwsem */
534
+
static inline void nfs_file_block_o_direct(struct nfs_inode *nfsi)
535
+
{
536
+
if (test_bit(NFS_INO_ODIRECT, &nfsi->flags)) {
537
+
clear_bit(NFS_INO_ODIRECT, &nfsi->flags);
538
+
inode_dio_wait(&nfsi->vfs_inode);
539
+
}
540
+
}
541
+
534
542
535
543
/* namespace.c */
536
544
#define NFS_PATH_CANONICAL 1
+2
-11
fs/nfs/io.c
+2
-11
fs/nfs/io.c
···
14
14
15
15
#include "internal.h"
16
16
17
-
/* Call with exclusively locked inode->i_rwsem */
18
-
static void nfs_block_o_direct(struct nfs_inode *nfsi, struct inode *inode)
19
-
{
20
-
if (test_bit(NFS_INO_ODIRECT, &nfsi->flags)) {
21
-
clear_bit(NFS_INO_ODIRECT, &nfsi->flags);
22
-
inode_dio_wait(inode);
23
-
}
24
-
}
25
-
26
17
/**
27
18
* nfs_start_io_read - declare the file is being used for buffered reads
28
19
* @inode: file inode
···
48
57
err = down_write_killable(&inode->i_rwsem);
49
58
if (err)
50
59
return err;
51
-
nfs_block_o_direct(nfsi, inode);
60
+
nfs_file_block_o_direct(nfsi);
52
61
downgrade_write(&inode->i_rwsem);
53
62
54
63
return 0;
···
81
90
82
91
err = down_write_killable(&inode->i_rwsem);
83
92
if (!err)
84
-
nfs_block_o_direct(NFS_I(inode), inode);
93
+
nfs_file_block_o_direct(NFS_I(inode));
85
94
return err;
86
95
}
87
96
+11
-10
fs/nfs/localio.c
+11
-10
fs/nfs/localio.c
···
180
180
return;
181
181
}
182
182
183
-
if (nfs_client_is_local(clp)) {
184
-
/* If already enabled, disable and re-enable */
185
-
nfs_localio_disable_client(clp);
186
-
}
183
+
if (nfs_client_is_local(clp))
184
+
return;
187
185
188
186
if (!nfs_uuid_begin(&clp->cl_uuid))
189
187
return;
···
242
244
case -ENOMEM:
243
245
case -ENXIO:
244
246
case -ENOENT:
245
-
/* Revalidate localio, will disable if unsupported */
247
+
/* Revalidate localio */
248
+
nfs_localio_disable_client(clp);
246
249
nfs_local_probe(clp);
247
250
}
248
251
}
···
452
453
nfs_local_iter_init(&iter, iocb, READ);
453
454
454
455
status = filp->f_op->read_iter(&iocb->kiocb, &iter);
456
+
457
+
revert_creds(save_cred);
458
+
455
459
if (status != -EIOCBQUEUED) {
456
460
nfs_local_read_done(iocb, status);
457
461
nfs_local_pgio_release(iocb);
458
462
}
459
-
460
-
revert_creds(save_cred);
461
463
}
462
464
463
465
static int
···
648
648
file_start_write(filp);
649
649
status = filp->f_op->write_iter(&iocb->kiocb, &iter);
650
650
file_end_write(filp);
651
+
652
+
revert_creds(save_cred);
653
+
current->flags = old_flags;
654
+
651
655
if (status != -EIOCBQUEUED) {
652
656
nfs_local_write_done(iocb, status);
653
657
nfs_local_vfs_getattr(iocb);
654
658
nfs_local_pgio_release(iocb);
655
659
}
656
-
657
-
revert_creds(save_cred);
658
-
current->flags = old_flags;
659
660
}
660
661
661
662
static int
+26
-9
fs/nfs/nfs42proc.c
+26
-9
fs/nfs/nfs42proc.c
···
114
114
exception.inode = inode;
115
115
exception.state = lock->open_context->state;
116
116
117
+
nfs_file_block_o_direct(NFS_I(inode));
117
118
err = nfs_sync_inode(inode);
118
119
if (err)
119
120
goto out;
···
138
137
.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_ALLOCATE],
139
138
};
140
139
struct inode *inode = file_inode(filep);
140
+
loff_t oldsize = i_size_read(inode);
141
141
int err;
142
142
143
143
if (!nfs_server_capable(inode, NFS_CAP_ALLOCATE))
···
147
145
inode_lock(inode);
148
146
149
147
err = nfs42_proc_fallocate(&msg, filep, offset, len);
150
-
if (err == -EOPNOTSUPP)
148
+
149
+
if (err == 0)
150
+
nfs_truncate_last_folio(inode->i_mapping, oldsize,
151
+
offset + len);
152
+
else if (err == -EOPNOTSUPP)
151
153
NFS_SERVER(inode)->caps &= ~(NFS_CAP_ALLOCATE |
152
154
NFS_CAP_ZERO_RANGE);
153
155
···
189
183
.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_ZERO_RANGE],
190
184
};
191
185
struct inode *inode = file_inode(filep);
186
+
loff_t oldsize = i_size_read(inode);
192
187
int err;
193
188
194
189
if (!nfs_server_capable(inode, NFS_CAP_ZERO_RANGE))
···
198
191
inode_lock(inode);
199
192
200
193
err = nfs42_proc_fallocate(&msg, filep, offset, len);
201
-
if (err == 0)
194
+
if (err == 0) {
195
+
nfs_truncate_last_folio(inode->i_mapping, oldsize,
196
+
offset + len);
202
197
truncate_pagecache_range(inode, offset, (offset + len) -1);
203
-
if (err == -EOPNOTSUPP)
198
+
} else if (err == -EOPNOTSUPP)
204
199
NFS_SERVER(inode)->caps &= ~NFS_CAP_ZERO_RANGE;
205
200
206
201
inode_unlock(inode);
···
363
354
364
355
/**
365
356
* nfs42_copy_dest_done - perform inode cache updates after clone/copy offload
366
-
* @inode: pointer to destination inode
357
+
* @file: pointer to destination file
367
358
* @pos: destination offset
368
359
* @len: copy length
360
+
* @oldsize: length of the file prior to clone/copy
369
361
*
370
362
* Punch a hole in the inode page cache, so that the NFS client will
371
363
* know to retrieve new data.
372
364
* Update the file size if necessary, and then mark the inode as having
373
365
* invalid cached values for change attribute, ctime, mtime and space used.
374
366
*/
375
-
static void nfs42_copy_dest_done(struct inode *inode, loff_t pos, loff_t len)
367
+
static void nfs42_copy_dest_done(struct file *file, loff_t pos, loff_t len,
368
+
loff_t oldsize)
376
369
{
370
+
struct inode *inode = file_inode(file);
371
+
struct address_space *mapping = file->f_mapping;
377
372
loff_t newsize = pos + len;
378
373
loff_t end = newsize - 1;
379
374
380
-
WARN_ON_ONCE(invalidate_inode_pages2_range(inode->i_mapping,
381
-
pos >> PAGE_SHIFT, end >> PAGE_SHIFT));
375
+
nfs_truncate_last_folio(mapping, oldsize, pos);
376
+
WARN_ON_ONCE(invalidate_inode_pages2_range(mapping, pos >> PAGE_SHIFT,
377
+
end >> PAGE_SHIFT));
382
378
383
379
spin_lock(&inode->i_lock);
384
380
if (newsize > i_size_read(inode))
···
416
402
struct nfs_server *src_server = NFS_SERVER(src_inode);
417
403
loff_t pos_src = args->src_pos;
418
404
loff_t pos_dst = args->dst_pos;
405
+
loff_t oldsize_dst = i_size_read(dst_inode);
419
406
size_t count = args->count;
420
407
ssize_t status;
421
408
···
445
430
return status;
446
431
}
447
432
433
+
nfs_file_block_o_direct(NFS_I(dst_inode));
448
434
status = nfs_sync_inode(dst_inode);
449
435
if (status)
450
436
return status;
···
491
475
goto out;
492
476
}
493
477
494
-
nfs42_copy_dest_done(dst_inode, pos_dst, res->write_res.count);
478
+
nfs42_copy_dest_done(dst, pos_dst, res->write_res.count, oldsize_dst);
495
479
nfs_invalidate_atime(src_inode);
496
480
status = res->write_res.count;
497
481
out:
···
1258
1242
struct nfs42_clone_res res = {
1259
1243
.server = server,
1260
1244
};
1245
+
loff_t oldsize_dst = i_size_read(dst_inode);
1261
1246
int status;
1262
1247
1263
1248
msg->rpc_argp = &args;
···
1293
1276
/* a zero-length count means clone to EOF in src */
1294
1277
if (count == 0 && res.dst_fattr->valid & NFS_ATTR_FATTR_SIZE)
1295
1278
count = nfs_size_to_loff_t(res.dst_fattr->size) - dst_offset;
1296
-
nfs42_copy_dest_done(dst_inode, dst_offset, count);
1279
+
nfs42_copy_dest_done(dst_f, dst_offset, count, oldsize_dst);
1297
1280
status = nfs_post_op_update_inode(dst_inode, res.dst_fattr);
1298
1281
}
1299
1282
+2
fs/nfs/nfs4file.c
+2
fs/nfs/nfs4file.c
···
278
278
lock_two_nondirectories(src_inode, dst_inode);
279
279
/* flush all pending writes on both src and dst so that server
280
280
* has the latest data */
281
+
nfs_file_block_o_direct(NFS_I(src_inode));
281
282
ret = nfs_sync_inode(src_inode);
282
283
if (ret)
283
284
goto out_unlock;
285
+
nfs_file_block_o_direct(NFS_I(dst_inode));
284
286
ret = nfs_sync_inode(dst_inode);
285
287
if (ret)
286
288
goto out_unlock;
+4
-3
fs/nfs/nfs4proc.c
+4
-3
fs/nfs/nfs4proc.c
···
4013
4013
res.attr_bitmask[2];
4014
4014
}
4015
4015
memcpy(server->attr_bitmask, res.attr_bitmask, sizeof(server->attr_bitmask));
4016
-
server->caps &= ~(NFS_CAP_ACLS | NFS_CAP_HARDLINKS |
4017
-
NFS_CAP_SYMLINKS| NFS_CAP_SECURITY_LABEL);
4016
+
server->caps &=
4017
+
~(NFS_CAP_ACLS | NFS_CAP_HARDLINKS | NFS_CAP_SYMLINKS |
4018
+
NFS_CAP_SECURITY_LABEL | NFS_CAP_FS_LOCATIONS |
4019
+
NFS_CAP_OPEN_XOR | NFS_CAP_DELEGTIME);
4018
4020
server->fattr_valid = NFS_ATTR_FATTR_V4;
4019
4021
if (res.attr_bitmask[0] & FATTR4_WORD0_ACL &&
4020
4022
res.acl_bitmask & ACL4_SUPPORT_ALLOW_ACL)
···
4094
4092
};
4095
4093
int err;
4096
4094
4097
-
nfs_server_set_init_caps(server);
4098
4095
do {
4099
4096
err = nfs4_handle_exception(server,
4100
4097
_nfs4_server_capabilities(server, fhandle),
+1
fs/nfs/nfstrace.h
+1
fs/nfs/nfstrace.h
+6
-47
fs/nfs/write.c
+6
-47
fs/nfs/write.c
···
237
237
}
238
238
239
239
/*
240
-
* nfs_page_group_search_locked
241
-
* @head - head request of page group
242
-
* @page_offset - offset into page
240
+
* nfs_page_covers_folio
241
+
* @req: struct nfs_page
243
242
*
244
-
* Search page group with head @head to find a request that contains the
245
-
* page offset @page_offset.
246
-
*
247
-
* Returns a pointer to the first matching nfs request, or NULL if no
248
-
* match is found.
249
-
*
250
-
* Must be called with the page group lock held
251
-
*/
252
-
static struct nfs_page *
253
-
nfs_page_group_search_locked(struct nfs_page *head, unsigned int page_offset)
254
-
{
255
-
struct nfs_page *req;
256
-
257
-
req = head;
258
-
do {
259
-
if (page_offset >= req->wb_pgbase &&
260
-
page_offset < (req->wb_pgbase + req->wb_bytes))
261
-
return req;
262
-
263
-
req = req->wb_this_page;
264
-
} while (req != head);
265
-
266
-
return NULL;
267
-
}
268
-
269
-
/*
270
-
* nfs_page_group_covers_page
271
-
* @head - head request of page group
272
-
*
273
-
* Return true if the page group with head @head covers the whole page,
274
-
* returns false otherwise
243
+
* Return true if the request covers the whole folio.
244
+
* Note that the caller should ensure all subrequests have been joined
275
245
*/
276
246
static bool nfs_page_group_covers_page(struct nfs_page *req)
277
247
{
278
248
unsigned int len = nfs_folio_length(nfs_page_to_folio(req));
279
-
struct nfs_page *tmp;
280
-
unsigned int pos = 0;
281
249
282
-
nfs_page_group_lock(req);
283
-
284
-
for (;;) {
285
-
tmp = nfs_page_group_search_locked(req->wb_head, pos);
286
-
if (!tmp)
287
-
break;
288
-
pos = tmp->wb_pgbase + tmp->wb_bytes;
289
-
}
290
-
291
-
nfs_page_group_unlock(req);
292
-
return pos >= len;
250
+
return req->wb_pgbase == 0 && req->wb_bytes == len;
293
251
}
294
252
295
253
/* We can set the PG_uptodate flag if we see that a write request
···
2003
2045
* release it */
2004
2046
nfs_inode_remove_request(req);
2005
2047
nfs_unlock_and_release_request(req);
2048
+
folio_cancel_dirty(folio);
2006
2049
}
2007
2050
2008
2051
return ret;
+9
-1
fs/ocfs2/extent_map.c
+9
-1
fs/ocfs2/extent_map.c
···
706
706
* it not only handles the fiemap for inlined files, but also deals
707
707
* with the fast symlink, cause they have no difference for extent
708
708
* mapping per se.
709
+
*
710
+
* Must be called with ip_alloc_sem semaphore held.
709
711
*/
710
712
static int ocfs2_fiemap_inline(struct inode *inode, struct buffer_head *di_bh,
711
713
struct fiemap_extent_info *fieinfo,
···
719
717
u64 phys;
720
718
u32 flags = FIEMAP_EXTENT_DATA_INLINE|FIEMAP_EXTENT_LAST;
721
719
struct ocfs2_inode_info *oi = OCFS2_I(inode);
720
+
lockdep_assert_held_read(&oi->ip_alloc_sem);
722
721
723
722
di = (struct ocfs2_dinode *)di_bh->b_data;
724
723
if (ocfs2_inode_is_fast_symlink(inode))
···
735
732
phys += offsetof(struct ocfs2_dinode,
736
733
id2.i_data.id_data);
737
734
735
+
/* Release the ip_alloc_sem to prevent deadlock on page fault */
736
+
up_read(&OCFS2_I(inode)->ip_alloc_sem);
738
737
ret = fiemap_fill_next_extent(fieinfo, 0, phys, id_count,
739
738
flags);
739
+
down_read(&OCFS2_I(inode)->ip_alloc_sem);
740
740
if (ret < 0)
741
741
return ret;
742
742
}
···
808
802
len_bytes = (u64)le16_to_cpu(rec.e_leaf_clusters) << osb->s_clustersize_bits;
809
803
phys_bytes = le64_to_cpu(rec.e_blkno) << osb->sb->s_blocksize_bits;
810
804
virt_bytes = (u64)le32_to_cpu(rec.e_cpos) << osb->s_clustersize_bits;
811
-
805
+
/* Release the ip_alloc_sem to prevent deadlock on page fault */
806
+
up_read(&OCFS2_I(inode)->ip_alloc_sem);
812
807
ret = fiemap_fill_next_extent(fieinfo, virt_bytes, phys_bytes,
813
808
len_bytes, fe_flags);
809
+
down_read(&OCFS2_I(inode)->ip_alloc_sem);
814
810
if (ret)
815
811
break;
816
812
+2
-1
fs/proc/generic.c
+2
-1
fs/proc/generic.c
+1
-1
fs/resctrl/ctrlmondata.c
+1
-1
fs/resctrl/ctrlmondata.c
···
625
625
*/
626
626
list_for_each_entry(d, &r->mon_domains, hdr.list) {
627
627
if (d->ci_id == domid) {
628
-
rr.ci_id = d->ci_id;
629
628
cpu = cpumask_any(&d->hdr.cpu_mask);
630
629
ci = get_cpu_cacheinfo_level(cpu, RESCTRL_L3_CACHE);
631
630
if (!ci)
632
631
continue;
632
+
rr.ci = ci;
633
633
mon_event_read(&rr, r, NULL, rdtgrp,
634
634
&ci->shared_cpu_map, evtid, false);
635
635
goto checkresult;
+2
-2
fs/resctrl/internal.h
+2
-2
fs/resctrl/internal.h
···
98
98
* domains in @r sharing L3 @ci.id
99
99
* @evtid: Which monitor event to read.
100
100
* @first: Initialize MBM counter when true.
101
-
* @ci_id: Cacheinfo id for L3. Only set when @d is NULL. Used when summing domains.
101
+
* @ci: Cacheinfo for L3. Only set when @d is NULL. Used when summing domains.
102
102
* @err: Error encountered when reading counter.
103
103
* @val: Returned value of event counter. If @rgrp is a parent resource group,
104
104
* @val includes the sum of event counts from its child resource groups.
···
112
112
struct rdt_mon_domain *d;
113
113
enum resctrl_event_id evtid;
114
114
bool first;
115
-
unsigned int ci_id;
115
+
struct cacheinfo *ci;
116
116
int err;
117
117
u64 val;
118
118
void *arch_mon_ctx;
+2
-4
fs/resctrl/monitor.c
+2
-4
fs/resctrl/monitor.c
···
361
361
{
362
362
int cpu = smp_processor_id();
363
363
struct rdt_mon_domain *d;
364
-
struct cacheinfo *ci;
365
364
struct mbm_state *m;
366
365
int err, ret;
367
366
u64 tval = 0;
···
388
389
}
389
390
390
391
/* Summing domains that share a cache, must be on a CPU for that cache. */
391
-
ci = get_cpu_cacheinfo_level(cpu, RESCTRL_L3_CACHE);
392
-
if (!ci || ci->id != rr->ci_id)
392
+
if (!cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map))
393
393
return -EINVAL;
394
394
395
395
/*
···
400
402
*/
401
403
ret = -EINVAL;
402
404
list_for_each_entry(d, &rr->r->mon_domains, hdr.list) {
403
-
if (d->ci_id != rr->ci_id)
405
+
if (d->ci_id != rr->ci->id)
404
406
continue;
405
407
err = resctrl_arch_rmid_read(rr->r, d, closid, rmid,
406
408
rr->evtid, &tval, rr->arch_mon_ctx);
+9
-4
fs/smb/client/cifsglob.h
+9
-4
fs/smb/client/cifsglob.h
···
87
87
#define SMB_INTERFACE_POLL_INTERVAL 600
88
88
89
89
/* maximum number of PDUs in one compound */
90
-
#define MAX_COMPOUND 7
90
+
#define MAX_COMPOUND 10
91
91
92
92
/*
93
93
* Default number of credits to keep available for SMB3.
···
1882
1882
1883
1883
1884
1884
/* cifs_get_writable_file() flags */
1885
-
#define FIND_WR_ANY 0
1886
-
#define FIND_WR_FSUID_ONLY 1
1887
-
#define FIND_WR_WITH_DELETE 2
1885
+
enum cifs_writable_file_flags {
1886
+
FIND_WR_ANY = 0U,
1887
+
FIND_WR_FSUID_ONLY = (1U << 0),
1888
+
FIND_WR_WITH_DELETE = (1U << 1),
1889
+
FIND_WR_NO_PENDING_DELETE = (1U << 2),
1890
+
};
1888
1891
1889
1892
#define MID_FREE 0
1890
1893
#define MID_REQUEST_ALLOCATED 1
···
2346
2343
struct kvec qi_iov;
2347
2344
struct kvec io_iov[SMB2_IOCTL_IOV_SIZE];
2348
2345
struct kvec si_iov[SMB2_SET_INFO_IOV_SIZE];
2346
+
struct kvec unlink_iov[SMB2_SET_INFO_IOV_SIZE];
2347
+
struct kvec rename_iov[SMB2_SET_INFO_IOV_SIZE];
2349
2348
struct kvec close_iov;
2350
2349
struct smb2_file_rename_info_hdr rename_info;
2351
2350
struct smb2_file_link_info_hdr link_info;
+17
-1
fs/smb/client/file.c
+17
-1
fs/smb/client/file.c
···
998
998
999
999
/* Get the cached handle as SMB2 close is deferred */
1000
1000
if (OPEN_FMODE(file->f_flags) & FMODE_WRITE) {
1001
-
rc = cifs_get_writable_path(tcon, full_path, FIND_WR_FSUID_ONLY, &cfile);
1001
+
rc = cifs_get_writable_path(tcon, full_path,
1002
+
FIND_WR_FSUID_ONLY |
1003
+
FIND_WR_NO_PENDING_DELETE,
1004
+
&cfile);
1002
1005
} else {
1003
1006
rc = cifs_get_readable_path(tcon, full_path, &cfile);
1004
1007
}
···
2533
2530
continue;
2534
2531
if (with_delete && !(open_file->fid.access & DELETE))
2535
2532
continue;
2533
+
if ((flags & FIND_WR_NO_PENDING_DELETE) &&
2534
+
open_file->status_file_deleted)
2535
+
continue;
2536
2536
if (OPEN_FMODE(open_file->f_flags) & FMODE_WRITE) {
2537
2537
if (!open_file->invalidHandle) {
2538
2538
/* found a good writable file */
···
2653
2647
spin_unlock(&tcon->open_file_lock);
2654
2648
free_dentry_path(page);
2655
2649
*ret_file = find_readable_file(cinode, 0);
2650
+
if (*ret_file) {
2651
+
spin_lock(&cinode->open_file_lock);
2652
+
if ((*ret_file)->status_file_deleted) {
2653
+
spin_unlock(&cinode->open_file_lock);
2654
+
cifsFileInfo_put(*ret_file);
2655
+
*ret_file = NULL;
2656
+
} else {
2657
+
spin_unlock(&cinode->open_file_lock);
2658
+
}
2659
+
}
2656
2660
return *ret_file ? 0 : -ENOENT;
2657
2661
}
2658
2662
+69
-17
fs/smb/client/inode.c
+69
-17
fs/smb/client/inode.c
···
1931
1931
* but will return the EACCES to the caller. Note that the VFS does not call
1932
1932
* unlink on negative dentries currently.
1933
1933
*/
1934
-
int cifs_unlink(struct inode *dir, struct dentry *dentry)
1934
+
static int __cifs_unlink(struct inode *dir, struct dentry *dentry, bool sillyrename)
1935
1935
{
1936
1936
int rc = 0;
1937
1937
unsigned int xid;
···
2003
2003
goto psx_del_no_retry;
2004
2004
}
2005
2005
2006
-
rc = server->ops->unlink(xid, tcon, full_path, cifs_sb, dentry);
2006
+
if (sillyrename || (server->vals->protocol_id > SMB10_PROT_ID &&
2007
+
d_is_positive(dentry) && d_count(dentry) > 2))
2008
+
rc = -EBUSY;
2009
+
else
2010
+
rc = server->ops->unlink(xid, tcon, full_path, cifs_sb, dentry);
2007
2011
2008
2012
psx_del_no_retry:
2009
2013
if (!rc) {
···
2073
2069
if (rehash)
2074
2070
d_rehash(dentry);
2075
2071
return rc;
2072
+
}
2073
+
2074
+
int cifs_unlink(struct inode *dir, struct dentry *dentry)
2075
+
{
2076
+
return __cifs_unlink(dir, dentry, false);
2076
2077
}
2077
2078
2078
2079
static int
···
2367
2358
rc = server->ops->rmdir(xid, tcon, full_path, cifs_sb);
2368
2359
cifs_put_tlink(tlink);
2369
2360
2361
+
cifsInode = CIFS_I(d_inode(direntry));
2362
+
2370
2363
if (!rc) {
2364
+
set_bit(CIFS_INO_DELETE_PENDING, &cifsInode->flags);
2371
2365
spin_lock(&d_inode(direntry)->i_lock);
2372
2366
i_size_write(d_inode(direntry), 0);
2373
2367
clear_nlink(d_inode(direntry));
2374
2368
spin_unlock(&d_inode(direntry)->i_lock);
2375
2369
}
2376
2370
2377
-
cifsInode = CIFS_I(d_inode(direntry));
2378
2371
/* force revalidate to go get info when needed */
2379
2372
cifsInode->time = 0;
2380
2373
···
2469
2458
}
2470
2459
#endif /* CONFIG_CIFS_ALLOW_INSECURE_LEGACY */
2471
2460
do_rename_exit:
2472
-
if (rc == 0)
2461
+
if (rc == 0) {
2473
2462
d_move(from_dentry, to_dentry);
2463
+
/* Force a new lookup */
2464
+
d_drop(from_dentry);
2465
+
}
2474
2466
cifs_put_tlink(tlink);
2475
2467
return rc;
2476
2468
}
···
2484
2470
struct dentry *target_dentry, unsigned int flags)
2485
2471
{
2486
2472
const char *from_name, *to_name;
2473
+
struct TCP_Server_Info *server;
2487
2474
void *page1, *page2;
2488
2475
struct cifs_sb_info *cifs_sb;
2489
2476
struct tcon_link *tlink;
···
2520
2505
if (IS_ERR(tlink))
2521
2506
return PTR_ERR(tlink);
2522
2507
tcon = tlink_tcon(tlink);
2508
+
server = tcon->ses->server;
2523
2509
2524
2510
page1 = alloc_dentry_path();
2525
2511
page2 = alloc_dentry_path();
···
2607
2591
2608
2592
unlink_target:
2609
2593
#endif /* CONFIG_CIFS_ALLOW_INSECURE_LEGACY */
2610
-
2611
-
/* Try unlinking the target dentry if it's not negative */
2612
-
if (d_really_is_positive(target_dentry) && (rc == -EACCES || rc == -EEXIST)) {
2613
-
if (d_is_dir(target_dentry))
2614
-
tmprc = cifs_rmdir(target_dir, target_dentry);
2615
-
else
2616
-
tmprc = cifs_unlink(target_dir, target_dentry);
2617
-
if (tmprc)
2618
-
goto cifs_rename_exit;
2619
-
rc = cifs_do_rename(xid, source_dentry, from_name,
2620
-
target_dentry, to_name);
2621
-
if (!rc)
2622
-
rehash = false;
2594
+
if (d_really_is_positive(target_dentry)) {
2595
+
if (!rc) {
2596
+
struct inode *inode = d_inode(target_dentry);
2597
+
/*
2598
+
* Samba and ksmbd servers allow renaming a target
2599
+
* directory that is open, so make sure to update
2600
+
* ->i_nlink and then mark it as delete pending.
2601
+
*/
2602
+
if (S_ISDIR(inode->i_mode)) {
2603
+
drop_cached_dir_by_name(xid, tcon, to_name, cifs_sb);
2604
+
spin_lock(&inode->i_lock);
2605
+
i_size_write(inode, 0);
2606
+
clear_nlink(inode);
2607
+
spin_unlock(&inode->i_lock);
2608
+
set_bit(CIFS_INO_DELETE_PENDING, &CIFS_I(inode)->flags);
2609
+
CIFS_I(inode)->time = 0; /* force reval */
2610
+
inode_set_ctime_current(inode);
2611
+
inode_set_mtime_to_ts(inode, inode_set_ctime_current(inode));
2612
+
}
2613
+
} else if (rc == -EACCES || rc == -EEXIST) {
2614
+
/*
2615
+
* Rename failed, possibly due to a busy target.
2616
+
* Retry it by unliking the target first.
2617
+
*/
2618
+
if (d_is_dir(target_dentry)) {
2619
+
tmprc = cifs_rmdir(target_dir, target_dentry);
2620
+
} else {
2621
+
tmprc = __cifs_unlink(target_dir, target_dentry,
2622
+
server->vals->protocol_id > SMB10_PROT_ID);
2623
+
}
2624
+
if (tmprc) {
2625
+
/*
2626
+
* Some servers will return STATUS_ACCESS_DENIED
2627
+
* or STATUS_DIRECTORY_NOT_EMPTY when failing to
2628
+
* rename a non-empty directory. Make sure to
2629
+
* propagate the appropriate error back to
2630
+
* userspace.
2631
+
*/
2632
+
if (tmprc == -EEXIST || tmprc == -ENOTEMPTY)
2633
+
rc = tmprc;
2634
+
goto cifs_rename_exit;
2635
+
}
2636
+
rc = cifs_do_rename(xid, source_dentry, from_name,
2637
+
target_dentry, to_name);
2638
+
if (!rc)
2639
+
rehash = false;
2640
+
}
2623
2641
}
2624
2642
2625
2643
/* force revalidate to go get info when needed */
···
2679
2629
struct cifs_tcon *tcon = cifs_sb_master_tcon(cifs_sb);
2680
2630
struct cached_fid *cfid = NULL;
2681
2631
2632
+
if (test_bit(CIFS_INO_DELETE_PENDING, &cifs_i->flags))
2633
+
return false;
2682
2634
if (cifs_i->time == 0)
2683
2635
return true;
2684
2636
+1
-2
fs/smb/client/smb2glob.h
+1
-2
fs/smb/client/smb2glob.h
+162
-42
fs/smb/client/smb2inode.c
+162
-42
fs/smb/client/smb2inode.c
···
346
346
trace_smb3_posix_query_info_compound_enter(xid, tcon->tid,
347
347
ses->Suid, full_path);
348
348
break;
349
-
case SMB2_OP_DELETE:
350
-
trace_smb3_delete_enter(xid, tcon->tid, ses->Suid, full_path);
351
-
break;
352
349
case SMB2_OP_MKDIR:
353
350
/*
354
351
* Directories are created through parameters in the
···
353
356
*/
354
357
trace_smb3_mkdir_enter(xid, tcon->tid, ses->Suid, full_path);
355
358
break;
356
-
case SMB2_OP_RMDIR:
357
-
rqst[num_rqst].rq_iov = &vars->si_iov[0];
359
+
case SMB2_OP_UNLINK:
360
+
rqst[num_rqst].rq_iov = vars->unlink_iov;
358
361
rqst[num_rqst].rq_nvec = 1;
359
362
360
363
size[0] = 1; /* sizeof __u8 See MS-FSCC section 2.4.11 */
361
364
data[0] = &delete_pending[0];
362
365
363
-
rc = SMB2_set_info_init(tcon, server,
364
-
&rqst[num_rqst], COMPOUND_FID,
365
-
COMPOUND_FID, current->tgid,
366
-
FILE_DISPOSITION_INFORMATION,
367
-
SMB2_O_INFO_FILE, 0, data, size);
368
-
if (rc)
366
+
if (cfile) {
367
+
rc = SMB2_set_info_init(tcon, server,
368
+
&rqst[num_rqst],
369
+
cfile->fid.persistent_fid,
370
+
cfile->fid.volatile_fid,
371
+
current->tgid,
372
+
FILE_DISPOSITION_INFORMATION,
373
+
SMB2_O_INFO_FILE, 0,
374
+
data, size);
375
+
} else {
376
+
rc = SMB2_set_info_init(tcon, server,
377
+
&rqst[num_rqst],
378
+
COMPOUND_FID,
379
+
COMPOUND_FID,
380
+
current->tgid,
381
+
FILE_DISPOSITION_INFORMATION,
382
+
SMB2_O_INFO_FILE, 0,
383
+
data, size);
384
+
}
385
+
if (!rc && (!cfile || num_rqst > 1)) {
386
+
smb2_set_next_command(tcon, &rqst[num_rqst]);
387
+
smb2_set_related(&rqst[num_rqst]);
388
+
} else if (rc) {
369
389
goto finished;
370
-
smb2_set_next_command(tcon, &rqst[num_rqst]);
371
-
smb2_set_related(&rqst[num_rqst++]);
372
-
trace_smb3_rmdir_enter(xid, tcon->tid, ses->Suid, full_path);
390
+
}
391
+
num_rqst++;
392
+
trace_smb3_unlink_enter(xid, tcon->tid, ses->Suid, full_path);
373
393
break;
374
394
case SMB2_OP_SET_EOF:
375
395
rqst[num_rqst].rq_iov = &vars->si_iov[0];
···
456
442
ses->Suid, full_path);
457
443
break;
458
444
case SMB2_OP_RENAME:
459
-
rqst[num_rqst].rq_iov = &vars->si_iov[0];
445
+
rqst[num_rqst].rq_iov = vars->rename_iov;
460
446
rqst[num_rqst].rq_nvec = 2;
461
447
462
448
len = in_iov[i].iov_len;
···
746
732
trace_smb3_posix_query_info_compound_done(xid, tcon->tid,
747
733
ses->Suid);
748
734
break;
749
-
case SMB2_OP_DELETE:
750
-
if (rc)
751
-
trace_smb3_delete_err(xid, tcon->tid, ses->Suid, rc);
752
-
else {
753
-
/*
754
-
* If dentry (hence, inode) is NULL, lease break is going to
755
-
* take care of degrading leases on handles for deleted files.
756
-
*/
757
-
if (inode)
758
-
cifs_mark_open_handles_for_deleted_file(inode, full_path);
759
-
trace_smb3_delete_done(xid, tcon->tid, ses->Suid);
760
-
}
761
-
break;
762
735
case SMB2_OP_MKDIR:
763
736
if (rc)
764
737
trace_smb3_mkdir_err(xid, tcon->tid, ses->Suid, rc);
···
766
765
trace_smb3_rename_done(xid, tcon->tid, ses->Suid);
767
766
SMB2_set_info_free(&rqst[num_rqst++]);
768
767
break;
769
-
case SMB2_OP_RMDIR:
770
-
if (rc)
771
-
trace_smb3_rmdir_err(xid, tcon->tid, ses->Suid, rc);
768
+
case SMB2_OP_UNLINK:
769
+
if (!rc)
770
+
trace_smb3_unlink_done(xid, tcon->tid, ses->Suid);
772
771
else
773
-
trace_smb3_rmdir_done(xid, tcon->tid, ses->Suid);
772
+
trace_smb3_unlink_err(xid, tcon->tid, ses->Suid, rc);
774
773
SMB2_set_info_free(&rqst[num_rqst++]);
775
774
break;
776
775
case SMB2_OP_SET_EOF:
···
1167
1166
FILE_OPEN, CREATE_NOT_FILE, ACL_NO_MODE);
1168
1167
return smb2_compound_op(xid, tcon, cifs_sb,
1169
1168
name, &oparms, NULL,
1170
-
&(int){SMB2_OP_RMDIR}, 1,
1169
+
&(int){SMB2_OP_UNLINK}, 1,
1171
1170
NULL, NULL, NULL, NULL);
1172
1171
}
1173
1172
···
1176
1175
struct cifs_sb_info *cifs_sb, struct dentry *dentry)
1177
1176
{
1178
1177
struct cifs_open_parms oparms;
1178
+
struct inode *inode = NULL;
1179
+
int rc;
1179
1180
1180
-
oparms = CIFS_OPARMS(cifs_sb, tcon, name,
1181
-
DELETE, FILE_OPEN,
1182
-
CREATE_DELETE_ON_CLOSE | OPEN_REPARSE_POINT,
1183
-
ACL_NO_MODE);
1184
-
int rc = smb2_compound_op(xid, tcon, cifs_sb, name, &oparms,
1185
-
NULL, &(int){SMB2_OP_DELETE}, 1,
1186
-
NULL, NULL, NULL, dentry);
1181
+
if (dentry)
1182
+
inode = d_inode(dentry);
1183
+
1184
+
oparms = CIFS_OPARMS(cifs_sb, tcon, name, DELETE,
1185
+
FILE_OPEN, OPEN_REPARSE_POINT, ACL_NO_MODE);
1186
+
rc = smb2_compound_op(xid, tcon, cifs_sb, name, &oparms,
1187
+
NULL, &(int){SMB2_OP_UNLINK},
1188
+
1, NULL, NULL, NULL, dentry);
1187
1189
if (rc == -EINVAL) {
1188
1190
cifs_dbg(FYI, "invalid lease key, resending request without lease");
1189
1191
rc = smb2_compound_op(xid, tcon, cifs_sb, name, &oparms,
1190
-
NULL, &(int){SMB2_OP_DELETE}, 1,
1191
-
NULL, NULL, NULL, NULL);
1192
+
NULL, &(int){SMB2_OP_UNLINK},
1193
+
1, NULL, NULL, NULL, NULL);
1192
1194
}
1195
+
/*
1196
+
* If dentry (hence, inode) is NULL, lease break is going to
1197
+
* take care of degrading leases on handles for deleted files.
1198
+
*/
1199
+
if (!rc && inode)
1200
+
cifs_mark_open_handles_for_deleted_file(inode, name);
1193
1201
return rc;
1194
1202
}
1195
1203
···
1449
1439
data.reparse.io.buftype = CIFS_NO_BUFFER;
1450
1440
out:
1451
1441
cifs_free_open_info(&data);
1442
+
return rc;
1443
+
}
1444
+
1445
+
static inline __le16 *utf16_smb2_path(struct cifs_sb_info *cifs_sb,
1446
+
const char *name, size_t namelen)
1447
+
{
1448
+
int len;
1449
+
1450
+
if (*name == '\\' ||
1451
+
(cifs_sb_master_tlink(cifs_sb) &&
1452
+
cifs_sb_master_tcon(cifs_sb)->posix_extensions && *name == '/'))
1453
+
name++;
1454
+
return cifs_strndup_to_utf16(name, namelen, &len,
1455
+
cifs_sb->local_nls,
1456
+
cifs_remap(cifs_sb));
1457
+
}
1458
+
1459
+
int smb2_rename_pending_delete(const char *full_path,
1460
+
struct dentry *dentry,
1461
+
const unsigned int xid)
1462
+
{
1463
+
struct cifs_sb_info *cifs_sb = CIFS_SB(d_inode(dentry)->i_sb);
1464
+
struct cifsInodeInfo *cinode = CIFS_I(d_inode(dentry));
1465
+
__le16 *utf16_path __free(kfree) = NULL;
1466
+
__u32 co = file_create_options(dentry);
1467
+
int cmds[] = {
1468
+
SMB2_OP_SET_INFO,
1469
+
SMB2_OP_RENAME,
1470
+
SMB2_OP_UNLINK,
1471
+
};
1472
+
const int num_cmds = ARRAY_SIZE(cmds);
1473
+
char *to_name __free(kfree) = NULL;
1474
+
__u32 attrs = cinode->cifsAttrs;
1475
+
struct cifs_open_parms oparms;
1476
+
static atomic_t sillycounter;
1477
+
struct cifsFileInfo *cfile;
1478
+
struct tcon_link *tlink;
1479
+
struct cifs_tcon *tcon;
1480
+
struct kvec iov[2];
1481
+
const char *ppath;
1482
+
void *page;
1483
+
size_t len;
1484
+
int rc;
1485
+
1486
+
tlink = cifs_sb_tlink(cifs_sb);
1487
+
if (IS_ERR(tlink))
1488
+
return PTR_ERR(tlink);
1489
+
tcon = tlink_tcon(tlink);
1490
+
1491
+
page = alloc_dentry_path();
1492
+
1493
+
ppath = build_path_from_dentry(dentry->d_parent, page);
1494
+
if (IS_ERR(ppath)) {
1495
+
rc = PTR_ERR(ppath);
1496
+
goto out;
1497
+
}
1498
+
1499
+
len = strlen(ppath) + strlen("/.__smb1234") + 1;
1500
+
to_name = kmalloc(len, GFP_KERNEL);
1501
+
if (!to_name) {
1502
+
rc = -ENOMEM;
1503
+
goto out;
1504
+
}
1505
+
1506
+
scnprintf(to_name, len, "%s%c.__smb%04X", ppath, CIFS_DIR_SEP(cifs_sb),
1507
+
atomic_inc_return(&sillycounter) & 0xffff);
1508
+
1509
+
utf16_path = utf16_smb2_path(cifs_sb, to_name, len);
1510
+
if (!utf16_path) {
1511
+
rc = -ENOMEM;
1512
+
goto out;
1513
+
}
1514
+
1515
+
drop_cached_dir_by_name(xid, tcon, full_path, cifs_sb);
1516
+
oparms = CIFS_OPARMS(cifs_sb, tcon, full_path,
1517
+
DELETE | FILE_WRITE_ATTRIBUTES,
1518
+
FILE_OPEN, co, ACL_NO_MODE);
1519
+
1520
+
attrs &= ~ATTR_READONLY;
1521
+
if (!attrs)
1522
+
attrs = ATTR_NORMAL;
1523
+
if (d_inode(dentry)->i_nlink <= 1)
1524
+
attrs |= ATTR_HIDDEN;
1525
+
iov[0].iov_base = &(FILE_BASIC_INFO) {
1526
+
.Attributes = cpu_to_le32(attrs),
1527
+
};
1528
+
iov[0].iov_len = sizeof(FILE_BASIC_INFO);
1529
+
iov[1].iov_base = utf16_path;
1530
+
iov[1].iov_len = sizeof(*utf16_path) * UniStrlen((wchar_t *)utf16_path);
1531
+
1532
+
cifs_get_writable_path(tcon, full_path, FIND_WR_WITH_DELETE, &cfile);
1533
+
rc = smb2_compound_op(xid, tcon, cifs_sb, full_path, &oparms, iov,
1534
+
cmds, num_cmds, cfile, NULL, NULL, dentry);
1535
+
if (rc == -EINVAL) {
1536
+
cifs_dbg(FYI, "invalid lease key, resending request without lease\n");
1537
+
cifs_get_writable_path(tcon, full_path,
1538
+
FIND_WR_WITH_DELETE, &cfile);
1539
+
rc = smb2_compound_op(xid, tcon, cifs_sb, full_path, &oparms, iov,
1540
+
cmds, num_cmds, cfile, NULL, NULL, NULL);
1541
+
}
1542
+
if (!rc) {
1543
+
set_bit(CIFS_INO_DELETE_PENDING, &cinode->flags);
1544
+
} else {
1545
+
cifs_tcon_dbg(FYI, "%s: failed to rename '%s' to '%s': %d\n",
1546
+
__func__, full_path, to_name, rc);
1547
+
rc = -EIO;
1548
+
}
1549
+
out:
1550
+
cifs_put_tlink(tlink);
1551
+
free_dentry_path(page);
1452
1552
return rc;
1453
1553
}
+29
-3
fs/smb/client/smb2ops.c
+29
-3
fs/smb/client/smb2ops.c
···
2640
2640
}
2641
2641
2642
2642
/* SMB headers in a compound are 8 byte aligned. */
2643
-
if (!IS_ALIGNED(len, 8)) {
2644
-
num_padding = 8 - (len & 7);
2643
+
if (IS_ALIGNED(len, 8))
2644
+
goto out;
2645
+
2646
+
num_padding = 8 - (len & 7);
2647
+
if (smb3_encryption_required(tcon)) {
2648
+
int i;
2649
+
2650
+
/*
2651
+
* Flatten request into a single buffer with required padding as
2652
+
* the encryption layer can't handle the padding iovs.
2653
+
*/
2654
+
for (i = 1; i < rqst->rq_nvec; i++) {
2655
+
memcpy(rqst->rq_iov[0].iov_base +
2656
+
rqst->rq_iov[0].iov_len,
2657
+
rqst->rq_iov[i].iov_base,
2658
+
rqst->rq_iov[i].iov_len);
2659
+
rqst->rq_iov[0].iov_len += rqst->rq_iov[i].iov_len;
2660
+
}
2661
+
memset(rqst->rq_iov[0].iov_base + rqst->rq_iov[0].iov_len,
2662
+
0, num_padding);
2663
+
rqst->rq_iov[0].iov_len += num_padding;
2664
+
rqst->rq_nvec = 1;
2665
+
} else {
2645
2666
rqst->rq_iov[rqst->rq_nvec].iov_base = smb2_padding;
2646
2667
rqst->rq_iov[rqst->rq_nvec].iov_len = num_padding;
2647
2668
rqst->rq_nvec++;
2648
-
len += num_padding;
2649
2669
}
2670
+
len += num_padding;
2671
+
out:
2650
2672
shdr->NextCommand = cpu_to_le32(len);
2651
2673
}
2652
2674
···
5398
5376
.llseek = smb3_llseek,
5399
5377
.is_status_io_timeout = smb2_is_status_io_timeout,
5400
5378
.is_network_name_deleted = smb2_is_network_name_deleted,
5379
+
.rename_pending_delete = smb2_rename_pending_delete,
5401
5380
};
5402
5381
#endif /* CIFS_ALLOW_INSECURE_LEGACY */
5403
5382
···
5504
5481
.llseek = smb3_llseek,
5505
5482
.is_status_io_timeout = smb2_is_status_io_timeout,
5506
5483
.is_network_name_deleted = smb2_is_network_name_deleted,
5484
+
.rename_pending_delete = smb2_rename_pending_delete,
5507
5485
};
5508
5486
5509
5487
struct smb_version_operations smb30_operations = {
···
5621
5597
.llseek = smb3_llseek,
5622
5598
.is_status_io_timeout = smb2_is_status_io_timeout,
5623
5599
.is_network_name_deleted = smb2_is_network_name_deleted,
5600
+
.rename_pending_delete = smb2_rename_pending_delete,
5624
5601
};
5625
5602
5626
5603
struct smb_version_operations smb311_operations = {
···
5738
5713
.llseek = smb3_llseek,
5739
5714
.is_status_io_timeout = smb2_is_status_io_timeout,
5740
5715
.is_network_name_deleted = smb2_is_network_name_deleted,
5716
+
.rename_pending_delete = smb2_rename_pending_delete,
5741
5717
};
5742
5718
5743
5719
#ifdef CONFIG_CIFS_ALLOW_INSECURE_LEGACY
+3
fs/smb/client/smb2proto.h
+3
fs/smb/client/smb2proto.h
···
317
317
int smb2_make_nfs_node(unsigned int xid, struct inode *inode,
318
318
struct dentry *dentry, struct cifs_tcon *tcon,
319
319
const char *full_path, umode_t mode, dev_t dev);
320
+
int smb2_rename_pending_delete(const char *full_path,
321
+
struct dentry *dentry,
322
+
const unsigned int xid);
320
323
321
324
#endif /* _SMB2PROTO_H */
+3
-6
fs/smb/client/trace.h
+3
-6
fs/smb/client/trace.h
···
669
669
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(posix_query_info_compound_enter);
670
670
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(hardlink_enter);
671
671
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(rename_enter);
672
-
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(rmdir_enter);
672
+
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(unlink_enter);
673
673
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(set_eof_enter);
674
674
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(set_info_compound_enter);
675
675
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(set_reparse_compound_enter);
676
676
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(get_reparse_compound_enter);
677
677
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(query_wsl_ea_compound_enter);
678
-
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(delete_enter);
679
678
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(mkdir_enter);
680
679
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(tdis_enter);
681
680
DEFINE_SMB3_INF_COMPOUND_ENTER_EVENT(mknod_enter);
···
709
710
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(posix_query_info_compound_done);
710
711
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(hardlink_done);
711
712
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(rename_done);
712
-
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(rmdir_done);
713
+
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(unlink_done);
713
714
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(set_eof_done);
714
715
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(set_info_compound_done);
715
716
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(set_reparse_compound_done);
716
717
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(get_reparse_compound_done);
717
718
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(query_wsl_ea_compound_done);
718
-
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(delete_done);
719
719
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(mkdir_done);
720
720
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(tdis_done);
721
721
DEFINE_SMB3_INF_COMPOUND_DONE_EVENT(mknod_done);
···
754
756
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(posix_query_info_compound_err);
755
757
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(hardlink_err);
756
758
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(rename_err);
757
-
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(rmdir_err);
759
+
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(unlink_err);
758
760
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(set_eof_err);
759
761
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(set_info_compound_err);
760
762
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(set_reparse_compound_err);
761
763
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(get_reparse_compound_err);
762
764
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(query_wsl_ea_compound_err);
763
765
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(mkdir_err);
764
-
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(delete_err);
765
766
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(tdis_err);
766
767
DEFINE_SMB3_INF_COMPOUND_ERR_EVENT(mknod_err);
767
768
+25
-6
include/linux/compiler-clang.h
+25
-6
include/linux/compiler-clang.h
···
18
18
#define KASAN_ABI_VERSION 5
19
19
20
20
/*
21
+
* Clang 22 added preprocessor macros to match GCC, in hopes of eventually
22
+
* dropping __has_feature support for sanitizers:
23
+
* https://github.com/llvm/llvm-project/commit/568c23bbd3303518c5056d7f03444dae4fdc8a9c
24
+
* Create these macros for older versions of clang so that it is easy to clean
25
+
* up once the minimum supported version of LLVM for building the kernel always
26
+
* creates these macros.
27
+
*
21
28
* Note: Checking __has_feature(*_sanitizer) is only true if the feature is
22
29
* enabled. Therefore it is not required to additionally check defined(CONFIG_*)
23
30
* to avoid adding redundant attributes in other configurations.
24
31
*/
25
-
26
-
#if __has_feature(address_sanitizer) || __has_feature(hwaddress_sanitizer)
27
-
/* Emulate GCC's __SANITIZE_ADDRESS__ flag */
32
+
#if __has_feature(address_sanitizer) && !defined(__SANITIZE_ADDRESS__)
28
33
#define __SANITIZE_ADDRESS__
34
+
#endif
35
+
#if __has_feature(hwaddress_sanitizer) && !defined(__SANITIZE_HWADDRESS__)
36
+
#define __SANITIZE_HWADDRESS__
37
+
#endif
38
+
#if __has_feature(thread_sanitizer) && !defined(__SANITIZE_THREAD__)
39
+
#define __SANITIZE_THREAD__
40
+
#endif
41
+
42
+
/*
43
+
* Treat __SANITIZE_HWADDRESS__ the same as __SANITIZE_ADDRESS__ in the kernel.
44
+
*/
45
+
#ifdef __SANITIZE_HWADDRESS__
46
+
#define __SANITIZE_ADDRESS__
47
+
#endif
48
+
49
+
#ifdef __SANITIZE_ADDRESS__
29
50
#define __no_sanitize_address \
30
51
__attribute__((no_sanitize("address", "hwaddress")))
31
52
#else
32
53
#define __no_sanitize_address
33
54
#endif
34
55
35
-
#if __has_feature(thread_sanitizer)
36
-
/* emulate gcc's __SANITIZE_THREAD__ flag */
37
-
#define __SANITIZE_THREAD__
56
+
#ifdef __SANITIZE_THREAD__
38
57
#define __no_sanitize_thread \
39
58
__attribute__((no_sanitize("thread")))
40
59
#else
+1
include/linux/cpu.h
+1
include/linux/cpu.h
···
83
83
extern ssize_t cpu_show_indirect_target_selection(struct device *dev,
84
84
struct device_attribute *attr, char *buf);
85
85
extern ssize_t cpu_show_tsa(struct device *dev, struct device_attribute *attr, char *buf);
86
+
extern ssize_t cpu_show_vmscape(struct device *dev, struct device_attribute *attr, char *buf);
86
87
87
88
extern __printf(4, 5)
88
89
struct device *cpu_device_create(struct device *parent, void *drvdata,
+10
include/linux/energy_model.h
+10
include/linux/energy_model.h
···
171
171
int em_dev_register_perf_domain(struct device *dev, unsigned int nr_states,
172
172
const struct em_data_callback *cb,
173
173
const cpumask_t *cpus, bool microwatts);
174
+
int em_dev_register_pd_no_update(struct device *dev, unsigned int nr_states,
175
+
const struct em_data_callback *cb,
176
+
const cpumask_t *cpus, bool microwatts);
174
177
void em_dev_unregister_perf_domain(struct device *dev);
175
178
struct em_perf_table *em_table_alloc(struct em_perf_domain *pd);
176
179
void em_table_free(struct em_perf_table *table);
···
350
347
int em_dev_register_perf_domain(struct device *dev, unsigned int nr_states,
351
348
const struct em_data_callback *cb,
352
349
const cpumask_t *cpus, bool microwatts)
350
+
{
351
+
return -EINVAL;
352
+
}
353
+
static inline
354
+
int em_dev_register_pd_no_update(struct device *dev, unsigned int nr_states,
355
+
const struct em_data_callback *cb,
356
+
const cpumask_t *cpus, bool microwatts)
353
357
{
354
358
return -EINVAL;
355
359
}
+2
-2
include/linux/ethtool.h
+2
-2
include/linux/ethtool.h
+2
-1
include/linux/fs.h
+2
-1
include/linux/fs.h
···
149
149
/* Expect random access pattern */
150
150
#define FMODE_RANDOM ((__force fmode_t)(1 << 12))
151
151
152
-
/* FMODE_* bit 13 */
152
+
/* Supports IOCB_HAS_METADATA */
153
+
#define FMODE_HAS_METADATA ((__force fmode_t)(1 << 13))
153
154
154
155
/* File is opened with O_PATH; almost nothing can be done with it */
155
156
#define FMODE_PATH ((__force fmode_t)(1 << 14))
+3
-3
include/linux/kasan.h
+3
-3
include/linux/kasan.h
···
562
562
#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
563
563
564
564
void kasan_populate_early_vm_area_shadow(void *start, unsigned long size);
565
-
int kasan_populate_vmalloc(unsigned long addr, unsigned long size);
565
+
int kasan_populate_vmalloc(unsigned long addr, unsigned long size, gfp_t gfp_mask);
566
566
void kasan_release_vmalloc(unsigned long start, unsigned long end,
567
567
unsigned long free_region_start,
568
568
unsigned long free_region_end,
···
574
574
unsigned long size)
575
575
{ }
576
576
static inline int kasan_populate_vmalloc(unsigned long start,
577
-
unsigned long size)
577
+
unsigned long size, gfp_t gfp_mask)
578
578
{
579
579
return 0;
580
580
}
···
610
610
static inline void kasan_populate_early_vm_area_shadow(void *start,
611
611
unsigned long size) { }
612
612
static inline int kasan_populate_vmalloc(unsigned long start,
613
-
unsigned long size)
613
+
unsigned long size, gfp_t gfp_mask)
614
614
{
615
615
return 0;
616
616
}
-1
include/net/netfilter/nf_tables.h
-1
include/net/netfilter/nf_tables.h
+2
-8
include/net/netfilter/nf_tables_core.h
+2
-8
include/net/netfilter/nf_tables_core.h
···
109
109
const struct nft_set_ext *
110
110
nft_hash_lookup(const struct net *net, const struct nft_set *set,
111
111
const u32 *key);
112
+
#endif
113
+
112
114
const struct nft_set_ext *
113
115
nft_set_do_lookup(const struct net *net, const struct nft_set *set,
114
116
const u32 *key);
115
-
#else
116
-
static inline const struct nft_set_ext *
117
-
nft_set_do_lookup(const struct net *net, const struct nft_set *set,
118
-
const u32 *key)
119
-
{
120
-
return set->ops->lookup(net, set, key);
121
-
}
122
-
#endif
123
117
124
118
/* called from nft_pipapo_avx2.c */
125
119
const struct nft_set_ext *
+1
include/net/netns/nftables.h
+1
include/net/netns/nftables.h
+1
-1
init/main.c
+1
-1
init/main.c
···
956
956
sort_main_extable();
957
957
trap_init();
958
958
mm_core_init();
959
+
maple_tree_init();
959
960
poking_init();
960
961
ftrace_init();
961
962
···
974
973
"Interrupts were enabled *very* early, fixing it\n"))
975
974
local_irq_disable();
976
975
radix_tree_init();
977
-
maple_tree_init();
978
976
979
977
/*
980
978
* Set up housekeeping before setting up workqueues to allow the unbound
+3
io_uring/rw.c
+3
io_uring/rw.c
···
886
886
if (req->flags & REQ_F_HAS_METADATA) {
887
887
struct io_async_rw *io = req->async_data;
888
888
889
+
if (!(file->f_mode & FMODE_HAS_METADATA))
890
+
return -EINVAL;
891
+
889
892
/*
890
893
* We have a union of meta fields with wpq used for buffered-io
891
894
* in io_async_rw, so fail it here.
+1
kernel/bpf/Makefile
+1
kernel/bpf/Makefile
+13
-8
kernel/bpf/core.c
+13
-8
kernel/bpf/core.c
···
2366
2366
const struct bpf_insn *insn)
2367
2367
{
2368
2368
/* If this handler ever gets executed, then BPF_JIT_ALWAYS_ON
2369
-
* is not working properly, or interpreter is being used when
2370
-
* prog->jit_requested is not 0, so warn about it!
2369
+
* is not working properly, so warn about it!
2371
2370
*/
2372
2371
WARN_ON_ONCE(1);
2373
2372
return 0;
···
2467
2468
return ret;
2468
2469
}
2469
2470
2470
-
static void bpf_prog_select_func(struct bpf_prog *fp)
2471
+
static bool bpf_prog_select_interpreter(struct bpf_prog *fp)
2471
2472
{
2473
+
bool select_interpreter = false;
2472
2474
#ifndef CONFIG_BPF_JIT_ALWAYS_ON
2473
2475
u32 stack_depth = max_t(u32, fp->aux->stack_depth, 1);
2474
2476
u32 idx = (round_up(stack_depth, 32) / 32) - 1;
···
2478
2478
* But for non-JITed programs, we don't need bpf_func, so no bounds
2479
2479
* check needed.
2480
2480
*/
2481
-
if (!fp->jit_requested &&
2482
-
!WARN_ON_ONCE(idx >= ARRAY_SIZE(interpreters))) {
2481
+
if (idx < ARRAY_SIZE(interpreters)) {
2483
2482
fp->bpf_func = interpreters[idx];
2483
+
select_interpreter = true;
2484
2484
} else {
2485
2485
fp->bpf_func = __bpf_prog_ret0_warn;
2486
2486
}
2487
2487
#else
2488
2488
fp->bpf_func = __bpf_prog_ret0_warn;
2489
2489
#endif
2490
+
return select_interpreter;
2490
2491
}
2491
2492
2492
2493
/**
···
2506
2505
/* In case of BPF to BPF calls, verifier did all the prep
2507
2506
* work with regards to JITing, etc.
2508
2507
*/
2509
-
bool jit_needed = fp->jit_requested;
2508
+
bool jit_needed = false;
2510
2509
2511
2510
if (fp->bpf_func)
2512
2511
goto finalize;
···
2515
2514
bpf_prog_has_kfunc_call(fp))
2516
2515
jit_needed = true;
2517
2516
2518
-
bpf_prog_select_func(fp);
2517
+
if (!bpf_prog_select_interpreter(fp))
2518
+
jit_needed = true;
2519
2519
2520
2520
/* eBPF JITs can rewrite the program in case constant
2521
2521
* blinding is active. However, in case of error during
···
3026
3024
3027
3025
/* Always built-in helper functions. */
3028
3026
const struct bpf_func_proto bpf_tail_call_proto = {
3029
-
.func = NULL,
3027
+
/* func is unused for tail_call, we set it to pass the
3028
+
* get_helper_proto check
3029
+
*/
3030
+
.func = BPF_PTR_POISON,
3030
3031
.gpl_only = false,
3031
3032
.ret_type = RET_VOID,
3032
3033
.arg1_type = ARG_PTR_TO_CTX,
+2
-2
kernel/bpf/cpumap.c
+2
-2
kernel/bpf/cpumap.c
···
186
186
struct xdp_buff xdp;
187
187
int i, nframes = 0;
188
188
189
-
xdp_set_return_frame_no_direct();
190
189
xdp.rxq = &rxq;
191
190
192
191
for (i = 0; i < n; i++) {
···
230
231
}
231
232
}
232
233
233
-
xdp_clear_return_frame_no_direct();
234
234
stats->pass += nframes;
235
235
236
236
return nframes;
···
253
255
254
256
rcu_read_lock();
255
257
bpf_net_ctx = bpf_net_ctx_set(&__bpf_net_ctx);
258
+
xdp_set_return_frame_no_direct();
256
259
257
260
ret->xdp_n = cpu_map_bpf_prog_run_xdp(rcpu, frames, ret->xdp_n, stats);
258
261
if (unlikely(ret->skb_n))
···
263
264
if (stats->redirect)
264
265
xdp_do_flush();
265
266
267
+
xdp_clear_return_frame_no_direct();
266
268
bpf_net_ctx_clear(bpf_net_ctx);
267
269
rcu_read_unlock();
268
270
+1
-1
kernel/bpf/crypto.c
+1
-1
kernel/bpf/crypto.c
+13
-3
kernel/bpf/helpers.c
+13
-3
kernel/bpf/helpers.c
···
1274
1274
goto out;
1275
1275
}
1276
1276
1277
-
/* allocate hrtimer via map_kmalloc to use memcg accounting */
1278
-
cb = bpf_map_kmalloc_node(map, size, GFP_ATOMIC, map->numa_node);
1277
+
/* Allocate via bpf_map_kmalloc_node() for memcg accounting. Until
1278
+
* kmalloc_nolock() is available, avoid locking issues by using
1279
+
* __GFP_HIGH (GFP_ATOMIC & ~__GFP_RECLAIM).
1280
+
*/
1281
+
cb = bpf_map_kmalloc_node(map, size, __GFP_HIGH, map->numa_node);
1279
1282
if (!cb) {
1280
1283
ret = -ENOMEM;
1281
1284
goto out;
···
3667
3664
3668
3665
guard(pagefault)();
3669
3666
for (i = 0; i < XATTR_SIZE_MAX; i++) {
3670
-
for (j = 0; i + j < len && j < XATTR_SIZE_MAX; j++) {
3667
+
for (j = 0; i + j <= len && j < XATTR_SIZE_MAX; j++) {
3671
3668
__get_kernel_nofault(&c2, s2__ign + j, char, err_out);
3672
3669
if (c2 == '\0')
3673
3670
return i;
3671
+
/*
3672
+
* We allow reading an extra byte from s2 (note the
3673
+
* `i + j <= len` above) to cover the case when s2 is
3674
+
* a suffix of the first len chars of s1.
3675
+
*/
3676
+
if (i + j == len)
3677
+
break;
3674
3678
__get_kernel_nofault(&c1, s1__ign + j, char, err_out);
3675
3679
if (c1 == '\0')
3676
3680
return -ENOENT;
+1
-1
kernel/bpf/rqspinlock.c
+1
-1
kernel/bpf/rqspinlock.c
···
471
471
* any MCS node. This is not the most elegant solution, but is
472
472
* simple enough.
473
473
*/
474
-
if (unlikely(idx >= _Q_MAX_NODES)) {
474
+
if (unlikely(idx >= _Q_MAX_NODES || in_nmi())) {
475
475
lockevent_inc(lock_no_node);
476
476
RES_RESET_TIMEOUT(ts, RES_DEF_TIMEOUT);
477
477
while (!queued_spin_trylock(lock)) {
+5
-1
kernel/bpf/verifier.c
+5
-1
kernel/bpf/verifier.c
···
8547
8547
verifier_bug(env, "Two map pointers in a timer helper");
8548
8548
return -EFAULT;
8549
8549
}
8550
+
if (IS_ENABLED(CONFIG_PREEMPT_RT)) {
8551
+
verbose(env, "bpf_timer cannot be used for PREEMPT_RT.\n");
8552
+
return -EOPNOTSUPP;
8553
+
}
8550
8554
meta->map_uid = reg->map_uid;
8551
8555
meta->map_ptr = map;
8552
8556
return 0;
···
11358
11354
return -EINVAL;
11359
11355
11360
11356
*ptr = env->ops->get_func_proto(func_id, env->prog);
11361
-
return *ptr ? 0 : -EINVAL;
11357
+
return *ptr && (*ptr)->func ? 0 : -EINVAL;
11362
11358
}
11363
11359
11364
11360
static int check_helper_call(struct bpf_verifier_env *env, struct bpf_insn *insn,
+47
-1
kernel/dma/debug.c
+47
-1
kernel/dma/debug.c
···
39
39
dma_debug_sg,
40
40
dma_debug_coherent,
41
41
dma_debug_resource,
42
+
dma_debug_noncoherent,
42
43
};
43
44
44
45
enum map_err_types {
···
142
141
[dma_debug_sg] = "scatter-gather",
143
142
[dma_debug_coherent] = "coherent",
144
143
[dma_debug_resource] = "resource",
144
+
[dma_debug_noncoherent] = "noncoherent",
145
145
};
146
146
147
147
static const char *dir2name[] = {
···
995
993
"[mapped as %s] [unmapped as %s]\n",
996
994
ref->dev_addr, ref->size,
997
995
type2name[entry->type], type2name[ref->type]);
998
-
} else if (entry->type == dma_debug_coherent &&
996
+
} else if ((entry->type == dma_debug_coherent ||
997
+
entry->type == dma_debug_noncoherent) &&
999
998
ref->paddr != entry->paddr) {
1000
999
err_printk(ref->dev, entry, "device driver frees "
1001
1000
"DMA memory with different CPU address "
···
1582
1579
1583
1580
check_sync(dev, &ref, false);
1584
1581
}
1582
+
}
1583
+
1584
+
void debug_dma_alloc_pages(struct device *dev, struct page *page,
1585
+
size_t size, int direction,
1586
+
dma_addr_t dma_addr,
1587
+
unsigned long attrs)
1588
+
{
1589
+
struct dma_debug_entry *entry;
1590
+
1591
+
if (unlikely(dma_debug_disabled()))
1592
+
return;
1593
+
1594
+
entry = dma_entry_alloc();
1595
+
if (!entry)
1596
+
return;
1597
+
1598
+
entry->type = dma_debug_noncoherent;
1599
+
entry->dev = dev;
1600
+
entry->paddr = page_to_phys(page);
1601
+
entry->size = size;
1602
+
entry->dev_addr = dma_addr;
1603
+
entry->direction = direction;
1604
+
1605
+
add_dma_entry(entry, attrs);
1606
+
}
1607
+
1608
+
void debug_dma_free_pages(struct device *dev, struct page *page,
1609
+
size_t size, int direction,
1610
+
dma_addr_t dma_addr)
1611
+
{
1612
+
struct dma_debug_entry ref = {
1613
+
.type = dma_debug_noncoherent,
1614
+
.dev = dev,
1615
+
.paddr = page_to_phys(page),
1616
+
.dev_addr = dma_addr,
1617
+
.size = size,
1618
+
.direction = direction,
1619
+
};
1620
+
1621
+
if (unlikely(dma_debug_disabled()))
1622
+
return;
1623
+
1624
+
check_unmap(&ref);
1585
1625
}
1586
1626
1587
1627
static int __init dma_debug_driver_setup(char *str)
+20
kernel/dma/debug.h
+20
kernel/dma/debug.h
···
54
54
extern void debug_dma_sync_sg_for_device(struct device *dev,
55
55
struct scatterlist *sg,
56
56
int nelems, int direction);
57
+
extern void debug_dma_alloc_pages(struct device *dev, struct page *page,
58
+
size_t size, int direction,
59
+
dma_addr_t dma_addr,
60
+
unsigned long attrs);
61
+
extern void debug_dma_free_pages(struct device *dev, struct page *page,
62
+
size_t size, int direction,
63
+
dma_addr_t dma_addr);
57
64
#else /* CONFIG_DMA_API_DEBUG */
58
65
static inline void debug_dma_map_page(struct device *dev, struct page *page,
59
66
size_t offset, size_t size,
···
131
124
static inline void debug_dma_sync_sg_for_device(struct device *dev,
132
125
struct scatterlist *sg,
133
126
int nelems, int direction)
127
+
{
128
+
}
129
+
130
+
static inline void debug_dma_alloc_pages(struct device *dev, struct page *page,
131
+
size_t size, int direction,
132
+
dma_addr_t dma_addr,
133
+
unsigned long attrs)
134
+
{
135
+
}
136
+
137
+
static inline void debug_dma_free_pages(struct device *dev, struct page *page,
138
+
size_t size, int direction,
139
+
dma_addr_t dma_addr)
134
140
{
135
141
}
136
142
#endif /* CONFIG_DMA_API_DEBUG */
+2
-2
kernel/dma/mapping.c
+2
-2
kernel/dma/mapping.c
···
712
712
if (page) {
713
713
trace_dma_alloc_pages(dev, page_to_virt(page), *dma_handle,
714
714
size, dir, gfp, 0);
715
-
debug_dma_map_page(dev, page, 0, size, dir, *dma_handle, 0);
715
+
debug_dma_alloc_pages(dev, page, size, dir, *dma_handle, 0);
716
716
} else {
717
717
trace_dma_alloc_pages(dev, NULL, 0, size, dir, gfp, 0);
718
718
}
···
738
738
dma_addr_t dma_handle, enum dma_data_direction dir)
739
739
{
740
740
trace_dma_free_pages(dev, page_to_virt(page), dma_handle, size, dir, 0);
741
-
debug_dma_unmap_page(dev, dma_handle, size, dir);
741
+
debug_dma_free_pages(dev, page, size, dir, dma_handle);
742
742
__dma_free_pages(dev, size, page, dma_handle, dir);
743
743
}
744
744
EXPORT_SYMBOL_GPL(dma_free_pages);
+25
-4
kernel/power/energy_model.c
+25
-4
kernel/power/energy_model.c
···
553
553
const struct em_data_callback *cb,
554
554
const cpumask_t *cpus, bool microwatts)
555
555
{
556
+
int ret = em_dev_register_pd_no_update(dev, nr_states, cb, cpus, microwatts);
557
+
558
+
if (_is_cpu_device(dev))
559
+
em_check_capacity_update();
560
+
561
+
return ret;
562
+
}
563
+
EXPORT_SYMBOL_GPL(em_dev_register_perf_domain);
564
+
565
+
/**
566
+
* em_dev_register_pd_no_update() - Register a perf domain for a device
567
+
* @dev : Device to register the PD for
568
+
* @nr_states : Number of performance states in the new PD
569
+
* @cb : Callback functions for populating the energy model
570
+
* @cpus : CPUs to include in the new PD (mandatory if @dev is a CPU device)
571
+
* @microwatts : Whether or not the power values in the EM will be in uW
572
+
*
573
+
* Like em_dev_register_perf_domain(), but does not trigger a CPU capacity
574
+
* update after registering the PD, even if @dev is a CPU device.
575
+
*/
576
+
int em_dev_register_pd_no_update(struct device *dev, unsigned int nr_states,
577
+
const struct em_data_callback *cb,
578
+
const cpumask_t *cpus, bool microwatts)
579
+
{
556
580
struct em_perf_table *em_table;
557
581
unsigned long cap, prev_cap = 0;
558
582
unsigned long flags = 0;
···
660
636
unlock:
661
637
mutex_unlock(&em_pd_mutex);
662
638
663
-
if (_is_cpu_device(dev))
664
-
em_check_capacity_update();
665
-
666
639
return ret;
667
640
}
668
-
EXPORT_SYMBOL_GPL(em_dev_register_perf_domain);
641
+
EXPORT_SYMBOL_GPL(em_dev_register_pd_no_update);
669
642
670
643
/**
671
644
* em_dev_unregister_perf_domain() - Unregister Energy Model (EM) for a device
+1
kernel/power/hibernate.c
+1
kernel/power/hibernate.c
+3
-8
kernel/time/hrtimer.c
+3
-8
kernel/time/hrtimer.c
···
787
787
* of the next expiring timer is enough. The return from the SMP
788
788
* function call will take care of the reprogramming in case the
789
789
* CPU was in a NOHZ idle sleep.
790
+
*
791
+
* In periodic low resolution mode, the next softirq expiration
792
+
* must also be updated.
790
793
*/
791
-
if (!hrtimer_hres_active(base) && !tick_nohz_active)
792
-
return;
793
-
794
794
raw_spin_lock(&base->lock);
795
795
hrtimer_update_base(base);
796
796
if (hrtimer_hres_active(base))
···
2295
2295
&new_base->clock_base[i]);
2296
2296
}
2297
2297
2298
-
/*
2299
-
* The migration might have changed the first expiring softirq
2300
-
* timer on this CPU. Update it.
2301
-
*/
2302
-
__hrtimer_get_next_event(new_base, HRTIMER_ACTIVE_SOFT);
2303
2298
/* Tell the other CPU to retrigger the next event */
2304
2299
smp_call_function_single(ncpu, retrigger_next_event, NULL, 0);
2305
2300
+2
-1
kernel/trace/fgraph.c
+2
-1
kernel/trace/fgraph.c
···
1397
1397
ftrace_graph_active--;
1398
1398
gops->saved_func = NULL;
1399
1399
fgraph_lru_release_index(i);
1400
-
unregister_pm_notifier(&ftrace_suspend_notifier);
1400
+
if (!ftrace_graph_active)
1401
+
unregister_pm_notifier(&ftrace_suspend_notifier);
1401
1402
}
1402
1403
return ret;
1403
1404
}
+7
-3
kernel/trace/trace.c
+7
-3
kernel/trace/trace.c
···
834
834
/* copy the current bits to the new max */
835
835
ret = trace_pid_list_first(filtered_pids, &pid);
836
836
while (!ret) {
837
-
trace_pid_list_set(pid_list, pid);
837
+
ret = trace_pid_list_set(pid_list, pid);
838
+
if (ret < 0)
839
+
goto out;
840
+
838
841
ret = trace_pid_list_next(filtered_pids, pid + 1, &pid);
839
842
nr_pids++;
840
843
}
···
874
871
trace_parser_clear(&parser);
875
872
ret = 0;
876
873
}
874
+
out:
877
875
trace_parser_put(&parser);
878
876
879
877
if (ret < 0) {
···
7213
7209
entry = ring_buffer_event_data(event);
7214
7210
entry->ip = ip;
7215
7211
7216
-
len = __copy_from_user_inatomic(&entry->buf, ubuf, cnt);
7212
+
len = copy_from_user_nofault(&entry->buf, ubuf, cnt);
7217
7213
if (len) {
7218
7214
memcpy(&entry->buf, FAULTED_STR, FAULTED_SIZE);
7219
7215
cnt = FAULTED_SIZE;
···
7310
7306
7311
7307
entry = ring_buffer_event_data(event);
7312
7308
7313
-
len = __copy_from_user_inatomic(&entry->id, ubuf, cnt);
7309
+
len = copy_from_user_nofault(&entry->id, ubuf, cnt);
7314
7310
if (len) {
7315
7311
entry->id = -1;
7316
7312
memcpy(&entry->buf, FAULTED_STR, FAULTED_SIZE);
+1
-1
kernel/trace/trace_events_user.c
+1
-1
kernel/trace/trace_events_user.c
+3
kernel/trace/trace_osnoise.c
+3
kernel/trace/trace_osnoise.c
+4
mm/damon/core.c
+4
mm/damon/core.c
···
2111
2111
if (!quota->ms && !quota->sz && list_empty("a->goals))
2112
2112
return;
2113
2113
2114
+
/* First charge window */
2115
+
if (!quota->total_charged_sz && !quota->charged_from)
2116
+
quota->charged_from = jiffies;
2117
+
2114
2118
/* New charge window starts */
2115
2119
if (time_after_eq(jiffies, quota->charged_from +
2116
2120
msecs_to_jiffies(quota->reset_interval))) {
+5
mm/damon/lru_sort.c
+5
mm/damon/lru_sort.c
+5
mm/damon/reclaim.c
+5
mm/damon/reclaim.c
+9
-5
mm/damon/sysfs.c
+9
-5
mm/damon/sysfs.c
···
1260
1260
{
1261
1261
struct damon_sysfs_kdamond *kdamond = container_of(kobj,
1262
1262
struct damon_sysfs_kdamond, kobj);
1263
-
struct damon_ctx *ctx = kdamond->damon_ctx;
1264
-
bool running;
1263
+
struct damon_ctx *ctx;
1264
+
bool running = false;
1265
1265
1266
-
if (!ctx)
1267
-
running = false;
1268
-
else
1266
+
if (!mutex_trylock(&damon_sysfs_lock))
1267
+
return -EBUSY;
1268
+
1269
+
ctx = kdamond->damon_ctx;
1270
+
if (ctx)
1269
1271
running = damon_is_running(ctx);
1272
+
1273
+
mutex_unlock(&damon_sysfs_lock);
1270
1274
1271
1275
return sysfs_emit(buf, "%s\n", running ?
1272
1276
damon_sysfs_cmd_strs[DAMON_SYSFS_CMD_ON] :
+6
-3
mm/hugetlb.c
+6
-3
mm/hugetlb.c
···
5851
5851
spinlock_t *ptl;
5852
5852
struct hstate *h = hstate_vma(vma);
5853
5853
unsigned long sz = huge_page_size(h);
5854
-
bool adjust_reservation = false;
5854
+
bool adjust_reservation;
5855
5855
unsigned long last_addr_mask;
5856
5856
bool force_flush = false;
5857
5857
···
5944
5944
sz);
5945
5945
hugetlb_count_sub(pages_per_huge_page(h), mm);
5946
5946
hugetlb_remove_rmap(folio);
5947
+
spin_unlock(ptl);
5947
5948
5948
5949
/*
5949
5950
* Restore the reservation for anonymous page, otherwise the
···
5952
5951
* If there we are freeing a surplus, do not set the restore
5953
5952
* reservation bit.
5954
5953
*/
5954
+
adjust_reservation = false;
5955
+
5956
+
spin_lock_irq(&hugetlb_lock);
5955
5957
if (!h->surplus_huge_pages && __vma_private_lock(vma) &&
5956
5958
folio_test_anon(folio)) {
5957
5959
folio_set_hugetlb_restore_reserve(folio);
5958
5960
/* Reservation to be adjusted after the spin lock */
5959
5961
adjust_reservation = true;
5960
5962
}
5961
-
5962
-
spin_unlock(ptl);
5963
+
spin_unlock_irq(&hugetlb_lock);
5963
5964
5964
5965
/*
5965
5966
* Adjust the reservation for the region that will have the
+24
-7
mm/kasan/shadow.c
+24
-7
mm/kasan/shadow.c
···
336
336
}
337
337
}
338
338
339
-
static int ___alloc_pages_bulk(struct page **pages, int nr_pages)
339
+
static int ___alloc_pages_bulk(struct page **pages, int nr_pages, gfp_t gfp_mask)
340
340
{
341
341
unsigned long nr_populated, nr_total = nr_pages;
342
342
struct page **page_array = pages;
343
343
344
344
while (nr_pages) {
345
-
nr_populated = alloc_pages_bulk(GFP_KERNEL, nr_pages, pages);
345
+
nr_populated = alloc_pages_bulk(gfp_mask, nr_pages, pages);
346
346
if (!nr_populated) {
347
347
___free_pages_bulk(page_array, nr_total - nr_pages);
348
348
return -ENOMEM;
···
354
354
return 0;
355
355
}
356
356
357
-
static int __kasan_populate_vmalloc(unsigned long start, unsigned long end)
357
+
static int __kasan_populate_vmalloc(unsigned long start, unsigned long end, gfp_t gfp_mask)
358
358
{
359
359
unsigned long nr_pages, nr_total = PFN_UP(end - start);
360
360
struct vmalloc_populate_data data;
361
+
unsigned int flags;
361
362
int ret = 0;
362
363
363
-
data.pages = (struct page **)__get_free_page(GFP_KERNEL | __GFP_ZERO);
364
+
data.pages = (struct page **)__get_free_page(gfp_mask | __GFP_ZERO);
364
365
if (!data.pages)
365
366
return -ENOMEM;
366
367
367
368
while (nr_total) {
368
369
nr_pages = min(nr_total, PAGE_SIZE / sizeof(data.pages[0]));
369
-
ret = ___alloc_pages_bulk(data.pages, nr_pages);
370
+
ret = ___alloc_pages_bulk(data.pages, nr_pages, gfp_mask);
370
371
if (ret)
371
372
break;
372
373
373
374
data.start = start;
375
+
376
+
/*
377
+
* page tables allocations ignore external gfp mask, enforce it
378
+
* by the scope API
379
+
*/
380
+
if ((gfp_mask & (__GFP_FS | __GFP_IO)) == __GFP_IO)
381
+
flags = memalloc_nofs_save();
382
+
else if ((gfp_mask & (__GFP_FS | __GFP_IO)) == 0)
383
+
flags = memalloc_noio_save();
384
+
374
385
ret = apply_to_page_range(&init_mm, start, nr_pages * PAGE_SIZE,
375
386
kasan_populate_vmalloc_pte, &data);
387
+
388
+
if ((gfp_mask & (__GFP_FS | __GFP_IO)) == __GFP_IO)
389
+
memalloc_nofs_restore(flags);
390
+
else if ((gfp_mask & (__GFP_FS | __GFP_IO)) == 0)
391
+
memalloc_noio_restore(flags);
392
+
376
393
___free_pages_bulk(data.pages, nr_pages);
377
394
if (ret)
378
395
break;
···
403
386
return ret;
404
387
}
405
388
406
-
int kasan_populate_vmalloc(unsigned long addr, unsigned long size)
389
+
int kasan_populate_vmalloc(unsigned long addr, unsigned long size, gfp_t gfp_mask)
407
390
{
408
391
unsigned long shadow_start, shadow_end;
409
392
int ret;
···
432
415
shadow_start = PAGE_ALIGN_DOWN(shadow_start);
433
416
shadow_end = PAGE_ALIGN(shadow_end);
434
417
435
-
ret = __kasan_populate_vmalloc(shadow_start, shadow_end);
418
+
ret = __kasan_populate_vmalloc(shadow_start, shadow_end, gfp_mask);
436
419
if (ret)
437
420
return ret;
438
421
+2
-2
mm/khugepaged.c
+2
-2
mm/khugepaged.c
···
1417
1417
*/
1418
1418
if (cc->is_khugepaged &&
1419
1419
(pte_young(pteval) || folio_test_young(folio) ||
1420
-
folio_test_referenced(folio) || mmu_notifier_test_young(vma->vm_mm,
1421
-
address)))
1420
+
folio_test_referenced(folio) ||
1421
+
mmu_notifier_test_young(vma->vm_mm, _address)))
1422
1422
referenced++;
1423
1423
}
1424
1424
if (!writable) {
+9
-11
mm/memory-failure.c
+9
-11
mm/memory-failure.c
···
956
956
[MF_MSG_BUDDY] = "free buddy page",
957
957
[MF_MSG_DAX] = "dax page",
958
958
[MF_MSG_UNSPLIT_THP] = "unsplit thp",
959
-
[MF_MSG_ALREADY_POISONED] = "already poisoned",
959
+
[MF_MSG_ALREADY_POISONED] = "already poisoned page",
960
960
[MF_MSG_UNKNOWN] = "unknown page",
961
961
};
962
962
···
1349
1349
{
1350
1350
trace_memory_failure_event(pfn, type, result);
1351
1351
1352
-
num_poisoned_pages_inc(pfn);
1353
-
1354
-
update_per_node_mf_stats(pfn, result);
1352
+
if (type != MF_MSG_ALREADY_POISONED) {
1353
+
num_poisoned_pages_inc(pfn);
1354
+
update_per_node_mf_stats(pfn, result);
1355
+
}
1355
1356
1356
1357
pr_err("%#lx: recovery action for %s: %s\n",
1357
1358
pfn, action_page_types[type], action_name[result]);
···
2095
2094
*hugetlb = 0;
2096
2095
return 0;
2097
2096
} else if (res == -EHWPOISON) {
2098
-
pr_err("%#lx: already hardware poisoned\n", pfn);
2099
2097
if (flags & MF_ACTION_REQUIRED) {
2100
2098
folio = page_folio(p);
2101
2099
res = kill_accessing_process(current, folio_pfn(folio), flags);
2102
-
action_result(pfn, MF_MSG_ALREADY_POISONED, MF_FAILED);
2103
2100
}
2101
+
action_result(pfn, MF_MSG_ALREADY_POISONED, MF_FAILED);
2104
2102
return res;
2105
2103
} else if (res == -EBUSY) {
2106
2104
if (!(flags & MF_NO_RETRY)) {
···
2285
2285
goto unlock_mutex;
2286
2286
2287
2287
if (TestSetPageHWPoison(p)) {
2288
-
pr_err("%#lx: already hardware poisoned\n", pfn);
2289
2288
res = -EHWPOISON;
2290
2289
if (flags & MF_ACTION_REQUIRED)
2291
2290
res = kill_accessing_process(current, pfn, flags);
···
2568
2569
static DEFINE_RATELIMIT_STATE(unpoison_rs, DEFAULT_RATELIMIT_INTERVAL,
2569
2570
DEFAULT_RATELIMIT_BURST);
2570
2571
2571
-
if (!pfn_valid(pfn))
2572
-
return -ENXIO;
2573
-
2574
-
p = pfn_to_page(pfn);
2572
+
p = pfn_to_online_page(pfn);
2573
+
if (!p)
2574
+
return -EIO;
2575
2575
folio = page_folio(p);
2576
2576
2577
2577
mutex_lock(&mf_mutex);
+8
-2
mm/memory_hotplug.c
+8
-2
mm/memory_hotplug.c
···
1815
1815
pfn = folio_pfn(folio) + folio_nr_pages(folio) - 1;
1816
1816
1817
1817
if (folio_contain_hwpoisoned_page(folio)) {
1818
-
if (WARN_ON(folio_test_lru(folio)))
1819
-
folio_isolate_lru(folio);
1818
+
/*
1819
+
* unmap_poisoned_folio() cannot handle large folios
1820
+
* in all cases yet.
1821
+
*/
1822
+
if (folio_test_large(folio) && !folio_test_hugetlb(folio))
1823
+
goto put_folio;
1824
+
if (folio_test_lru(folio) && !folio_isolate_lru(folio))
1825
+
goto put_folio;
1820
1826
if (folio_mapped(folio)) {
1821
1827
folio_lock(folio);
1822
1828
unmap_poisoned_folio(folio, pfn, false);
+6
-3
mm/mremap.c
+6
-3
mm/mremap.c
···
1774
1774
if (!vrm->new_len)
1775
1775
return -EINVAL;
1776
1776
1777
-
/* Is the new length or address silly? */
1778
-
if (vrm->new_len > TASK_SIZE ||
1779
-
vrm->new_addr > TASK_SIZE - vrm->new_len)
1777
+
/* Is the new length silly? */
1778
+
if (vrm->new_len > TASK_SIZE)
1780
1779
return -EINVAL;
1781
1780
1782
1781
/* Remainder of checks are for cases with specific new_addr. */
1783
1782
if (!vrm_implies_new_addr(vrm))
1784
1783
return 0;
1784
+
1785
+
/* Is the new address silly? */
1786
+
if (vrm->new_addr > TASK_SIZE - vrm->new_len)
1787
+
return -EINVAL;
1785
1788
1786
1789
/* The new address must be page-aligned. */
1787
1790
if (offset_in_page(vrm->new_addr))
+12
-8
mm/percpu.c
+12
-8
mm/percpu.c
···
1734
1734
bool is_atomic;
1735
1735
bool do_warn;
1736
1736
struct obj_cgroup *objcg = NULL;
1737
-
static int warn_limit = 10;
1737
+
static atomic_t warn_limit = ATOMIC_INIT(10);
1738
1738
struct pcpu_chunk *chunk, *next;
1739
1739
const char *err;
1740
1740
int slot, off, cpu, ret;
···
1904
1904
fail:
1905
1905
trace_percpu_alloc_percpu_fail(reserved, is_atomic, size, align);
1906
1906
1907
-
if (do_warn && warn_limit) {
1908
-
pr_warn("allocation failed, size=%zu align=%zu atomic=%d, %s\n",
1909
-
size, align, is_atomic, err);
1910
-
if (!is_atomic)
1911
-
dump_stack();
1912
-
if (!--warn_limit)
1913
-
pr_info("limit reached, disable warning\n");
1907
+
if (do_warn) {
1908
+
int remaining = atomic_dec_if_positive(&warn_limit);
1909
+
1910
+
if (remaining >= 0) {
1911
+
pr_warn("allocation failed, size=%zu align=%zu atomic=%d, %s\n",
1912
+
size, align, is_atomic, err);
1913
+
if (!is_atomic)
1914
+
dump_stack();
1915
+
if (remaining == 0)
1916
+
pr_info("limit reached, disable warning\n");
1917
+
}
1914
1918
}
1915
1919
1916
1920
if (is_atomic) {
+4
-4
mm/vmalloc.c
+4
-4
mm/vmalloc.c
···
2026
2026
if (unlikely(!vmap_initialized))
2027
2027
return ERR_PTR(-EBUSY);
2028
2028
2029
+
/* Only reclaim behaviour flags are relevant. */
2030
+
gfp_mask = gfp_mask & GFP_RECLAIM_MASK;
2029
2031
might_sleep();
2030
2032
2031
2033
/*
···
2040
2038
*/
2041
2039
va = node_alloc(size, align, vstart, vend, &addr, &vn_id);
2042
2040
if (!va) {
2043
-
gfp_mask = gfp_mask & GFP_RECLAIM_MASK;
2044
-
2045
2041
va = kmem_cache_alloc_node(vmap_area_cachep, gfp_mask, node);
2046
2042
if (unlikely(!va))
2047
2043
return ERR_PTR(-ENOMEM);
···
2089
2089
BUG_ON(va->va_start < vstart);
2090
2090
BUG_ON(va->va_end > vend);
2091
2091
2092
-
ret = kasan_populate_vmalloc(addr, size);
2092
+
ret = kasan_populate_vmalloc(addr, size, gfp_mask);
2093
2093
if (ret) {
2094
2094
free_vmap_area(va);
2095
2095
return ERR_PTR(ret);
···
4826
4826
4827
4827
/* populate the kasan shadow space */
4828
4828
for (area = 0; area < nr_vms; area++) {
4829
-
if (kasan_populate_vmalloc(vas[area]->va_start, sizes[area]))
4829
+
if (kasan_populate_vmalloc(vas[area]->va_start, sizes[area], GFP_KERNEL))
4830
4830
goto err_free_shadow;
4831
4831
}
4832
4832
+7
net/bridge/br.c
+7
net/bridge/br.c
···
324
324
int err = 0;
325
325
int opt_id;
326
326
327
+
opt_id = find_next_bit(&bitmap, BITS_PER_LONG, BR_BOOLOPT_MAX);
328
+
if (opt_id != BITS_PER_LONG) {
329
+
NL_SET_ERR_MSG_FMT_MOD(extack, "Unknown boolean option %d",
330
+
opt_id);
331
+
return -EINVAL;
332
+
}
333
+
327
334
for_each_set_bit(opt_id, &bitmap, BR_BOOLOPT_MAX) {
328
335
bool on = !!(bm->optval & BIT(opt_id));
329
336
+4
-1
net/can/j1939/bus.c
+4
-1
net/can/j1939/bus.c
···
290
290
if (!ecu)
291
291
ecu = j1939_ecu_create_locked(priv, name);
292
292
err = PTR_ERR_OR_ZERO(ecu);
293
-
if (err)
293
+
if (err) {
294
+
if (j1939_address_is_unicast(sa))
295
+
priv->ents[sa].nusers--;
294
296
goto done;
297
+
}
295
298
296
299
ecu->nusers++;
297
300
/* TODO: do we care if ecu->addr != sa? */
+1
net/can/j1939/j1939-priv.h
+1
net/can/j1939/j1939-priv.h
···
212
212
213
213
/* notify/alert all j1939 sockets bound to ifindex */
214
214
void j1939_sk_netdev_event_netdown(struct j1939_priv *priv);
215
+
void j1939_sk_netdev_event_unregister(struct j1939_priv *priv);
215
216
int j1939_cancel_active_session(struct j1939_priv *priv, struct sock *sk);
216
217
void j1939_tp_init(struct j1939_priv *priv);
217
218
+3
net/can/j1939/main.c
+3
net/can/j1939/main.c
+52
net/can/j1939/socket.c
+52
net/can/j1939/socket.c
···
521
521
ret = j1939_local_ecu_get(priv, jsk->addr.src_name, jsk->addr.sa);
522
522
if (ret) {
523
523
j1939_netdev_stop(priv);
524
+
jsk->priv = NULL;
525
+
synchronize_rcu();
526
+
j1939_priv_put(priv);
524
527
goto out_release_sock;
525
528
}
526
529
···
1301
1298
j1939_sk_queue_drop_all(priv, jsk, error_code);
1302
1299
}
1303
1300
read_unlock_bh(&priv->j1939_socks_lock);
1301
+
}
1302
+
1303
+
void j1939_sk_netdev_event_unregister(struct j1939_priv *priv)
1304
+
{
1305
+
struct sock *sk;
1306
+
struct j1939_sock *jsk;
1307
+
bool wait_rcu = false;
1308
+
1309
+
rescan: /* The caller is holding a ref on this "priv" via j1939_priv_get_by_ndev(). */
1310
+
read_lock_bh(&priv->j1939_socks_lock);
1311
+
list_for_each_entry(jsk, &priv->j1939_socks, list) {
1312
+
/* Skip if j1939_jsk_add() is not called on this socket. */
1313
+
if (!(jsk->state & J1939_SOCK_BOUND))
1314
+
continue;
1315
+
sk = &jsk->sk;
1316
+
sock_hold(sk);
1317
+
read_unlock_bh(&priv->j1939_socks_lock);
1318
+
/* Check if j1939_jsk_del() is not yet called on this socket after holding
1319
+
* socket's lock, for both j1939_sk_bind() and j1939_sk_release() call
1320
+
* j1939_jsk_del() with socket's lock held.
1321
+
*/
1322
+
lock_sock(sk);
1323
+
if (jsk->state & J1939_SOCK_BOUND) {
1324
+
/* Neither j1939_sk_bind() nor j1939_sk_release() called j1939_jsk_del().
1325
+
* Make this socket no longer bound, by pretending as if j1939_sk_bind()
1326
+
* dropped old references but did not get new references.
1327
+
*/
1328
+
j1939_jsk_del(priv, jsk);
1329
+
j1939_local_ecu_put(priv, jsk->addr.src_name, jsk->addr.sa);
1330
+
j1939_netdev_stop(priv);
1331
+
/* Call j1939_priv_put() now and prevent j1939_sk_sock_destruct() from
1332
+
* calling the corresponding j1939_priv_put().
1333
+
*
1334
+
* j1939_sk_sock_destruct() is supposed to call j1939_priv_put() after
1335
+
* an RCU grace period. But since the caller is holding a ref on this
1336
+
* "priv", we can defer synchronize_rcu() until immediately before
1337
+
* the caller calls j1939_priv_put().
1338
+
*/
1339
+
j1939_priv_put(priv);
1340
+
jsk->priv = NULL;
1341
+
wait_rcu = true;
1342
+
}
1343
+
release_sock(sk);
1344
+
sock_put(sk);
1345
+
goto rescan;
1346
+
}
1347
+
read_unlock_bh(&priv->j1939_socks_lock);
1348
+
if (wait_rcu)
1349
+
synchronize_rcu();
1304
1350
}
1305
1351
1306
1352
static int j1939_sk_no_ioctlcmd(struct socket *sock, unsigned int cmd,
+4
-3
net/ceph/messenger.c
+4
-3
net/ceph/messenger.c
···
1524
1524
* in case we faulted due to authentication, invalidate our
1525
1525
* current tickets so that we can get new ones.
1526
1526
*/
1527
-
if (con->v1.auth_retry) {
1527
+
if (!ceph_msgr2(from_msgr(con->msgr)) && con->v1.auth_retry) {
1528
1528
dout("auth_retry %d, invalidating\n", con->v1.auth_retry);
1529
1529
if (con->ops->invalidate_authorizer)
1530
1530
con->ops->invalidate_authorizer(con);
···
1714
1714
{
1715
1715
/* come back from STANDBY? */
1716
1716
if (con->state == CEPH_CON_S_STANDBY) {
1717
-
dout("clear_standby %p and ++connect_seq\n", con);
1717
+
dout("clear_standby %p\n", con);
1718
1718
con->state = CEPH_CON_S_PREOPEN;
1719
-
con->v1.connect_seq++;
1719
+
if (!ceph_msgr2(from_msgr(con->msgr)))
1720
+
con->v1.connect_seq++;
1720
1721
WARN_ON(ceph_con_flag_test(con, CEPH_CON_F_WRITE_PENDING));
1721
1722
WARN_ON(ceph_con_flag_test(con, CEPH_CON_F_KEEPALIVE_PENDING));
1722
1723
}
+18
-4
net/core/dev_ioctl.c
+18
-4
net/core/dev_ioctl.c
···
464
464
if (!netif_device_present(dev))
465
465
return -ENODEV;
466
466
467
-
if (ops->ndo_hwtstamp_get)
468
-
return dev_get_hwtstamp_phylib(dev, kernel_cfg);
467
+
if (ops->ndo_hwtstamp_get) {
468
+
int err;
469
+
470
+
netdev_lock_ops(dev);
471
+
err = dev_get_hwtstamp_phylib(dev, kernel_cfg);
472
+
netdev_unlock_ops(dev);
473
+
474
+
return err;
475
+
}
469
476
470
477
/* Legacy path: unconverted lower driver */
471
478
return generic_hwtstamp_ioctl_lower(dev, SIOCGHWTSTAMP, kernel_cfg);
···
488
481
if (!netif_device_present(dev))
489
482
return -ENODEV;
490
483
491
-
if (ops->ndo_hwtstamp_set)
492
-
return dev_set_hwtstamp_phylib(dev, kernel_cfg, extack);
484
+
if (ops->ndo_hwtstamp_set) {
485
+
int err;
486
+
487
+
netdev_lock_ops(dev);
488
+
err = dev_set_hwtstamp_phylib(dev, kernel_cfg, extack);
489
+
netdev_unlock_ops(dev);
490
+
491
+
return err;
492
+
}
493
493
494
494
/* Legacy path: unconverted lower driver */
495
495
return generic_hwtstamp_ioctl_lower(dev, SIOCSHWTSTAMP, kernel_cfg);
+18
-10
net/hsr/hsr_device.c
+18
-10
net/hsr/hsr_device.c
···
49
49
50
50
ASSERT_RTNL();
51
51
52
-
hsr_for_each_port(master->hsr, port) {
52
+
hsr_for_each_port_rtnl(master->hsr, port) {
53
53
if (port->type != HSR_PT_MASTER && is_slave_up(port->dev)) {
54
54
netif_carrier_on(master->dev);
55
55
return true;
···
105
105
struct hsr_port *port;
106
106
107
107
mtu_max = ETH_DATA_LEN;
108
-
hsr_for_each_port(hsr, port)
108
+
hsr_for_each_port_rtnl(hsr, port)
109
109
if (port->type != HSR_PT_MASTER)
110
110
mtu_max = min(port->dev->mtu, mtu_max);
111
111
···
139
139
140
140
hsr = netdev_priv(dev);
141
141
142
-
hsr_for_each_port(hsr, port) {
142
+
hsr_for_each_port_rtnl(hsr, port) {
143
143
if (port->type == HSR_PT_MASTER)
144
144
continue;
145
145
switch (port->type) {
···
172
172
struct hsr_priv *hsr;
173
173
174
174
hsr = netdev_priv(dev);
175
-
hsr_for_each_port(hsr, port) {
175
+
hsr_for_each_port_rtnl(hsr, port) {
176
176
if (port->type == HSR_PT_MASTER)
177
177
continue;
178
178
switch (port->type) {
···
205
205
* may become enabled.
206
206
*/
207
207
features &= ~NETIF_F_ONE_FOR_ALL;
208
-
hsr_for_each_port(hsr, port)
208
+
hsr_for_each_port_rtnl(hsr, port)
209
209
features = netdev_increment_features(features,
210
210
port->dev->features,
211
211
mask);
···
226
226
struct hsr_priv *hsr = netdev_priv(dev);
227
227
struct hsr_port *master;
228
228
229
+
rcu_read_lock();
229
230
master = hsr_port_get_hsr(hsr, HSR_PT_MASTER);
230
231
if (master) {
231
232
skb->dev = master->dev;
···
239
238
dev_core_stats_tx_dropped_inc(dev);
240
239
dev_kfree_skb_any(skb);
241
240
}
241
+
rcu_read_unlock();
242
+
242
243
return NETDEV_TX_OK;
243
244
}
244
245
···
487
484
488
485
hsr = netdev_priv(dev);
489
486
490
-
hsr_for_each_port(hsr, port) {
487
+
hsr_for_each_port_rtnl(hsr, port) {
491
488
if (port->type == HSR_PT_MASTER)
492
489
continue;
493
490
switch (port->type) {
···
509
506
510
507
hsr = netdev_priv(dev);
511
508
512
-
hsr_for_each_port(hsr, port) {
509
+
hsr_for_each_port_rtnl(hsr, port) {
513
510
if (port->type == HSR_PT_MASTER)
514
511
continue;
515
512
switch (port->type) {
···
537
534
538
535
hsr = netdev_priv(dev);
539
536
540
-
hsr_for_each_port(hsr, port) {
537
+
hsr_for_each_port_rtnl(hsr, port) {
541
538
if (port->type == HSR_PT_MASTER ||
542
539
port->type == HSR_PT_INTERLINK)
543
540
continue;
···
583
580
584
581
hsr = netdev_priv(dev);
585
582
586
-
hsr_for_each_port(hsr, port) {
583
+
hsr_for_each_port_rtnl(hsr, port) {
587
584
switch (port->type) {
588
585
case HSR_PT_SLAVE_A:
589
586
case HSR_PT_SLAVE_B:
···
675
672
struct hsr_priv *hsr = netdev_priv(ndev);
676
673
struct hsr_port *port;
677
674
675
+
rcu_read_lock();
678
676
hsr_for_each_port(hsr, port)
679
-
if (port->type == pt)
677
+
if (port->type == pt) {
678
+
dev_hold(port->dev);
679
+
rcu_read_unlock();
680
680
return port->dev;
681
+
}
682
+
rcu_read_unlock();
681
683
return NULL;
682
684
}
683
685
EXPORT_SYMBOL(hsr_get_port_ndev);
+2
-2
net/hsr/hsr_main.c
+2
-2
net/hsr/hsr_main.c
···
22
22
{
23
23
struct hsr_port *port;
24
24
25
-
hsr_for_each_port(hsr, port)
25
+
hsr_for_each_port_rtnl(hsr, port)
26
26
if (port->type != HSR_PT_MASTER)
27
27
return false;
28
28
return true;
···
134
134
{
135
135
struct hsr_port *port;
136
136
137
-
hsr_for_each_port(hsr, port)
137
+
hsr_for_each_port_rtnl(hsr, port)
138
138
if (port->type == pt)
139
139
return port;
140
140
return NULL;
+3
net/hsr/hsr_main.h
+3
net/hsr/hsr_main.h
···
224
224
#define hsr_for_each_port(hsr, port) \
225
225
list_for_each_entry_rcu((port), &(hsr)->ports, port_list)
226
226
227
+
#define hsr_for_each_port_rtnl(hsr, port) \
228
+
list_for_each_entry_rcu((port), &(hsr)->ports, port_list, lockdep_rtnl_is_held())
229
+
227
230
struct hsr_port *hsr_port_get_hsr(struct hsr_priv *hsr, enum hsr_port_type pt);
228
231
229
232
/* Caller must ensure skb is a valid HSR frame */
+6
net/ipv4/ip_tunnel_core.c
+6
net/ipv4/ip_tunnel_core.c
···
206
206
if (!pskb_may_pull(skb, ETH_HLEN + sizeof(struct iphdr)))
207
207
return -EINVAL;
208
208
209
+
if (skb_is_gso(skb))
210
+
skb_gso_reset(skb);
211
+
209
212
skb_copy_bits(skb, skb_mac_offset(skb), &eh, ETH_HLEN);
210
213
pskb_pull(skb, ETH_HLEN);
211
214
skb_reset_network_header(skb);
···
302
299
303
300
if (!pskb_may_pull(skb, ETH_HLEN + sizeof(struct ipv6hdr)))
304
301
return -EINVAL;
302
+
303
+
if (skb_is_gso(skb))
304
+
skb_gso_reset(skb);
305
305
306
306
skb_copy_bits(skb, skb_mac_offset(skb), &eh, ETH_HLEN);
307
307
pskb_pull(skb, ETH_HLEN);
+4
-1
net/ipv4/tcp_bpf.c
+4
-1
net/ipv4/tcp_bpf.c
···
408
408
if (!psock->cork) {
409
409
psock->cork = kzalloc(sizeof(*psock->cork),
410
410
GFP_ATOMIC | __GFP_NOWARN);
411
-
if (!psock->cork)
411
+
if (!psock->cork) {
412
+
sk_msg_free(sk, msg);
413
+
*copied = 0;
412
414
return -ENOMEM;
415
+
}
413
416
}
414
417
memcpy(psock->cork, msg, sizeof(*msg));
415
418
return 0;
+5
-6
net/mptcp/sockopt.c
+5
-6
net/mptcp/sockopt.c
···
1532
1532
{
1533
1533
static const unsigned int tx_rx_locks = SOCK_RCVBUF_LOCK | SOCK_SNDBUF_LOCK;
1534
1534
struct sock *sk = (struct sock *)msk;
1535
+
bool keep_open;
1535
1536
1536
-
if (ssk->sk_prot->keepalive) {
1537
-
if (sock_flag(sk, SOCK_KEEPOPEN))
1538
-
ssk->sk_prot->keepalive(ssk, 1);
1539
-
else
1540
-
ssk->sk_prot->keepalive(ssk, 0);
1541
-
}
1537
+
keep_open = sock_flag(sk, SOCK_KEEPOPEN);
1538
+
if (ssk->sk_prot->keepalive)
1539
+
ssk->sk_prot->keepalive(ssk, keep_open);
1540
+
sock_valbool_flag(ssk, SOCK_KEEPOPEN, keep_open);
1542
1541
1543
1542
ssk->sk_priority = sk->sk_priority;
1544
1543
ssk->sk_bound_dev_if = sk->sk_bound_dev_if;
+34
-32
net/netfilter/nf_tables_api.c
+34
-32
net/netfilter/nf_tables_api.c
···
1131
1131
return ERR_PTR(-ENOENT);
1132
1132
}
1133
1133
1134
-
static __be16 nft_base_seq(const struct net *net)
1134
+
static unsigned int nft_base_seq(const struct net *net)
1135
1135
{
1136
-
struct nftables_pernet *nft_net = nft_pernet(net);
1136
+
return READ_ONCE(net->nft.base_seq);
1137
+
}
1137
1138
1138
-
return htons(nft_net->base_seq & 0xffff);
1139
+
static __be16 nft_base_seq_be16(const struct net *net)
1140
+
{
1141
+
return htons(nft_base_seq(net) & 0xffff);
1139
1142
}
1140
1143
1141
1144
static const struct nla_policy nft_table_policy[NFTA_TABLE_MAX + 1] = {
···
1158
1155
1159
1156
nlh = nfnl_msg_put(skb, portid, seq,
1160
1157
nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event),
1161
-
flags, family, NFNETLINK_V0, nft_base_seq(net));
1158
+
flags, family, NFNETLINK_V0, nft_base_seq_be16(net));
1162
1159
if (!nlh)
1163
1160
goto nla_put_failure;
1164
1161
···
1251
1248
1252
1249
rcu_read_lock();
1253
1250
nft_net = nft_pernet(net);
1254
-
cb->seq = READ_ONCE(nft_net->base_seq);
1251
+
cb->seq = nft_base_seq(net);
1255
1252
1256
1253
list_for_each_entry_rcu(table, &nft_net->tables, list) {
1257
1254
if (family != NFPROTO_UNSPEC && family != table->family)
···
2033
2030
2034
2031
nlh = nfnl_msg_put(skb, portid, seq,
2035
2032
nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event),
2036
-
flags, family, NFNETLINK_V0, nft_base_seq(net));
2033
+
flags, family, NFNETLINK_V0, nft_base_seq_be16(net));
2037
2034
if (!nlh)
2038
2035
goto nla_put_failure;
2039
2036
···
2136
2133
2137
2134
rcu_read_lock();
2138
2135
nft_net = nft_pernet(net);
2139
-
cb->seq = READ_ONCE(nft_net->base_seq);
2136
+
cb->seq = nft_base_seq(net);
2140
2137
2141
2138
list_for_each_entry_rcu(table, &nft_net->tables, list) {
2142
2139
if (family != NFPROTO_UNSPEC && family != table->family)
···
3674
3671
u16 type = nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event);
3675
3672
3676
3673
nlh = nfnl_msg_put(skb, portid, seq, type, flags, family, NFNETLINK_V0,
3677
-
nft_base_seq(net));
3674
+
nft_base_seq_be16(net));
3678
3675
if (!nlh)
3679
3676
goto nla_put_failure;
3680
3677
···
3842
3839
3843
3840
rcu_read_lock();
3844
3841
nft_net = nft_pernet(net);
3845
-
cb->seq = READ_ONCE(nft_net->base_seq);
3842
+
cb->seq = nft_base_seq(net);
3846
3843
3847
3844
list_for_each_entry_rcu(table, &nft_net->tables, list) {
3848
3845
if (family != NFPROTO_UNSPEC && family != table->family)
···
4053
4050
buf = kasprintf(GFP_ATOMIC, "%.*s:%u",
4054
4051
nla_len(nla[NFTA_RULE_TABLE]),
4055
4052
(char *)nla_data(nla[NFTA_RULE_TABLE]),
4056
-
nft_net->base_seq);
4053
+
nft_base_seq(net));
4057
4054
audit_log_nfcfg(buf, info->nfmsg->nfgen_family, 1,
4058
4055
AUDIT_NFT_OP_RULE_RESET, GFP_ATOMIC);
4059
4056
kfree(buf);
···
4890
4887
nlh = nfnl_msg_put(skb, portid, seq,
4891
4888
nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event),
4892
4889
flags, ctx->family, NFNETLINK_V0,
4893
-
nft_base_seq(ctx->net));
4890
+
nft_base_seq_be16(ctx->net));
4894
4891
if (!nlh)
4895
4892
goto nla_put_failure;
4896
4893
···
5035
5032
5036
5033
rcu_read_lock();
5037
5034
nft_net = nft_pernet(net);
5038
-
cb->seq = READ_ONCE(nft_net->base_seq);
5035
+
cb->seq = nft_base_seq(net);
5039
5036
5040
5037
list_for_each_entry_rcu(table, &nft_net->tables, list) {
5041
5038
if (ctx->family != NFPROTO_UNSPEC &&
···
6212
6209
6213
6210
rcu_read_lock();
6214
6211
nft_net = nft_pernet(net);
6215
-
cb->seq = READ_ONCE(nft_net->base_seq);
6212
+
cb->seq = nft_base_seq(net);
6216
6213
6217
6214
list_for_each_entry_rcu(table, &nft_net->tables, list) {
6218
6215
if (dump_ctx->ctx.family != NFPROTO_UNSPEC &&
···
6241
6238
seq = cb->nlh->nlmsg_seq;
6242
6239
6243
6240
nlh = nfnl_msg_put(skb, portid, seq, event, NLM_F_MULTI,
6244
-
table->family, NFNETLINK_V0, nft_base_seq(net));
6241
+
table->family, NFNETLINK_V0, nft_base_seq_be16(net));
6245
6242
if (!nlh)
6246
6243
goto nla_put_failure;
6247
6244
···
6334
6331
6335
6332
event = nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event);
6336
6333
nlh = nfnl_msg_put(skb, portid, seq, event, flags, ctx->family,
6337
-
NFNETLINK_V0, nft_base_seq(ctx->net));
6334
+
NFNETLINK_V0, nft_base_seq_be16(ctx->net));
6338
6335
if (!nlh)
6339
6336
goto nla_put_failure;
6340
6337
···
6633
6630
}
6634
6631
nelems++;
6635
6632
}
6636
-
audit_log_nft_set_reset(dump_ctx.ctx.table, nft_net->base_seq, nelems);
6633
+
audit_log_nft_set_reset(dump_ctx.ctx.table, nft_base_seq(info->net), nelems);
6637
6634
6638
6635
out_unlock:
6639
6636
rcu_read_unlock();
···
8384
8381
8385
8382
nlh = nfnl_msg_put(skb, portid, seq,
8386
8383
nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event),
8387
-
flags, family, NFNETLINK_V0, nft_base_seq(net));
8384
+
flags, family, NFNETLINK_V0, nft_base_seq_be16(net));
8388
8385
if (!nlh)
8389
8386
goto nla_put_failure;
8390
8387
···
8449
8446
8450
8447
rcu_read_lock();
8451
8448
nft_net = nft_pernet(net);
8452
-
cb->seq = READ_ONCE(nft_net->base_seq);
8449
+
cb->seq = nft_base_seq(net);
8453
8450
8454
8451
list_for_each_entry_rcu(table, &nft_net->tables, list) {
8455
8452
if (family != NFPROTO_UNSPEC && family != table->family)
···
8483
8480
idx++;
8484
8481
}
8485
8482
if (ctx->reset && entries)
8486
-
audit_log_obj_reset(table, nft_net->base_seq, entries);
8483
+
audit_log_obj_reset(table, nft_base_seq(net), entries);
8487
8484
if (rc < 0)
8488
8485
break;
8489
8486
}
···
8652
8649
buf = kasprintf(GFP_ATOMIC, "%.*s:%u",
8653
8650
nla_len(nla[NFTA_OBJ_TABLE]),
8654
8651
(char *)nla_data(nla[NFTA_OBJ_TABLE]),
8655
-
nft_net->base_seq);
8652
+
nft_base_seq(net));
8656
8653
audit_log_nfcfg(buf, info->nfmsg->nfgen_family, 1,
8657
8654
AUDIT_NFT_OP_OBJ_RESET, GFP_ATOMIC);
8658
8655
kfree(buf);
···
8757
8754
struct nft_object *obj, u32 portid, u32 seq, int event,
8758
8755
u16 flags, int family, int report, gfp_t gfp)
8759
8756
{
8760
-
struct nftables_pernet *nft_net = nft_pernet(net);
8761
8757
char *buf = kasprintf(gfp, "%s:%u",
8762
-
table->name, nft_net->base_seq);
8758
+
table->name, nft_base_seq(net));
8763
8759
8764
8760
audit_log_nfcfg(buf,
8765
8761
family,
···
9444
9442
9445
9443
nlh = nfnl_msg_put(skb, portid, seq,
9446
9444
nfnl_msg_type(NFNL_SUBSYS_NFTABLES, event),
9447
-
flags, family, NFNETLINK_V0, nft_base_seq(net));
9445
+
flags, family, NFNETLINK_V0, nft_base_seq_be16(net));
9448
9446
if (!nlh)
9449
9447
goto nla_put_failure;
9450
9448
···
9513
9511
9514
9512
rcu_read_lock();
9515
9513
nft_net = nft_pernet(net);
9516
-
cb->seq = READ_ONCE(nft_net->base_seq);
9514
+
cb->seq = nft_base_seq(net);
9517
9515
9518
9516
list_for_each_entry_rcu(table, &nft_net->tables, list) {
9519
9517
if (family != NFPROTO_UNSPEC && family != table->family)
···
9698
9696
static int nf_tables_fill_gen_info(struct sk_buff *skb, struct net *net,
9699
9697
u32 portid, u32 seq)
9700
9698
{
9701
-
struct nftables_pernet *nft_net = nft_pernet(net);
9702
9699
struct nlmsghdr *nlh;
9703
9700
char buf[TASK_COMM_LEN];
9704
9701
int event = nfnl_msg_type(NFNL_SUBSYS_NFTABLES, NFT_MSG_NEWGEN);
9705
9702
9706
9703
nlh = nfnl_msg_put(skb, portid, seq, event, 0, AF_UNSPEC,
9707
-
NFNETLINK_V0, nft_base_seq(net));
9704
+
NFNETLINK_V0, nft_base_seq_be16(net));
9708
9705
if (!nlh)
9709
9706
goto nla_put_failure;
9710
9707
9711
-
if (nla_put_be32(skb, NFTA_GEN_ID, htonl(nft_net->base_seq)) ||
9708
+
if (nla_put_be32(skb, NFTA_GEN_ID, htonl(nft_base_seq(net))) ||
9712
9709
nla_put_be32(skb, NFTA_GEN_PROC_PID, htonl(task_pid_nr(current))) ||
9713
9710
nla_put_string(skb, NFTA_GEN_PROC_NAME, get_task_comm(buf, current)))
9714
9711
goto nla_put_failure;
···
10969
10968
* Bump generation counter, invalidate any dump in progress.
10970
10969
* Cannot fail after this point.
10971
10970
*/
10972
-
base_seq = READ_ONCE(nft_net->base_seq);
10971
+
base_seq = nft_base_seq(net);
10973
10972
while (++base_seq == 0)
10974
10973
;
10975
10974
10976
-
WRITE_ONCE(nft_net->base_seq, base_seq);
10975
+
/* pairs with smp_load_acquire in nft_lookup_eval */
10976
+
smp_store_release(&net->nft.base_seq, base_seq);
10977
10977
10978
10978
gc_seq = nft_gc_seq_begin(nft_net);
10979
10979
···
11183
11181
11184
11182
nft_commit_notify(net, NETLINK_CB(skb).portid);
11185
11183
nf_tables_gen_notify(net, skb, NFT_MSG_NEWGEN);
11186
-
nf_tables_commit_audit_log(&adl, nft_net->base_seq);
11184
+
nf_tables_commit_audit_log(&adl, nft_base_seq(net));
11187
11185
11188
11186
nft_gc_seq_end(nft_net, gc_seq);
11189
11187
nft_net->validate_state = NFT_VALIDATE_SKIP;
···
11508
11506
mutex_lock(&nft_net->commit_mutex);
11509
11507
nft_net->tstamp = get_jiffies_64();
11510
11508
11511
-
genid_ok = genid == 0 || nft_net->base_seq == genid;
11509
+
genid_ok = genid == 0 || nft_base_seq(net) == genid;
11512
11510
if (!genid_ok)
11513
11511
mutex_unlock(&nft_net->commit_mutex);
11514
11512
···
12145
12143
INIT_LIST_HEAD(&nft_net->module_list);
12146
12144
INIT_LIST_HEAD(&nft_net->notify_list);
12147
12145
mutex_init(&nft_net->commit_mutex);
12148
-
nft_net->base_seq = 1;
12146
+
net->nft.base_seq = 1;
12149
12147
nft_net->gc_seq = 0;
12150
12148
nft_net->validate_state = NFT_VALIDATE_SKIP;
12151
12149
INIT_WORK(&nft_net->destroy_work, nf_tables_trans_destroy_work);
+41
-5
net/netfilter/nft_lookup.c
+41
-5
net/netfilter/nft_lookup.c
···
24
24
struct nft_set_binding binding;
25
25
};
26
26
27
-
#ifdef CONFIG_MITIGATION_RETPOLINE
28
-
const struct nft_set_ext *
29
-
nft_set_do_lookup(const struct net *net, const struct nft_set *set,
30
-
const u32 *key)
27
+
static const struct nft_set_ext *
28
+
__nft_set_do_lookup(const struct net *net, const struct nft_set *set,
29
+
const u32 *key)
31
30
{
31
+
#ifdef CONFIG_MITIGATION_RETPOLINE
32
32
if (set->ops == &nft_set_hash_fast_type.ops)
33
33
return nft_hash_lookup_fast(net, set, key);
34
34
if (set->ops == &nft_set_hash_type.ops)
···
51
51
return nft_rbtree_lookup(net, set, key);
52
52
53
53
WARN_ON_ONCE(1);
54
+
#endif
54
55
return set->ops->lookup(net, set, key);
55
56
}
57
+
58
+
static unsigned int nft_base_seq(const struct net *net)
59
+
{
60
+
/* pairs with smp_store_release() in nf_tables_commit() */
61
+
return smp_load_acquire(&net->nft.base_seq);
62
+
}
63
+
64
+
static bool nft_lookup_should_retry(const struct net *net, unsigned int seq)
65
+
{
66
+
return unlikely(seq != nft_base_seq(net));
67
+
}
68
+
69
+
const struct nft_set_ext *
70
+
nft_set_do_lookup(const struct net *net, const struct nft_set *set,
71
+
const u32 *key)
72
+
{
73
+
const struct nft_set_ext *ext;
74
+
unsigned int base_seq;
75
+
76
+
do {
77
+
base_seq = nft_base_seq(net);
78
+
79
+
ext = __nft_set_do_lookup(net, set, key);
80
+
if (ext)
81
+
break;
82
+
/* No match? There is a small chance that lookup was
83
+
* performed in the old generation, but nf_tables_commit()
84
+
* already unlinked a (matching) element.
85
+
*
86
+
* We need to repeat the lookup to make sure that we didn't
87
+
* miss a matching element in the new generation.
88
+
*/
89
+
} while (nft_lookup_should_retry(net, base_seq));
90
+
91
+
return ext;
92
+
}
56
93
EXPORT_SYMBOL_GPL(nft_set_do_lookup);
57
-
#endif
58
94
59
95
void nft_lookup_eval(const struct nft_expr *expr,
60
96
struct nft_regs *regs,
+2
-1
net/netfilter/nft_set_bitmap.c
+2
-1
net/netfilter/nft_set_bitmap.c
···
226
226
const struct nft_bitmap *priv = nft_set_priv(set);
227
227
struct nft_bitmap_elem *be;
228
228
229
-
list_for_each_entry_rcu(be, &priv->list, head) {
229
+
list_for_each_entry_rcu(be, &priv->list, head,
230
+
lockdep_is_held(&nft_pernet(ctx->net)->commit_mutex)) {
230
231
if (iter->count < iter->skip)
231
232
goto cont;
232
233
+18
-2
net/netfilter/nft_set_pipapo.c
+18
-2
net/netfilter/nft_set_pipapo.c
···
510
510
*
511
511
* This function is called from the data path. It will search for
512
512
* an element matching the given key in the current active copy.
513
+
* Unlike other set types, this uses NFT_GENMASK_ANY instead of
514
+
* nft_genmask_cur().
515
+
*
516
+
* This is because new (future) elements are not reachable from
517
+
* priv->match, they get added to priv->clone instead.
518
+
* When the commit phase flips the generation bitmask, the
519
+
* 'now old' entries are skipped but without the 'now current'
520
+
* elements becoming visible. Using nft_genmask_cur() thus creates
521
+
* inconsistent state: matching old entries get skipped but thew
522
+
* newly matching entries are unreachable.
523
+
*
524
+
* GENMASK will still find the 'now old' entries which ensures consistent
525
+
* priv->match view.
526
+
*
527
+
* nft_pipapo_commit swaps ->clone and ->match shortly after the
528
+
* genbit flip. As ->clone doesn't contain the old entries in the first
529
+
* place, lookup will only find the now-current ones.
513
530
*
514
531
* Return: ntables API extension pointer or NULL if no match.
515
532
*/
···
535
518
const u32 *key)
536
519
{
537
520
struct nft_pipapo *priv = nft_set_priv(set);
538
-
u8 genmask = nft_genmask_cur(net);
539
521
const struct nft_pipapo_match *m;
540
522
const struct nft_pipapo_elem *e;
541
523
542
524
m = rcu_dereference(priv->match);
543
-
e = pipapo_get(m, (const u8 *)key, genmask, get_jiffies_64());
525
+
e = pipapo_get(m, (const u8 *)key, NFT_GENMASK_ANY, get_jiffies_64());
544
526
545
527
return e ? &e->ext : NULL;
546
528
}
+1
-3
net/netfilter/nft_set_pipapo_avx2.c
+1
-3
net/netfilter/nft_set_pipapo_avx2.c
···
1152
1152
struct nft_pipapo *priv = nft_set_priv(set);
1153
1153
const struct nft_set_ext *ext = NULL;
1154
1154
struct nft_pipapo_scratch *scratch;
1155
-
u8 genmask = nft_genmask_cur(net);
1156
1155
const struct nft_pipapo_match *m;
1157
1156
const struct nft_pipapo_field *f;
1158
1157
const u8 *rp = (const u8 *)key;
···
1247
1248
if (last) {
1248
1249
const struct nft_set_ext *e = &f->mt[ret].e->ext;
1249
1250
1250
-
if (unlikely(nft_set_elem_expired(e) ||
1251
-
!nft_set_elem_active(e, genmask)))
1251
+
if (unlikely(nft_set_elem_expired(e)))
1252
1252
goto next_match;
1253
1253
1254
1254
ext = e;
+3
-3
net/netfilter/nft_set_rbtree.c
+3
-3
net/netfilter/nft_set_rbtree.c
···
77
77
nft_rbtree_interval_end(rbe) &&
78
78
nft_rbtree_interval_start(interval))
79
79
continue;
80
-
interval = rbe;
80
+
if (nft_set_elem_active(&rbe->ext, genmask) &&
81
+
!nft_rbtree_elem_expired(rbe))
82
+
interval = rbe;
81
83
} else if (d > 0)
82
84
parent = rcu_dereference_raw(parent->rb_right);
83
85
else {
···
104
102
}
105
103
106
104
if (set->flags & NFT_SET_INTERVAL && interval != NULL &&
107
-
nft_set_elem_active(&interval->ext, genmask) &&
108
-
!nft_rbtree_elem_expired(interval) &&
109
105
nft_rbtree_interval_start(interval))
110
106
return &interval->ext;
111
107
+3
net/netlink/genetlink.c
+3
net/netlink/genetlink.c
-2
net/sunrpc/sched.c
-2
net/sunrpc/sched.c
+3
-3
net/sunrpc/xprtsock.c
+3
-3
net/sunrpc/xprtsock.c
···
407
407
iov_iter_kvec(&msg.msg_iter, ITER_DEST, &alert_kvec, 1,
408
408
alert_kvec.iov_len);
409
409
ret = sock_recvmsg(sock, &msg, flags);
410
-
if (ret > 0 &&
411
-
tls_get_record_type(sock->sk, &u.cmsg) == TLS_RECORD_TYPE_ALERT) {
412
-
iov_iter_revert(&msg.msg_iter, ret);
410
+
if (ret > 0) {
411
+
if (tls_get_record_type(sock->sk, &u.cmsg) == TLS_RECORD_TYPE_ALERT)
412
+
iov_iter_revert(&msg.msg_iter, ret);
413
413
ret = xs_sock_process_cmsg(sock, &msg, msg_flags, &u.cmsg,
414
414
-EAGAIN);
415
415
}
+7
-6
net/wireless/nl80211.c
+7
-6
net/wireless/nl80211.c
···
7062
7062
u32 seq, int flags,
7063
7063
struct cfg80211_registered_device *rdev,
7064
7064
struct net_device *dev,
7065
-
const u8 *mac_addr, struct station_info *sinfo)
7065
+
const u8 *mac_addr, struct station_info *sinfo,
7066
+
bool link_stats)
7066
7067
{
7067
7068
void *hdr;
7068
7069
struct nlattr *sinfoattr, *bss_param;
···
7284
7283
goto nla_put_failure;
7285
7284
}
7286
7285
7287
-
if (sinfo->valid_links) {
7286
+
if (link_stats && sinfo->valid_links) {
7288
7287
links = nla_nest_start(msg, NL80211_ATTR_MLO_LINKS);
7289
7288
if (!links)
7290
7289
goto nla_put_failure;
···
7575
7574
NETLINK_CB(cb->skb).portid,
7576
7575
cb->nlh->nlmsg_seq, NLM_F_MULTI,
7577
7576
rdev, wdev->netdev, mac_addr,
7578
-
&sinfo) < 0)
7577
+
&sinfo, false) < 0)
7579
7578
goto out;
7580
7579
7581
7580
sta_idx++;
···
7636
7635
7637
7636
if (nl80211_send_station(msg, NL80211_CMD_NEW_STATION,
7638
7637
info->snd_portid, info->snd_seq, 0,
7639
-
rdev, dev, mac_addr, &sinfo) < 0) {
7638
+
rdev, dev, mac_addr, &sinfo, false) < 0) {
7640
7639
nlmsg_free(msg);
7641
7640
return -ENOBUFS;
7642
7641
}
···
19681
19680
return;
19682
19681
19683
19682
if (nl80211_send_station(msg, NL80211_CMD_NEW_STATION, 0, 0, 0,
19684
-
rdev, dev, mac_addr, sinfo) < 0) {
19683
+
rdev, dev, mac_addr, sinfo, false) < 0) {
19685
19684
nlmsg_free(msg);
19686
19685
return;
19687
19686
}
···
19711
19710
}
19712
19711
19713
19712
if (nl80211_send_station(msg, NL80211_CMD_DEL_STATION, 0, 0, 0,
19714
-
rdev, dev, mac_addr, sinfo) < 0) {
19713
+
rdev, dev, mac_addr, sinfo, false) < 0) {
19715
19714
nlmsg_free(msg);
19716
19715
return;
19717
19716
}
+99
-14
net/xdp/xsk.c
+99
-14
net/xdp/xsk.c
···
36
36
#define TX_BATCH_SIZE 32
37
37
#define MAX_PER_SOCKET_BUDGET 32
38
38
39
+
struct xsk_addr_node {
40
+
u64 addr;
41
+
struct list_head addr_node;
42
+
};
43
+
44
+
struct xsk_addr_head {
45
+
u32 num_descs;
46
+
struct list_head addrs_list;
47
+
};
48
+
49
+
static struct kmem_cache *xsk_tx_generic_cache;
50
+
51
+
#define XSKCB(skb) ((struct xsk_addr_head *)((skb)->cb))
52
+
39
53
void xsk_set_rx_need_wakeup(struct xsk_buff_pool *pool)
40
54
{
41
55
if (pool->cached_need_wakeup & XDP_WAKEUP_RX)
···
546
532
return dev->netdev_ops->ndo_xsk_wakeup(dev, xs->queue_id, flags);
547
533
}
548
534
549
-
static int xsk_cq_reserve_addr_locked(struct xsk_buff_pool *pool, u64 addr)
535
+
static int xsk_cq_reserve_locked(struct xsk_buff_pool *pool)
550
536
{
551
537
unsigned long flags;
552
538
int ret;
553
539
554
540
spin_lock_irqsave(&pool->cq_lock, flags);
555
-
ret = xskq_prod_reserve_addr(pool->cq, addr);
541
+
ret = xskq_prod_reserve(pool->cq);
556
542
spin_unlock_irqrestore(&pool->cq_lock, flags);
557
543
558
544
return ret;
559
545
}
560
546
561
-
static void xsk_cq_submit_locked(struct xsk_buff_pool *pool, u32 n)
547
+
static void xsk_cq_submit_addr_locked(struct xsk_buff_pool *pool,
548
+
struct sk_buff *skb)
562
549
{
550
+
struct xsk_addr_node *pos, *tmp;
551
+
u32 descs_processed = 0;
563
552
unsigned long flags;
553
+
u32 idx;
564
554
565
555
spin_lock_irqsave(&pool->cq_lock, flags);
566
-
xskq_prod_submit_n(pool->cq, n);
556
+
idx = xskq_get_prod(pool->cq);
557
+
558
+
xskq_prod_write_addr(pool->cq, idx,
559
+
(u64)(uintptr_t)skb_shinfo(skb)->destructor_arg);
560
+
descs_processed++;
561
+
562
+
if (unlikely(XSKCB(skb)->num_descs > 1)) {
563
+
list_for_each_entry_safe(pos, tmp, &XSKCB(skb)->addrs_list, addr_node) {
564
+
xskq_prod_write_addr(pool->cq, idx + descs_processed,
565
+
pos->addr);
566
+
descs_processed++;
567
+
list_del(&pos->addr_node);
568
+
kmem_cache_free(xsk_tx_generic_cache, pos);
569
+
}
570
+
}
571
+
xskq_prod_submit_n(pool->cq, descs_processed);
567
572
spin_unlock_irqrestore(&pool->cq_lock, flags);
568
573
}
569
574
···
595
562
spin_unlock_irqrestore(&pool->cq_lock, flags);
596
563
}
597
564
565
+
static void xsk_inc_num_desc(struct sk_buff *skb)
566
+
{
567
+
XSKCB(skb)->num_descs++;
568
+
}
569
+
598
570
static u32 xsk_get_num_desc(struct sk_buff *skb)
599
571
{
600
-
return skb ? (long)skb_shinfo(skb)->destructor_arg : 0;
572
+
return XSKCB(skb)->num_descs;
601
573
}
602
574
603
575
static void xsk_destruct_skb(struct sk_buff *skb)
···
614
576
*compl->tx_timestamp = ktime_get_tai_fast_ns();
615
577
}
616
578
617
-
xsk_cq_submit_locked(xdp_sk(skb->sk)->pool, xsk_get_num_desc(skb));
579
+
xsk_cq_submit_addr_locked(xdp_sk(skb->sk)->pool, skb);
618
580
sock_wfree(skb);
619
581
}
620
582
621
-
static void xsk_set_destructor_arg(struct sk_buff *skb)
583
+
static void xsk_set_destructor_arg(struct sk_buff *skb, u64 addr)
622
584
{
623
-
long num = xsk_get_num_desc(xdp_sk(skb->sk)->skb) + 1;
624
-
625
-
skb_shinfo(skb)->destructor_arg = (void *)num;
585
+
BUILD_BUG_ON(sizeof(struct xsk_addr_head) > sizeof(skb->cb));
586
+
INIT_LIST_HEAD(&XSKCB(skb)->addrs_list);
587
+
XSKCB(skb)->num_descs = 0;
588
+
skb_shinfo(skb)->destructor_arg = (void *)(uintptr_t)addr;
626
589
}
627
590
628
591
static void xsk_consume_skb(struct sk_buff *skb)
629
592
{
630
593
struct xdp_sock *xs = xdp_sk(skb->sk);
594
+
u32 num_descs = xsk_get_num_desc(skb);
595
+
struct xsk_addr_node *pos, *tmp;
596
+
597
+
if (unlikely(num_descs > 1)) {
598
+
list_for_each_entry_safe(pos, tmp, &XSKCB(skb)->addrs_list, addr_node) {
599
+
list_del(&pos->addr_node);
600
+
kmem_cache_free(xsk_tx_generic_cache, pos);
601
+
}
602
+
}
631
603
632
604
skb->destructor = sock_wfree;
633
-
xsk_cq_cancel_locked(xs->pool, xsk_get_num_desc(skb));
605
+
xsk_cq_cancel_locked(xs->pool, num_descs);
634
606
/* Free skb without triggering the perf drop trace */
635
607
consume_skb(skb);
636
608
xs->skb = NULL;
···
657
609
{
658
610
struct xsk_buff_pool *pool = xs->pool;
659
611
u32 hr, len, ts, offset, copy, copied;
612
+
struct xsk_addr_node *xsk_addr;
660
613
struct sk_buff *skb = xs->skb;
661
614
struct page *page;
662
615
void *buffer;
···
672
623
return ERR_PTR(err);
673
624
674
625
skb_reserve(skb, hr);
626
+
627
+
xsk_set_destructor_arg(skb, desc->addr);
628
+
} else {
629
+
xsk_addr = kmem_cache_zalloc(xsk_tx_generic_cache, GFP_KERNEL);
630
+
if (!xsk_addr)
631
+
return ERR_PTR(-ENOMEM);
632
+
633
+
/* in case of -EOVERFLOW that could happen below,
634
+
* xsk_consume_skb() will release this node as whole skb
635
+
* would be dropped, which implies freeing all list elements
636
+
*/
637
+
xsk_addr->addr = desc->addr;
638
+
list_add_tail(&xsk_addr->addr_node, &XSKCB(skb)->addrs_list);
675
639
}
676
640
677
641
addr = desc->addr;
···
756
694
err = skb_store_bits(skb, 0, buffer, len);
757
695
if (unlikely(err))
758
696
goto free_err;
697
+
698
+
xsk_set_destructor_arg(skb, desc->addr);
759
699
} else {
760
700
int nr_frags = skb_shinfo(skb)->nr_frags;
701
+
struct xsk_addr_node *xsk_addr;
761
702
struct page *page;
762
703
u8 *vaddr;
763
704
···
775
710
goto free_err;
776
711
}
777
712
713
+
xsk_addr = kmem_cache_zalloc(xsk_tx_generic_cache, GFP_KERNEL);
714
+
if (!xsk_addr) {
715
+
__free_page(page);
716
+
err = -ENOMEM;
717
+
goto free_err;
718
+
}
719
+
778
720
vaddr = kmap_local_page(page);
779
721
memcpy(vaddr, buffer, len);
780
722
kunmap_local(vaddr);
781
723
782
724
skb_add_rx_frag(skb, nr_frags, page, 0, len, PAGE_SIZE);
783
725
refcount_add(PAGE_SIZE, &xs->sk.sk_wmem_alloc);
726
+
727
+
xsk_addr->addr = desc->addr;
728
+
list_add_tail(&xsk_addr->addr_node, &XSKCB(skb)->addrs_list);
784
729
}
785
730
786
731
if (first_frag && desc->options & XDP_TX_METADATA) {
···
834
759
skb->mark = READ_ONCE(xs->sk.sk_mark);
835
760
skb->destructor = xsk_destruct_skb;
836
761
xsk_tx_metadata_to_compl(meta, &skb_shinfo(skb)->xsk_meta);
837
-
xsk_set_destructor_arg(skb);
762
+
xsk_inc_num_desc(skb);
838
763
839
764
return skb;
840
765
···
844
769
845
770
if (err == -EOVERFLOW) {
846
771
/* Drop the packet */
847
-
xsk_set_destructor_arg(xs->skb);
772
+
xsk_inc_num_desc(xs->skb);
848
773
xsk_drop_skb(xs->skb);
849
774
xskq_cons_release(xs->tx);
850
775
} else {
···
887
812
* if there is space in it. This avoids having to implement
888
813
* any buffering in the Tx path.
889
814
*/
890
-
err = xsk_cq_reserve_addr_locked(xs->pool, desc.addr);
815
+
err = xsk_cq_reserve_locked(xs->pool);
891
816
if (err) {
892
817
err = -EAGAIN;
893
818
goto out;
···
1890
1815
if (err)
1891
1816
goto out_pernet;
1892
1817
1818
+
xsk_tx_generic_cache = kmem_cache_create("xsk_generic_xmit_cache",
1819
+
sizeof(struct xsk_addr_node),
1820
+
0, SLAB_HWCACHE_ALIGN, NULL);
1821
+
if (!xsk_tx_generic_cache) {
1822
+
err = -ENOMEM;
1823
+
goto out_unreg_notif;
1824
+
}
1825
+
1893
1826
return 0;
1894
1827
1828
+
out_unreg_notif:
1829
+
unregister_netdevice_notifier(&xsk_netdev_notifier);
1895
1830
out_pernet:
1896
1831
unregister_pernet_subsys(&xsk_net_ops);
1897
1832
out_sk:
+12
net/xdp/xsk_queue.h
+12
net/xdp/xsk_queue.h
···
344
344
345
345
/* Functions for producers */
346
346
347
+
static inline u32 xskq_get_prod(struct xsk_queue *q)
348
+
{
349
+
return READ_ONCE(q->ring->producer);
350
+
}
351
+
347
352
static inline u32 xskq_prod_nb_free(struct xsk_queue *q, u32 max)
348
353
{
349
354
u32 free_entries = q->nentries - (q->cached_prod - q->cached_cons);
···
393
388
/* A, matches D */
394
389
ring->desc[q->cached_prod++ & q->ring_mask] = addr;
395
390
return 0;
391
+
}
392
+
393
+
static inline void xskq_prod_write_addr(struct xsk_queue *q, u32 idx, u64 addr)
394
+
{
395
+
struct xdp_umem_ring *ring = (struct xdp_umem_ring *)q->ring;
396
+
397
+
ring->desc[idx & q->ring_mask] = addr;
396
398
}
397
399
398
400
static inline void xskq_prod_write_addr_batch(struct xsk_queue *q, struct xdp_desc *descs,
+3
-2
rust/kernel/device.rs
+3
-2
rust/kernel/device.rs
···
138
138
/// }
139
139
/// ```
140
140
///
141
-
/// An example for a class device implementation is [`drm::Device`].
141
+
/// An example for a class device implementation is
142
+
#[cfg_attr(CONFIG_DRM = "y", doc = "[`drm::Device`](kernel::drm::Device).")]
143
+
#[cfg_attr(not(CONFIG_DRM = "y"), doc = "`drm::Device`.")]
142
144
///
143
145
/// # Invariants
144
146
///
···
153
151
/// dropped from any thread.
154
152
///
155
153
/// [`AlwaysRefCounted`]: kernel::types::AlwaysRefCounted
156
-
/// [`drm::Device`]: kernel::drm::Device
157
154
/// [`impl_device_context_deref`]: kernel::impl_device_context_deref
158
155
/// [`pci::Device`]: kernel::pci::Device
159
156
/// [`platform::Device`]: kernel::platform::Device
+1
-1
samples/ftrace/ftrace-direct-modify.c
+1
-1
samples/ftrace/ftrace-direct-modify.c
+4
tools/testing/selftests/bpf/prog_tests/free_timer.c
+4
tools/testing/selftests/bpf/prog_tests/free_timer.c
+4
tools/testing/selftests/bpf/prog_tests/timer.c
+4
tools/testing/selftests/bpf/prog_tests/timer.c
+4
tools/testing/selftests/bpf/prog_tests/timer_crash.c
+4
tools/testing/selftests/bpf/prog_tests/timer_crash.c
+4
tools/testing/selftests/bpf/prog_tests/timer_lockup.c
+4
tools/testing/selftests/bpf/prog_tests/timer_lockup.c
+4
tools/testing/selftests/bpf/prog_tests/timer_mim.c
+4
tools/testing/selftests/bpf/prog_tests/timer_mim.c
+2
-2
tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h
+2
-2
tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h
···
302
302
* barriers.
303
303
*/
304
304
if (val & _Q_LOCKED_MASK)
305
-
smp_cond_load_acquire_label(&lock->locked, !VAL, release_err);
305
+
(void)smp_cond_load_acquire_label(&lock->locked, !VAL, release_err);
306
306
307
307
/*
308
308
* take ownership and clear the pending bit.
···
380
380
/* Link @node into the waitqueue. */
381
381
WRITE_ONCE(prev->next, node);
382
382
383
-
arch_mcs_spin_lock_contended_label(&node->locked, release_node_err);
383
+
(void)arch_mcs_spin_lock_contended_label(&node->locked, release_node_err);
384
384
385
385
/*
386
386
* While waiting for the MCS lock, the next pointer may have
+32
-14
tools/testing/selftests/bpf/progs/crypto_sanity.c
+32
-14
tools/testing/selftests/bpf/progs/crypto_sanity.c
···
14
14
u16 udp_test_port = 7777;
15
15
u32 authsize, key_len;
16
16
char algo[128] = {};
17
-
char dst[16] = {};
17
+
char dst[16] = {}, dst_bad[8] = {};
18
18
int status;
19
19
20
20
static int skb_dynptr_validate(struct __sk_buff *skb, struct bpf_dynptr *psrc)
···
59
59
.authsize = authsize,
60
60
};
61
61
struct bpf_crypto_ctx *cctx;
62
-
int err = 0;
62
+
int err;
63
63
64
64
status = 0;
65
-
66
65
if (key_len > 256) {
67
66
status = -EINVAL;
68
67
return 0;
···
69
70
70
71
__builtin_memcpy(¶ms.algo, algo, sizeof(algo));
71
72
__builtin_memcpy(¶ms.key, key, sizeof(key));
72
-
cctx = bpf_crypto_ctx_create(¶ms, sizeof(params), &err);
73
73
74
+
cctx = bpf_crypto_ctx_create(¶ms, sizeof(params), &err);
74
75
if (!cctx) {
75
76
status = err;
76
77
return 0;
···
79
80
err = crypto_ctx_insert(cctx);
80
81
if (err && err != -EEXIST)
81
82
status = err;
82
-
83
83
return 0;
84
84
}
85
85
···
90
92
struct bpf_dynptr psrc, pdst;
91
93
int err;
92
94
95
+
status = 0;
93
96
err = skb_dynptr_validate(skb, &psrc);
94
97
if (err < 0) {
95
98
status = err;
···
109
110
return TC_ACT_SHOT;
110
111
}
111
112
112
-
/* dst is a global variable to make testing part easier to check. In real
113
-
* production code, a percpu map should be used to store the result.
113
+
/* Check also bad case where the dst buffer is smaller than the
114
+
* skb's linear section.
115
+
*/
116
+
bpf_dynptr_from_mem(dst_bad, sizeof(dst_bad), 0, &pdst);
117
+
status = bpf_crypto_decrypt(ctx, &psrc, &pdst, NULL);
118
+
if (!status)
119
+
status = -EIO;
120
+
if (status != -EINVAL)
121
+
goto err;
122
+
123
+
/* dst is a global variable to make testing part easier to check.
124
+
* In real production code, a percpu map should be used to store
125
+
* the result.
114
126
*/
115
127
bpf_dynptr_from_mem(dst, sizeof(dst), 0, &pdst);
116
-
117
128
status = bpf_crypto_decrypt(ctx, &psrc, &pdst, NULL);
118
-
129
+
err:
119
130
return TC_ACT_SHOT;
120
131
}
121
132
···
138
129
int err;
139
130
140
131
status = 0;
141
-
142
132
err = skb_dynptr_validate(skb, &psrc);
143
133
if (err < 0) {
144
134
status = err;
···
156
148
return TC_ACT_SHOT;
157
149
}
158
150
159
-
/* dst is a global variable to make testing part easier to check. In real
160
-
* production code, a percpu map should be used to store the result.
151
+
/* Check also bad case where the dst buffer is smaller than the
152
+
* skb's linear section.
153
+
*/
154
+
bpf_dynptr_from_mem(dst_bad, sizeof(dst_bad), 0, &pdst);
155
+
status = bpf_crypto_encrypt(ctx, &psrc, &pdst, NULL);
156
+
if (!status)
157
+
status = -EIO;
158
+
if (status != -EINVAL)
159
+
goto err;
160
+
161
+
/* dst is a global variable to make testing part easier to check.
162
+
* In real production code, a percpu map should be used to store
163
+
* the result.
161
164
*/
162
165
bpf_dynptr_from_mem(dst, sizeof(dst), 0, &pdst);
163
-
164
166
status = bpf_crypto_encrypt(ctx, &psrc, &pdst, NULL);
165
-
167
+
err:
166
168
return TC_ACT_SHOT;
167
169
}
168
170
+2
-3
tools/testing/selftests/bpf/progs/linked_list_fail.c
+2
-3
tools/testing/selftests/bpf/progs/linked_list_fail.c
···
226
226
SEC("?tc")
227
227
int obj_new_no_struct(void *ctx)
228
228
{
229
-
230
-
bpf_obj_new(union { int data; unsigned udata; });
229
+
(void)bpf_obj_new(union { int data; unsigned udata; });
231
230
return 0;
232
231
}
233
232
···
251
252
SEC("?tc")
252
253
int obj_new_acq(void *ctx)
253
254
{
254
-
bpf_obj_new(struct foo);
255
+
(void)bpf_obj_new(struct foo);
255
256
return 0;
256
257
}
257
258
+6
-2
tools/testing/selftests/bpf/progs/string_kfuncs_success.c
+6
-2
tools/testing/selftests/bpf/progs/string_kfuncs_success.c
···
30
30
__test(6) int test_strstr_found(void *ctx) { return bpf_strstr(str, "world"); }
31
31
__test(-ENOENT) int test_strstr_notfound(void *ctx) { return bpf_strstr(str, "hi"); }
32
32
__test(0) int test_strstr_empty(void *ctx) { return bpf_strstr(str, ""); }
33
-
__test(0) int test_strnstr_found(void *ctx) { return bpf_strnstr(str, "hello", 6); }
34
-
__test(-ENOENT) int test_strnstr_notfound(void *ctx) { return bpf_strnstr(str, "hi", 10); }
33
+
__test(0) int test_strnstr_found1(void *ctx) { return bpf_strnstr("", "", 0); }
34
+
__test(0) int test_strnstr_found2(void *ctx) { return bpf_strnstr(str, "hello", 5); }
35
+
__test(0) int test_strnstr_found3(void *ctx) { return bpf_strnstr(str, "hello", 6); }
36
+
__test(-ENOENT) int test_strnstr_notfound1(void *ctx) { return bpf_strnstr(str, "hi", 10); }
37
+
__test(-ENOENT) int test_strnstr_notfound2(void *ctx) { return bpf_strnstr(str, "hello", 4); }
38
+
__test(-ENOENT) int test_strnstr_notfound3(void *ctx) { return bpf_strnstr("", "a", 0); }
35
39
__test(0) int test_strnstr_empty(void *ctx) { return bpf_strnstr(str, "", 1); }
36
40
37
41
char _license[] SEC("license") = "GPL";
+8
-9
tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c
+8
-9
tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c
···
2
2
// Copyright (c) 2025 Miklos Szeredi <miklos@szeredi.hu>
3
3
4
4
#define _GNU_SOURCE
5
+
6
+
// Needed for linux/fanotify.h
7
+
typedef struct {
8
+
int val[2];
9
+
} __kernel_fsid_t;
10
+
#define __kernel_fsid_t __kernel_fsid_t
11
+
5
12
#include <fcntl.h>
6
13
#include <sched.h>
7
14
#include <stdio.h>
···
17
10
#include <sys/mount.h>
18
11
#include <unistd.h>
19
12
#include <sys/syscall.h>
13
+
#include <sys/fanotify.h>
20
14
21
15
#include "../../kselftest_harness.h"
22
16
#include "../statmount/statmount.h"
23
17
#include "../utils.h"
24
-
25
-
// Needed for linux/fanotify.h
26
-
#ifndef __kernel_fsid_t
27
-
typedef struct {
28
-
int val[2];
29
-
} __kernel_fsid_t;
30
-
#endif
31
-
32
-
#include <sys/fanotify.h>
33
18
34
19
static const char root_mntpoint_templ[] = "/tmp/mount-notify_test_root.XXXXXX";
35
20
+8
-10
tools/testing/selftests/filesystems/mount-notify/mount-notify_test_ns.c
+8
-10
tools/testing/selftests/filesystems/mount-notify/mount-notify_test_ns.c
···
2
2
// Copyright (c) 2025 Miklos Szeredi <miklos@szeredi.hu>
3
3
4
4
#define _GNU_SOURCE
5
+
6
+
// Needed for linux/fanotify.h
7
+
typedef struct {
8
+
int val[2];
9
+
} __kernel_fsid_t;
10
+
#define __kernel_fsid_t __kernel_fsid_t
11
+
5
12
#include <fcntl.h>
6
13
#include <sched.h>
7
14
#include <stdio.h>
···
17
10
#include <sys/mount.h>
18
11
#include <unistd.h>
19
12
#include <sys/syscall.h>
13
+
#include <sys/fanotify.h>
20
14
21
15
#include "../../kselftest_harness.h"
22
-
#include "../../pidfd/pidfd.h"
23
16
#include "../statmount/statmount.h"
24
17
#include "../utils.h"
25
-
26
-
// Needed for linux/fanotify.h
27
-
#ifndef __kernel_fsid_t
28
-
typedef struct {
29
-
int val[2];
30
-
} __kernel_fsid_t;
31
-
#endif
32
-
33
-
#include <sys/fanotify.h>
34
18
35
19
static const char root_mntpoint_templ[] = "/tmp/mount-notify_test_root.XXXXXX";
36
20
+1
tools/testing/selftests/net/Makefile
+1
tools/testing/selftests/net/Makefile
+83
tools/testing/selftests/net/broadcast_ether_dst.sh
+83
tools/testing/selftests/net/broadcast_ether_dst.sh
···
1
+
#!/bin/bash
2
+
# SPDX-License-Identifier: GPL-2.0
3
+
#
4
+
# Author: Brett A C Sheffield <bacs@librecast.net>
5
+
# Author: Oscar Maes <oscmaes92@gmail.com>
6
+
#
7
+
# Ensure destination ethernet field is correctly set for
8
+
# broadcast packets
9
+
10
+
source lib.sh
11
+
12
+
CLIENT_IP4="192.168.0.1"
13
+
GW_IP4="192.168.0.2"
14
+
15
+
setup() {
16
+
setup_ns CLIENT_NS SERVER_NS
17
+
18
+
ip -net "${SERVER_NS}" link add link1 type veth \
19
+
peer name link0 netns "${CLIENT_NS}"
20
+
21
+
ip -net "${CLIENT_NS}" link set link0 up
22
+
ip -net "${CLIENT_NS}" addr add "${CLIENT_IP4}"/24 dev link0
23
+
24
+
ip -net "${SERVER_NS}" link set link1 up
25
+
26
+
ip -net "${CLIENT_NS}" route add default via "${GW_IP4}"
27
+
ip netns exec "${CLIENT_NS}" arp -s "${GW_IP4}" 00:11:22:33:44:55
28
+
}
29
+
30
+
cleanup() {
31
+
rm -f "${CAPFILE}" "${OUTPUT}"
32
+
ip -net "${SERVER_NS}" link del link1
33
+
cleanup_ns "${CLIENT_NS}" "${SERVER_NS}"
34
+
}
35
+
36
+
test_broadcast_ether_dst() {
37
+
local rc=0
38
+
CAPFILE=$(mktemp -u cap.XXXXXXXXXX)
39
+
OUTPUT=$(mktemp -u out.XXXXXXXXXX)
40
+
41
+
echo "Testing ethernet broadcast destination"
42
+
43
+
# start tcpdump listening for icmp
44
+
# tcpdump will exit after receiving a single packet
45
+
# timeout will kill tcpdump if it is still running after 2s
46
+
timeout 2s ip netns exec "${CLIENT_NS}" \
47
+
tcpdump -i link0 -c 1 -w "${CAPFILE}" icmp &> "${OUTPUT}" &
48
+
pid=$!
49
+
slowwait 1 grep -qs "listening" "${OUTPUT}"
50
+
51
+
# send broadcast ping
52
+
ip netns exec "${CLIENT_NS}" \
53
+
ping -W0.01 -c1 -b 255.255.255.255 &> /dev/null
54
+
55
+
# wait for tcpdump for exit after receiving packet
56
+
wait "${pid}"
57
+
58
+
# compare ethernet destination field to ff:ff:ff:ff:ff:ff
59
+
ether_dst=$(tcpdump -r "${CAPFILE}" -tnne 2>/dev/null | \
60
+
awk '{sub(/,/,"",$3); print $3}')
61
+
if [[ "${ether_dst}" == "ff:ff:ff:ff:ff:ff" ]]; then
62
+
echo "[ OK ]"
63
+
rc="${ksft_pass}"
64
+
else
65
+
echo "[FAIL] expected dst ether addr to be ff:ff:ff:ff:ff:ff," \
66
+
"got ${ether_dst}"
67
+
rc="${ksft_fail}"
68
+
fi
69
+
70
+
return "${rc}"
71
+
}
72
+
73
+
if [ ! -x "$(command -v tcpdump)" ]; then
74
+
echo "SKIP: Could not run test without tcpdump tool"
75
+
exit "${ksft_skip}"
76
+
fi
77
+
78
+
trap cleanup EXIT
79
+
80
+
setup
81
+
test_broadcast_ether_dst
82
+
83
+
exit $?
+3
tools/testing/selftests/net/can/config
+3
tools/testing/selftests/net/can/config
+1
-1
tools/testing/selftests/net/mptcp/diag.sh
+1
-1
tools/testing/selftests/net/mptcp/diag.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_connect.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_connect.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_join.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_join.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_sockopt.sh
+1
-1
tools/testing/selftests/net/mptcp/mptcp_sockopt.sh
+3
-2
tools/testing/selftests/net/mptcp/pm_netlink.sh
+3
-2
tools/testing/selftests/net/mptcp/pm_netlink.sh
···
32
32
err=$(mktemp)
33
33
34
34
# This function is used in the cleanup trap
35
-
#shellcheck disable=SC2317
35
+
#shellcheck disable=SC2317,SC2329
36
36
cleanup()
37
37
{
38
38
rm -f "${err}"
···
70
70
mptcp_lib_pm_nl_format_endpoints "${@}"
71
71
}
72
72
73
+
# This function is invoked indirectly
74
+
#shellcheck disable=SC2317,SC2329
73
75
get_endpoint() {
74
-
# shellcheck disable=SC2317 # invoked indirectly
75
76
mptcp_lib_pm_nl_get_endpoint "${ns1}" "${@}"
76
77
}
77
78
+1
-1
tools/testing/selftests/net/mptcp/simult_flows.sh
+1
-1
tools/testing/selftests/net/mptcp/simult_flows.sh