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coresight: etm4x: Support atclk

The atclk is an optional clock for the CoreSight ETMv4, but the driver
misses to initialize it.

This change enables atclk in probe of the ETMv4 driver, and dynamically
control the clock during suspend and resume.

No need to check the driver data and clock pointer in the runtime
suspend and resume, so remove checks. And add error handling in the
resume function.

Add a minor fix to the comment format when adding the atclk field.

Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver")
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Tested-by: James Clark <james.clark@linaro.org>
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250731-arm_cs_fix_clock_v4-v6-3-1dfe10bb3f6f@arm.com

authored by

Leo Yan and committed by
Suzuki K Poulose 40c0cdc9 5483624e

+18 -6
+15 -5
drivers/hwtracing/coresight/coresight-etm4x-core.c
··· 2221 2221 if (WARN_ON(!drvdata)) 2222 2222 return -ENOMEM; 2223 2223 2224 + drvdata->atclk = devm_clk_get_optional_enabled(dev, "atclk"); 2225 + if (IS_ERR(drvdata->atclk)) 2226 + return PTR_ERR(drvdata->atclk); 2227 + 2224 2228 if (pm_save_enable == PARAM_PM_SAVE_FIRMWARE) 2225 2229 pm_save_enable = coresight_loses_context_with_cpu(dev) ? 2226 2230 PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER; ··· 2473 2469 { 2474 2470 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); 2475 2471 2476 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) 2477 - clk_disable_unprepare(drvdata->pclk); 2472 + clk_disable_unprepare(drvdata->atclk); 2473 + clk_disable_unprepare(drvdata->pclk); 2478 2474 2479 2475 return 0; 2480 2476 } ··· 2482 2478 static int etm4_runtime_resume(struct device *dev) 2483 2479 { 2484 2480 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev); 2481 + int ret; 2485 2482 2486 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) 2487 - clk_prepare_enable(drvdata->pclk); 2483 + ret = clk_prepare_enable(drvdata->pclk); 2484 + if (ret) 2485 + return ret; 2488 2486 2489 - return 0; 2487 + ret = clk_prepare_enable(drvdata->atclk); 2488 + if (ret) 2489 + clk_disable_unprepare(drvdata->pclk); 2490 + 2491 + return ret; 2490 2492 } 2491 2493 #endif 2492 2494
+3 -1
drivers/hwtracing/coresight/coresight-etm4x.h
··· 920 920 921 921 /** 922 922 * struct etm4_drvdata - specifics associated to an ETM component 923 - * @pclk APB clock if present, otherwise NULL 923 + * @pclk: APB clock if present, otherwise NULL 924 + * @atclk: Optional clock for the core parts of the ETMv4. 924 925 * @base: Memory mapped base address for this component. 925 926 * @csdev: Component vitals needed by the framework. 926 927 * @spinlock: Only one at a time pls. ··· 990 989 */ 991 990 struct etmv4_drvdata { 992 991 struct clk *pclk; 992 + struct clk *atclk; 993 993 void __iomem *base; 994 994 struct coresight_device *csdev; 995 995 raw_spinlock_t spinlock;