Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
amd64_edac: Erratum #637 workaround
amd64_edac: Factor in CC6 save area
amd64_edac: Remove node interleave warning
EDAC: Remove debugging output in scrub rate handling
+86
-16
+78
-10
drivers/edac/amd64_edac.c
+78
-10
drivers/edac/amd64_edac.c
···
211
211
212
212
scrubval = scrubval & 0x001F;
213
213
214
-
amd64_debug("pci-read, sdram scrub control value: %d\n", scrubval);
215
-
216
214
for (i = 0; i < ARRAY_SIZE(scrubrates); i++) {
217
215
if (scrubrates[i].scrubval == scrubval) {
218
216
retval = scrubrates[i].bandwidth;
···
931
933
/* On F10h and later ErrAddr is MC4_ADDR[47:1] */
932
934
static u64 get_error_address(struct mce *m)
933
935
{
936
+
struct cpuinfo_x86 *c = &boot_cpu_data;
937
+
u64 addr;
934
938
u8 start_bit = 1;
935
939
u8 end_bit = 47;
936
940
937
-
if (boot_cpu_data.x86 == 0xf) {
941
+
if (c->x86 == 0xf) {
938
942
start_bit = 3;
939
943
end_bit = 39;
940
944
}
941
945
942
-
return m->addr & GENMASK(start_bit, end_bit);
946
+
addr = m->addr & GENMASK(start_bit, end_bit);
947
+
948
+
/*
949
+
* Erratum 637 workaround
950
+
*/
951
+
if (c->x86 == 0x15) {
952
+
struct amd64_pvt *pvt;
953
+
u64 cc6_base, tmp_addr;
954
+
u32 tmp;
955
+
u8 mce_nid, intlv_en;
956
+
957
+
if ((addr & GENMASK(24, 47)) >> 24 != 0x00fdf7)
958
+
return addr;
959
+
960
+
mce_nid = amd_get_nb_id(m->extcpu);
961
+
pvt = mcis[mce_nid]->pvt_info;
962
+
963
+
amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_LIM, &tmp);
964
+
intlv_en = tmp >> 21 & 0x7;
965
+
966
+
/* add [47:27] + 3 trailing bits */
967
+
cc6_base = (tmp & GENMASK(0, 20)) << 3;
968
+
969
+
/* reverse and add DramIntlvEn */
970
+
cc6_base |= intlv_en ^ 0x7;
971
+
972
+
/* pin at [47:24] */
973
+
cc6_base <<= 24;
974
+
975
+
if (!intlv_en)
976
+
return cc6_base | (addr & GENMASK(0, 23));
977
+
978
+
amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_BASE, &tmp);
979
+
980
+
/* faster log2 */
981
+
tmp_addr = (addr & GENMASK(12, 23)) << __fls(intlv_en + 1);
982
+
983
+
/* OR DramIntlvSel into bits [14:12] */
984
+
tmp_addr |= (tmp & GENMASK(21, 23)) >> 9;
985
+
986
+
/* add remaining [11:0] bits from original MC4_ADDR */
987
+
tmp_addr |= addr & GENMASK(0, 11);
988
+
989
+
return cc6_base | tmp_addr;
990
+
}
991
+
992
+
return addr;
943
993
}
944
994
945
995
static void read_dram_base_limit_regs(struct amd64_pvt *pvt, unsigned range)
946
996
{
997
+
struct cpuinfo_x86 *c = &boot_cpu_data;
947
998
int off = range << 3;
948
999
949
1000
amd64_read_pci_cfg(pvt->F1, DRAM_BASE_LO + off, &pvt->ranges[range].base.lo);
950
1001
amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_LO + off, &pvt->ranges[range].lim.lo);
951
1002
952
-
if (boot_cpu_data.x86 == 0xf)
1003
+
if (c->x86 == 0xf)
953
1004
return;
954
1005
955
1006
if (!dram_rw(pvt, range))
···
1006
959
1007
960
amd64_read_pci_cfg(pvt->F1, DRAM_BASE_HI + off, &pvt->ranges[range].base.hi);
1008
961
amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_HI + off, &pvt->ranges[range].lim.hi);
962
+
963
+
/* Factor in CC6 save area by reading dst node's limit reg */
964
+
if (c->x86 == 0x15) {
965
+
struct pci_dev *f1 = NULL;
966
+
u8 nid = dram_dst_node(pvt, range);
967
+
u32 llim;
968
+
969
+
f1 = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0x18 + nid, 1));
970
+
if (WARN_ON(!f1))
971
+
return;
972
+
973
+
amd64_read_pci_cfg(f1, DRAM_LOCAL_NODE_LIM, &llim);
974
+
975
+
pvt->ranges[range].lim.lo &= GENMASK(0, 15);
976
+
977
+
/* {[39:27],111b} */
978
+
pvt->ranges[range].lim.lo |= ((llim & 0x1fff) << 3 | 0x7) << 16;
979
+
980
+
pvt->ranges[range].lim.hi &= GENMASK(0, 7);
981
+
982
+
/* [47:40] */
983
+
pvt->ranges[range].lim.hi |= llim >> 13;
984
+
985
+
pci_dev_put(f1);
986
+
}
1009
987
}
1010
988
1011
989
static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
···
1475
1403
return -EINVAL;
1476
1404
}
1477
1405
1478
-
if (intlv_en &&
1479
-
(intlv_sel != ((sys_addr >> 12) & intlv_en))) {
1480
-
amd64_warn("Botched intlv bits, en: 0x%x, sel: 0x%x\n",
1481
-
intlv_en, intlv_sel);
1406
+
if (intlv_en && (intlv_sel != ((sys_addr >> 12) & intlv_en)))
1482
1407
return -EINVAL;
1483
-
}
1484
1408
1485
1409
sys_addr = f1x_swap_interleaved_region(pvt, sys_addr);
1486
1410
+3
drivers/edac/amd64_edac.h
+3
drivers/edac/amd64_edac.h
+5
-6
drivers/edac/edac_mc_sysfs.c
+5
-6
drivers/edac/edac_mc_sysfs.c
···
458
458
return -EINVAL;
459
459
460
460
new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
461
-
if (new_bw >= 0) {
462
-
edac_printk(KERN_DEBUG, EDAC_MC, "Scrub rate set to %d\n", new_bw);
463
-
return count;
461
+
if (new_bw < 0) {
462
+
edac_printk(KERN_WARNING, EDAC_MC,
463
+
"Error setting scrub rate to: %lu\n", bandwidth);
464
+
return -EINVAL;
464
465
}
465
466
466
-
edac_printk(KERN_DEBUG, EDAC_MC, "Error setting scrub rate to: %lu\n", bandwidth);
467
-
return -EINVAL;
467
+
return count;
468
468
}
469
469
470
470
/*
···
483
483
return bandwidth;
484
484
}
485
485
486
-
edac_printk(KERN_DEBUG, EDAC_MC, "Read scrub rate: %d\n", bandwidth);
487
486
return sprintf(data, "%d\n", bandwidth);
488
487
}
489
488