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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'devicetree-fixes-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree fixes from Rob Herring:

- Add Conor Dooley as a DT binding maintainer

- Swap the order of parsing /memreserve/ and /reserved-memory nodes so
that the /reserved-memory nodes which have more information are
handled first

- Fix some property dependencies in riscv,pmu binding

- Update maintainers entries on a couple of bindings

* tag 'devicetree-fixes-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
MAINTAINERS: add Conor as a dt-bindings maintainer
dt-bindings: perf: riscv,pmu: fix property dependencies
dt-bindings: xilinx: Remove Naga from memory and mtd bindings
of: fdt: Scan /memreserve/ last
dt-bindings: clock: r9a06g032-sysctrl: Change maintainer to Fabrizio Castro
dt-bindings: pinctrl: renesas,rzv2m: Change maintainer to Fabrizio Castro
dt-bindings: pinctrl: renesas,rzn1: Change maintainer to Fabrizio Castro
dt-bindings: i2c: renesas,rzv2m: Change maintainer to Fabrizio Castro

Linus Torvalds 418d5c98 647681bf

+9 -10
+1 -1
Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml
··· 7 7 title: Renesas RZ/N1D (R9A06G032) System Controller 8 8 9 9 maintainers: 10 - - Gareth Williams <gareth.williams.jx@renesas.com> 10 + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 11 - Geert Uytterhoeven <geert+renesas@glider.be> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml
··· 7 7 title: Renesas RZ/V2M I2C Bus Interface 8 8 9 9 maintainers: 10 - - Phil Edworthy <phil.edworthy@renesas.com> 10 + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 11 12 12 allOf: 13 13 - $ref: /schemas/i2c/i2c-controller.yaml#
-1
Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml
··· 8 8 9 9 maintainers: 10 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 - - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> 12 11 13 12 description: | 14 13 The PL35x Static Memory Controller is a bus where you can connect two kinds
+1 -1
Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml
··· 10 10 - $ref: nand-controller.yaml 11 11 12 12 maintainers: 13 - - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> 13 + - Michal Simek <michal.simek@amd.com> 14 14 15 15 properties: 16 16 compatible:
-1
Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml
··· 11 11 12 12 maintainers: 13 13 - Miquel Raynal <miquel.raynal@bootlin.com> 14 - - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> 15 14 16 15 properties: 17 16 compatible:
-1
Documentation/devicetree/bindings/perf/riscv,pmu.yaml
··· 91 91 92 92 dependencies: 93 93 "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ] 94 - "riscv,event-to-mhpmcounters": [ "riscv,event-to-mhpmevent" ] 95 94 96 95 required: 97 96 - compatible
+1 -1
Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml
··· 7 7 title: Renesas RZ/N1 Pin Controller 8 8 9 9 maintainers: 10 - - Gareth Williams <gareth.williams.jx@renesas.com> 10 + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 11 - Geert Uytterhoeven <geert+renesas@glider.be> 12 12 13 13 properties:
+1 -1
Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml
··· 7 7 title: Renesas RZ/V2M combined Pin and GPIO controller 8 8 9 9 maintainers: 10 + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 10 11 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - - Phil Edworthy <phil.edworthy@renesas.com> 12 12 13 13 description: 14 14 The Renesas RZ/V2M SoC features a combined Pin and GPIO controller.
+1
MAINTAINERS
··· 15703 15703 OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS 15704 15704 M: Rob Herring <robh+dt@kernel.org> 15705 15705 M: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> 15706 + M: Conor Dooley <conor+dt@kernel.org> 15706 15707 L: devicetree@vger.kernel.org 15707 15708 S: Maintained 15708 15709 C: irc://irc.libera.chat/devicetree
+3 -2
drivers/of/fdt.c
··· 635 635 if (!initial_boot_params) 636 636 return; 637 637 638 + fdt_scan_reserved_mem(); 639 + fdt_reserve_elfcorehdr(); 640 + 638 641 /* Process header /memreserve/ fields */ 639 642 for (n = 0; ; n++) { 640 643 fdt_get_mem_rsv(initial_boot_params, n, &base, &size); ··· 646 643 memblock_reserve(base, size); 647 644 } 648 645 649 - fdt_scan_reserved_mem(); 650 - fdt_reserve_elfcorehdr(); 651 646 fdt_init_reserved_mem(); 652 647 } 653 648