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clk: qcom: apps-ipq-pll: drop 'alpha_en_mask' from IPQ5332 PLL config

Since neither 'alpha' nor 'alpha_hi' is defined in the configuration,
those will be initialized with zero values implicitly. By using zero
alpha values, the output rate of the PLL will be the same whether
alpha mode is enabled or not.

Remove the superfluous initialization of the 'alpha_en_mask' member
to make it clear that enabling alpha mode is not required to get the
desired output rate.

Despite that enabling alpha mode is not needed for the initial
configuration, the set_rate() op might require that it is enabled
already. In this particular case however, the
clk_alpha_pll_stromer_plus_set_rate() function will get reset the
ALPHA_EN bit when the PLL's rate changes, so dropping 'alpha_en_mask'
is safe.

While at it, also add a comment to indicate the frequency the PLL
runs at with the current configuration.

No functional changes, the initial rate of the PLL is the same both
before and after the patch.

Tested on Xiaomi Router BE3600 2.5G (IPQ5312, out-of-tree board).

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Link: https://lore.kernel.org/r/20241028-alpha-mode-cleanup-v2-2-9bc6d712bd76@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Gabor Juhos and committed by
Bjorn Andersson
41c5ebfb 3e632d9c

+1 -1
+1 -1
drivers/clk/qcom/apss-ipq-pll.c
··· 79 79 .test_ctl_hi_val = 0x00400003, 80 80 }; 81 81 82 + /* 1.080 GHz configuration */ 82 83 static const struct alpha_pll_config ipq5332_pll_config = { 83 84 .l = 0x2d, 84 85 .config_ctl_val = 0x4001075b, 85 86 .main_output_mask = BIT(0), 86 87 .aux_output_mask = BIT(1), 87 88 .early_output_mask = BIT(3), 88 - .alpha_en_mask = BIT(24), 89 89 .status_val = 0x3, 90 90 .status_mask = GENMASK(10, 8), 91 91 .lock_det = BIT(2),