Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Will Deacon:
"A few arm64 fixes came in this week, specifically fixing some nasty
truncation of return values from firmware calls and resolving a
VM_BUG_ON due to accessing uninitialised struct pages corresponding to
NOMAP pages.
Summary:
- Fix typos in SVE documentation
- Fix type-checking and implicit truncation for SMCCC calls
- Force CONFIG_HOLES_IN_ZONE=y so that SLAB doesn't fall over NOMAP
regions"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: mm: always enable CONFIG_HOLES_IN_ZONE
arm/arm64: smccc-1.1: Handle function result as parameters
arm/arm64: smccc-1.1: Make return values unsigned long
Documentation/arm64/sve: Couple of improvements and typos
+26
-17
+2
-2
Documentation/arm64/sve.txt
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-2
Documentation/arm64/sve.txt
···
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thread.
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* Changing the vector length causes all of P0..P15, FFR and all bits of
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-
Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
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+
Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
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unspecified. Calling PR_SVE_SET_VL with vl equal to the thread's current
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vector length, or calling PR_SVE_SET_VL with the PR_SVE_SET_VL_ONEXEC
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flag, does not constitute a change to the vector length for this purpose.
···
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[2] arch/arm64/include/uapi/asm/ptrace.h
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AArch64 Linux ptrace ABI definitions
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-
[3] linux/Documentation/arm64/cpu-feature-registers.txt
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[3] Documentation/arm64/cpu-feature-registers.txt
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[4] ARM IHI0055C
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http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf
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arch/arm64/Kconfig
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arch/arm64/Kconfig
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-14
include/linux/arm-smccc.h
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-14
include/linux/arm-smccc.h
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#define __declare_arg_0(a0, res) \
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struct arm_smccc_res *___res = res; \
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register u32 r0 asm("r0") = a0; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1"); \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3")
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#define __declare_arg_1(a0, a1, res) \
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typeof(a1) __a1 = a1; \
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struct arm_smccc_res *___res = res; \
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register u32 r0 asm("r0") = a0; \
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register typeof(a1) r1 asm("r1") = a1; \
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3")
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#define __declare_arg_2(a0, a1, a2, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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struct arm_smccc_res *___res = res; \
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register u32 r0 asm("r0") = a0; \
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register typeof(a1) r1 asm("r1") = a1; \
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register typeof(a2) r2 asm("r2") = a2; \
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+
register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2") = __a2; \
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register unsigned long r3 asm("r3")
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#define __declare_arg_3(a0, a1, a2, a3, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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typeof(a3) __a3 = a3; \
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struct arm_smccc_res *___res = res; \
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register u32 r0 asm("r0") = a0; \
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register typeof(a1) r1 asm("r1") = a1; \
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register typeof(a2) r2 asm("r2") = a2; \
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register typeof(a3) r3 asm("r3") = a3
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register unsigned long r0 asm("r0") = (u32)a0; \
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register unsigned long r1 asm("r1") = __a1; \
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register unsigned long r2 asm("r2") = __a2; \
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register unsigned long r3 asm("r3") = __a3
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#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
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typeof(a4) __a4 = a4; \
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__declare_arg_3(a0, a1, a2, a3, res); \
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register typeof(a4) r4 asm("r4") = a4
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register unsigned long r4 asm("r4") = __a4
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#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
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typeof(a5) __a5 = a5; \
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__declare_arg_4(a0, a1, a2, a3, a4, res); \
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register typeof(a5) r5 asm("r5") = a5
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register unsigned long r5 asm("r5") = __a5
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#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
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typeof(a6) __a6 = a6; \
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__declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
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register typeof(a6) r6 asm("r6") = a6
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register unsigned long r6 asm("r6") = __a6
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#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
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typeof(a7) __a7 = a7; \
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__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
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register typeof(a7) r7 asm("r7") = a7
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register unsigned long r7 asm("r7") = __a7
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#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
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#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)