Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge remote-tracking branch 'i3c/ib-i3c-iio-v6.20' into togreg
Needed for some stubs to prevent build issues if !CONFIG_I3C
+127
-23
+11
Documentation/ABI/testing/sysfs-bus-i3c
+11
Documentation/ABI/testing/sysfs-bus-i3c
···
161
161
Description:
162
162
These directories are just symbolic links to
163
163
/sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>.
164
+
165
+
What: /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>/dev_nack_retry_count
166
+
KernelVersion: 6.18
167
+
Contact: linux-i3c@vger.kernel.org
168
+
Description:
169
+
Expose the dev_nak_retry_count which controls the number of
170
+
automatic retries that will be performed by the controller when
171
+
the target device returns a NACK response. A value of 0 disables
172
+
the automatic retries. Exist only when I3C constroller supports
173
+
this retry on nack feature.
174
+
+41
-5
drivers/i3c/master.c
+41
-5
drivers/i3c/master.c
···
683
683
684
684
static DEVICE_ATTR_RW(hotjoin);
685
685
686
+
static ssize_t dev_nack_retry_count_show(struct device *dev,
687
+
struct device_attribute *attr, char *buf)
688
+
{
689
+
return sysfs_emit(buf, "%u\n", dev_to_i3cmaster(dev)->dev_nack_retry_count);
690
+
}
691
+
692
+
static ssize_t dev_nack_retry_count_store(struct device *dev,
693
+
struct device_attribute *attr,
694
+
const char *buf, size_t count)
695
+
{
696
+
struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
697
+
struct i3c_master_controller *master = dev_to_i3cmaster(dev);
698
+
unsigned long val;
699
+
int ret;
700
+
701
+
ret = kstrtoul(buf, 0, &val);
702
+
if (ret)
703
+
return ret;
704
+
705
+
i3c_bus_maintenance_lock(i3cbus);
706
+
ret = master->ops->set_dev_nack_retry(master, val);
707
+
i3c_bus_maintenance_unlock(i3cbus);
708
+
709
+
if (ret)
710
+
return ret;
711
+
712
+
master->dev_nack_retry_count = val;
713
+
714
+
return count;
715
+
}
716
+
717
+
static DEVICE_ATTR_RW(dev_nack_retry_count);
718
+
686
719
static struct attribute *i3c_masterdev_attrs[] = {
687
720
&dev_attr_mode.attr,
688
721
&dev_attr_current_master.attr,
···
2403
2370
{
2404
2371
struct device *dev = &master->dev;
2405
2372
struct device_node *i3cbus_np = dev->of_node;
2406
-
struct device_node *node;
2407
2373
int ret;
2408
2374
u32 val;
2409
2375
2410
2376
if (!i3cbus_np)
2411
2377
return 0;
2412
2378
2413
-
for_each_available_child_of_node(i3cbus_np, node) {
2379
+
for_each_available_child_of_node_scoped(i3cbus_np, node) {
2414
2380
ret = of_i3c_master_add_dev(master, node);
2415
-
if (ret) {
2416
-
of_node_put(node);
2381
+
if (ret)
2417
2382
return ret;
2418
-
}
2419
2383
}
2420
2384
2421
2385
/*
···
2989
2959
i3c_master_register_new_i3c_devs(master);
2990
2960
i3c_bus_normaluse_unlock(&master->bus);
2991
2961
2962
+
if (master->ops->set_dev_nack_retry)
2963
+
device_create_file(&master->dev, &dev_attr_dev_nack_retry_count);
2964
+
2992
2965
return 0;
2993
2966
2994
2967
err_del_dev:
···
3016
2983
void i3c_master_unregister(struct i3c_master_controller *master)
3017
2984
{
3018
2985
i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2986
+
2987
+
if (master->ops->set_dev_nack_retry)
2988
+
device_remove_file(&master->dev, &dev_attr_dev_nack_retry_count);
3019
2989
3020
2990
i3c_master_i2c_adapter_cleanup(master);
3021
2991
i3c_master_unregister_i3c_devs(master);
+53
-6
drivers/i3c/master/dw-i3c-master.c
+53
-6
drivers/i3c/master/dw-i3c-master.c
···
5
5
* Author: Vitor Soares <vitor.soares@synopsys.com>
6
6
*/
7
7
8
+
#include <linux/bitfield.h>
8
9
#include <linux/bitops.h>
9
10
#include <linux/clk.h>
10
11
#include <linux/completion.h>
···
205
204
#define EXTENDED_CAPABILITY 0xe8
206
205
#define SLAVE_CONFIG 0xec
207
206
207
+
#define DW_I3C_DEV_NACK_RETRY_CNT_MAX 0x3
208
+
#define DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK GENMASK(30, 29)
209
+
#define DEV_ADDR_TABLE_DYNAMIC_MASK GENMASK(23, 16)
210
+
#define DEV_ADDR_TABLE_STATIC_MASK GENMASK(6, 0)
208
211
#define DEV_ADDR_TABLE_IBI_MDB BIT(12)
209
212
#define DEV_ADDR_TABLE_SIR_REJECT BIT(13)
213
+
#define DEV_ADDR_TABLE_DEV_NACK_RETRY_CNT(x) \
214
+
FIELD_PREP(DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK, (x))
210
215
#define DEV_ADDR_TABLE_LEGACY_I2C_DEV BIT(31)
211
-
#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) (((x) << 16) & GENMASK(23, 16))
212
-
#define DEV_ADDR_TABLE_STATIC_ADDR(x) ((x) & GENMASK(6, 0))
216
+
#define DEV_ADDR_TABLE_DYNAMIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_DYNAMIC_MASK, x)
217
+
#define DEV_ADDR_TABLE_STATIC_ADDR(x) FIELD_PREP(DEV_ADDR_TABLE_STATIC_MASK, x)
213
218
#define DEV_ADDR_TABLE_LOC(start, idx) ((start) + ((idx) << 2))
214
219
215
220
#define I3C_BUS_SDR1_SCL_RATE 8000000
···
1496
1489
return IRQ_HANDLED;
1497
1490
}
1498
1491
1492
+
static int dw_i3c_master_set_dev_nack_retry(struct i3c_master_controller *m,
1493
+
unsigned long dev_nack_retry_cnt)
1494
+
{
1495
+
struct dw_i3c_master *master = to_dw_i3c_master(m);
1496
+
u32 reg;
1497
+
int i;
1498
+
1499
+
if (dev_nack_retry_cnt > DW_I3C_DEV_NACK_RETRY_CNT_MAX) {
1500
+
dev_err(&master->base.dev,
1501
+
"Value %ld exceeds maximum %d\n",
1502
+
dev_nack_retry_cnt, DW_I3C_DEV_NACK_RETRY_CNT_MAX);
1503
+
return -ERANGE;
1504
+
}
1505
+
1506
+
/*
1507
+
* Update DAT entries for all currently attached devices.
1508
+
* We directly iterate through the master's device array.
1509
+
*/
1510
+
for (i = 0; i < master->maxdevs; i++) {
1511
+
/* Skip free/empty slots */
1512
+
if (master->free_pos & BIT(i))
1513
+
continue;
1514
+
1515
+
reg = readl(master->regs +
1516
+
DEV_ADDR_TABLE_LOC(master->datstartaddr, i));
1517
+
reg &= ~DEV_ADDR_TABLE_DEV_NACK_RETRY_MASK;
1518
+
reg |= DEV_ADDR_TABLE_DEV_NACK_RETRY_CNT(dev_nack_retry_cnt);
1519
+
writel(reg, master->regs +
1520
+
DEV_ADDR_TABLE_LOC(master->datstartaddr, i));
1521
+
}
1522
+
1523
+
return 0;
1524
+
}
1525
+
1499
1526
static const struct i3c_master_controller_ops dw_mipi_i3c_ops = {
1500
1527
.bus_init = dw_i3c_master_bus_init,
1501
1528
.bus_cleanup = dw_i3c_master_bus_cleanup,
···
1550
1509
.recycle_ibi_slot = dw_i3c_master_recycle_ibi_slot,
1551
1510
.enable_hotjoin = dw_i3c_master_enable_hotjoin,
1552
1511
.disable_hotjoin = dw_i3c_master_disable_hotjoin,
1512
+
.set_dev_nack_retry = dw_i3c_master_set_dev_nack_retry,
1553
1513
};
1554
1514
1555
1515
/* default platform ops implementations */
···
1718
1676
if (master->free_pos & BIT(pos))
1719
1677
continue;
1720
1678
1721
-
if (master->devs[pos].is_i2c_addr)
1722
-
reg_val = DEV_ADDR_TABLE_LEGACY_I2C_DEV |
1679
+
reg_val = readl(master->regs + DEV_ADDR_TABLE_LOC(master->datstartaddr, pos));
1680
+
1681
+
if (master->devs[pos].is_i2c_addr) {
1682
+
reg_val &= ~DEV_ADDR_TABLE_STATIC_MASK;
1683
+
reg_val |= DEV_ADDR_TABLE_LEGACY_I2C_DEV |
1723
1684
DEV_ADDR_TABLE_STATIC_ADDR(master->devs[pos].addr);
1724
-
else
1725
-
reg_val = DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr);
1685
+
} else {
1686
+
reg_val &= ~DEV_ADDR_TABLE_DYNAMIC_MASK;
1687
+
reg_val |= DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr);
1688
+
}
1726
1689
1727
1690
writel(reg_val, master->regs + DEV_ADDR_TABLE_LOC(master->datstartaddr, pos));
1728
1691
}
+2
-2
drivers/i3c/master/svc-i3c-master.c
+2
-2
drivers/i3c/master/svc-i3c-master.c
···
533
533
static void svc_i3c_master_ibi_isr(struct svc_i3c_master *master)
534
534
{
535
535
struct svc_i3c_i2c_dev_data *data;
536
+
struct i3c_dev_desc *dev = NULL;
536
537
unsigned int ibitype, ibiaddr;
537
-
struct i3c_dev_desc *dev;
538
538
u32 status, val;
539
539
int ret;
540
540
···
627
627
* for the slave to interrupt again.
628
628
*/
629
629
if (svc_i3c_master_error(master)) {
630
-
if (master->ibi.tbq_slot) {
630
+
if (master->ibi.tbq_slot && dev) {
631
631
data = i3c_dev_get_master_data(dev);
632
632
i3c_generic_ibi_recycle_slot(data->ibi_pool,
633
633
master->ibi.tbq_slot);
+14
-10
include/linux/i3c/device.h
+14
-10
include/linux/i3c/device.h
···
25
25
* @I3C_ERROR_M2: M2 error
26
26
*
27
27
* These are the standard error codes as defined by the I3C specification.
28
-
* When -EIO is returned by the i3c_device_do_priv_xfers() or
28
+
* When -EIO is returned by the i3c_device_do_i3c_xfers() or
29
29
* i3c_device_send_hdr_cmds() one can check the error code in
30
30
* &struct_i3c_xfer.err or &struct i3c_hdr_cmd.err to get a better idea of
31
31
* what went wrong.
···
78
78
} data;
79
79
enum i3c_error_code err;
80
80
};
81
-
82
-
/* keep back compatible */
83
-
#define i3c_priv_xfer i3c_xfer
84
81
85
82
/**
86
83
* enum i3c_dcr - I3C DCR values
···
305
308
i3c_i2c_driver_unregister, \
306
309
__i2cdrv)
307
310
311
+
#if IS_ENABLED(CONFIG_I3C)
308
312
int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
309
313
int nxfers, enum i3c_xfer_mode mode);
310
-
311
-
static inline int i3c_device_do_priv_xfers(struct i3c_device *dev,
312
-
struct i3c_xfer *xfers,
313
-
int nxfers)
314
+
u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev);
315
+
#else
316
+
static inline int
317
+
i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers,
318
+
int nxfers, enum i3c_xfer_mode mode)
314
319
{
315
-
return i3c_device_do_xfers(dev, xfers, nxfers, I3C_SDR);
320
+
return -EOPNOTSUPP;
316
321
}
322
+
323
+
static inline u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev)
324
+
{
325
+
return 0;
326
+
}
327
+
#endif
317
328
318
329
int i3c_device_do_setdasa(struct i3c_device *dev);
319
330
···
363
358
void i3c_device_free_ibi(struct i3c_device *dev);
364
359
int i3c_device_enable_ibi(struct i3c_device *dev);
365
360
int i3c_device_disable_ibi(struct i3c_device *dev);
366
-
u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev);
367
361
368
362
#endif /* I3C_DEV_H */
+6
include/linux/i3c/master.h
+6
include/linux/i3c/master.h
···
462
462
* @enable_hotjoin: enable hot join event detect.
463
463
* @disable_hotjoin: disable hot join event detect.
464
464
* @set_speed: adjust I3C open drain mode timing.
465
+
* @set_dev_nack_retry: configure device NACK retry count for the master
466
+
* controller.
465
467
*/
466
468
struct i3c_master_controller_ops {
467
469
int (*bus_init)(struct i3c_master_controller *master);
···
493
491
int (*enable_hotjoin)(struct i3c_master_controller *master);
494
492
int (*disable_hotjoin)(struct i3c_master_controller *master);
495
493
int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed);
494
+
int (*set_dev_nack_retry)(struct i3c_master_controller *master,
495
+
unsigned long dev_nack_retry_cnt);
496
496
};
497
497
498
498
/**
···
518
514
* in a thread context. Typical examples are Hot Join processing which
519
515
* requires taking the bus lock in maintenance, which in turn, can only
520
516
* be done from a sleep-able context
517
+
* @dev_nack_retry_count: retry count when slave device nack
521
518
*
522
519
* A &struct i3c_master_controller has to be registered to the I3C subsystem
523
520
* through i3c_master_register(). None of &struct i3c_master_controller fields
···
539
534
} boardinfo;
540
535
struct i3c_bus bus;
541
536
struct workqueue_struct *wq;
537
+
unsigned int dev_nack_retry_count;
542
538
};
543
539
544
540
/**