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ASoC: codecs: wcd939x: Unify define used for MIC bias registers

All four microphone bias registers have similar layout: enable mask is
exactly the same. Use one define, just like older driver wcd938x is
doing, to make the code a bit simpler.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240523104228.36263-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Krzysztof Kozlowski and committed by
Mark Brown 42cef39b 40b2ffaf

+18 -23
+17 -19
sound/soc/codecs/wcd939x.c
··· 1268 1268 { 1269 1269 struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component); 1270 1270 int micb_index = micb_num - 1; 1271 - u16 micb_field; 1272 1271 u16 micb_reg; 1273 1272 1274 1273 switch (micb_num) { 1275 1274 case MIC_BIAS_1: 1276 1275 micb_reg = WCD939X_ANA_MICB1; 1277 - micb_field = WCD939X_MICB1_ENABLE; 1278 1276 break; 1279 1277 case MIC_BIAS_2: 1280 1278 micb_reg = WCD939X_ANA_MICB2; 1281 - micb_field = WCD939X_MICB2_ENABLE; 1282 1279 break; 1283 1280 case MIC_BIAS_3: 1284 1281 micb_reg = WCD939X_ANA_MICB3; 1285 - micb_field = WCD939X_MICB3_ENABLE; 1286 1282 break; 1287 1283 case MIC_BIAS_4: 1288 1284 micb_reg = WCD939X_ANA_MICB4; 1289 - micb_field = WCD939X_MICB4_ENABLE; 1290 1285 break; 1291 1286 default: 1292 1287 dev_err(component->dev, "%s: Invalid micbias number: %d\n", ··· 1295 1300 if (wcd939x->pullup_ref[micb_index] == 1 && 1296 1301 wcd939x->micb_ref[micb_index] == 0) 1297 1302 snd_soc_component_write_field(component, micb_reg, 1298 - micb_field, MICB_BIAS_PULL_UP); 1303 + WCD939X_MICB_ENABLE, 1304 + MICB_BIAS_PULL_UP); 1299 1305 break; 1300 1306 case MICB_PULLUP_DISABLE: 1301 1307 if (wcd939x->pullup_ref[micb_index] > 0) ··· 1304 1308 if (wcd939x->pullup_ref[micb_index] == 0 && 1305 1309 wcd939x->micb_ref[micb_index] == 0) 1306 1310 snd_soc_component_write_field(component, micb_reg, 1307 - micb_field, MICB_BIAS_DISABLE); 1311 + WCD939X_MICB_ENABLE, 1312 + MICB_BIAS_DISABLE); 1308 1313 break; 1309 1314 case MICB_ENABLE: 1310 1315 wcd939x->micb_ref[micb_index]++; ··· 1342 1345 snd_soc_component_write_field(component, 1343 1346 WCD939X_MICB4_TEST_CTL_2, 1344 1347 WCD939X_TEST_CTL_2_IBIAS_LDO_DRIVER, true); 1345 - snd_soc_component_write_field(component, micb_reg, micb_field, 1348 + snd_soc_component_write_field(component, micb_reg, 1349 + WCD939X_MICB_ENABLE, 1346 1350 MICB_BIAS_ENABLE); 1347 1351 if (micb_num == MIC_BIAS_2) 1348 1352 wcd_mbhc_event_notify(wcd939x->wcd_mbhc, ··· 1360 1362 if (wcd939x->micb_ref[micb_index] == 0 && 1361 1363 wcd939x->pullup_ref[micb_index] > 0) 1362 1364 snd_soc_component_write_field(component, micb_reg, 1363 - micb_field, MICB_BIAS_PULL_UP); 1365 + WCD939X_MICB_ENABLE, 1366 + MICB_BIAS_PULL_UP); 1364 1367 else if (wcd939x->micb_ref[micb_index] == 0 && 1365 1368 wcd939x->pullup_ref[micb_index] == 0) { 1366 1369 if (micb_num == MIC_BIAS_2) ··· 1369 1370 WCD_EVENT_PRE_MICBIAS_2_OFF); 1370 1371 1371 1372 snd_soc_component_write_field(component, micb_reg, 1372 - micb_field, MICB_BIAS_DISABLE); 1373 + WCD939X_MICB_ENABLE, 1374 + MICB_BIAS_DISABLE); 1373 1375 if (micb_num == MIC_BIAS_2) 1374 1376 wcd_mbhc_event_notify(wcd939x->wcd_mbhc, 1375 1377 WCD_EVENT_POST_MICBIAS_2_OFF); ··· 1873 1873 if (micb_num == MIC_BIAS_2) { 1874 1874 u8 val; 1875 1875 1876 - val = FIELD_GET(WCD939X_MICB2_ENABLE, 1876 + val = FIELD_GET(WCD939X_MICB_ENABLE, 1877 1877 snd_soc_component_read(component, WCD939X_ANA_MICB2)); 1878 1878 if (val == MICB_BIAS_ENABLE) 1879 1879 return true; ··· 1935 1935 int req_volt, int micb_num) 1936 1936 { 1937 1937 struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component); 1938 - unsigned int micb_en_field, micb_vout_ctl_field; 1938 + unsigned int micb_vout_ctl_field; 1939 1939 unsigned int micb_reg, cur_vout_ctl, micb_en; 1940 1940 int req_vout_ctl; 1941 1941 int ret = 0; ··· 1943 1943 switch (micb_num) { 1944 1944 case MIC_BIAS_1: 1945 1945 micb_reg = WCD939X_ANA_MICB1; 1946 - micb_en_field = WCD939X_MICB1_ENABLE; 1947 1946 micb_vout_ctl_field = WCD939X_MICB1_VOUT_CTL; 1948 1947 break; 1949 1948 case MIC_BIAS_2: 1950 1949 micb_reg = WCD939X_ANA_MICB2; 1951 - micb_en_field = WCD939X_MICB2_ENABLE; 1952 1950 micb_vout_ctl_field = WCD939X_MICB2_VOUT_CTL; 1953 1951 break; 1954 1952 case MIC_BIAS_3: 1955 1953 micb_reg = WCD939X_ANA_MICB3; 1956 - micb_en_field = WCD939X_MICB3_ENABLE; 1957 1954 micb_vout_ctl_field = WCD939X_MICB1_VOUT_CTL; 1958 1955 break; 1959 1956 case MIC_BIAS_4: 1960 1957 micb_reg = WCD939X_ANA_MICB4; 1961 - micb_en_field = WCD939X_MICB4_ENABLE; 1962 1958 micb_vout_ctl_field = WCD939X_MICB2_VOUT_CTL; 1963 1959 break; 1964 1960 default: ··· 1971 1975 * micbias. 1972 1976 */ 1973 1977 micb_en = snd_soc_component_read_field(component, micb_reg, 1974 - micb_en_field); 1978 + WCD939X_MICB_ENABLE); 1975 1979 cur_vout_ctl = snd_soc_component_read_field(component, micb_reg, 1976 1980 micb_vout_ctl_field); 1977 1981 ··· 1992 1996 1993 1997 if (micb_en == MICB_BIAS_ENABLE) 1994 1998 snd_soc_component_write_field(component, micb_reg, 1995 - micb_en_field, MICB_BIAS_PULL_DOWN); 1999 + WCD939X_MICB_ENABLE, 2000 + MICB_BIAS_PULL_DOWN); 1996 2001 1997 2002 snd_soc_component_write_field(component, micb_reg, 1998 2003 micb_vout_ctl_field, req_vout_ctl); 1999 2004 2000 2005 if (micb_en == MICB_BIAS_ENABLE) { 2001 2006 snd_soc_component_write_field(component, micb_reg, 2002 - micb_en_field, MICB_BIAS_ENABLE); 2007 + WCD939X_MICB_ENABLE, 2008 + MICB_BIAS_ENABLE); 2003 2009 /* 2004 2010 * Add 2ms delay as per HW requirement after enabling 2005 2011 * micbias
+1 -4
sound/soc/codecs/wcd939x.h
··· 91 91 #define WCD939X_ANA_MBHC_BTN7 (0x3021) 92 92 #define WCD939X_MBHC_BTN7_VTH GENMASK(7, 2) 93 93 #define WCD939X_ANA_MICB1 (0x3022) 94 - #define WCD939X_MICB1_ENABLE GENMASK(7, 6) 94 + #define WCD939X_MICB_ENABLE GENMASK(7, 6) 95 95 #define WCD939X_MICB1_VOUT_CTL GENMASK(5, 0) 96 96 #define WCD939X_ANA_MICB2 (0x3023) 97 - #define WCD939X_MICB2_ENABLE GENMASK(7, 6) 98 97 #define WCD939X_MICB2_VOUT_CTL GENMASK(5, 0) 99 98 #define WCD939X_ANA_MICB2_RAMP (0x3024) 100 99 #define WCD939X_MICB2_RAMP_RAMP_ENABLE BIT(7) ··· 102 103 #define WCD939X_MICB2_RAMP_SHIFT_CTL GENMASK(4, 2) 103 104 #define WCD939X_MICB2_RAMP_USB_MGDET_MICB2_RAMP GENMASK(1, 0) 104 105 #define WCD939X_ANA_MICB3 (0x3025) 105 - #define WCD939X_MICB3_ENABLE GENMASK(7, 6) 106 106 #define WCD939X_MICB3_VOUT_CTL GENMASK(5, 0) 107 107 #define WCD939X_ANA_MICB4 (0x3026) 108 - #define WCD939X_MICB4_ENABLE GENMASK(7, 6) 109 108 #define WCD939X_MICB4_VOUT_CTL GENMASK(5, 0) 110 109 #define WCD939X_BIAS_CTL (0x3028) 111 110 #define WCD939X_BIAS_VBG_FINE_ADJ (0x3029)