Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
crypto: starfive - Add crypto engine support
Adding device probe and DMA init for StarFive cryptographic module.
Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
authored by
Jia Jie Ho
and committed by
Herbert Xu
42ef0e94
4b66c6aa
+294
+7
MAINTAINERS
+7
MAINTAINERS
···
20095
20095
F: drivers/clk/starfive/clk-starfive-jh71*
20096
20096
F: include/dt-bindings/clock/starfive?jh71*.h
20097
20097
20098
+
STARFIVE CRYPTO DRIVER
20099
+
M: Jia Jie Ho <jiajie.ho@starfivetech.com>
20100
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M: William Qiu <william.qiu@starfivetech.com>
20101
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S: Supported
20102
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F: Documentation/devicetree/bindings/crypto/starfive*
20103
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F: drivers/crypto/starfive/
20104
+
20098
20105
STARFIVE JH71X0 PINCTRL DRIVERS
20099
20106
M: Emil Renner Berthing <kernel@esmil.dk>
20100
20107
M: Jianlong Huang <jianlong.huang@starfivetech.com>
+1
drivers/crypto/Kconfig
+1
drivers/crypto/Kconfig
+1
drivers/crypto/Makefile
+1
drivers/crypto/Makefile
+17
drivers/crypto/starfive/Kconfig
+17
drivers/crypto/starfive/Kconfig
···
1
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#
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# StarFive crypto drivers configuration
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#
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+
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config CRYPTO_DEV_JH7110
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tristate "StarFive JH7110 cryptographic engine driver"
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depends on SOC_STARFIVE || COMPILE_TEST
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select CRYPTO_ENGINE
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select ARM_AMBA
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select DMADEVICES
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select AMBA_PL08X
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help
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Support for StarFive JH7110 crypto hardware acceleration engine.
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This module provides acceleration for public key algo,
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skciphers, AEAD and hash functions.
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+
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If you choose 'M' here, this module will be called jh7110-crypto.
+4
drivers/crypto/starfive/Makefile
+4
drivers/crypto/starfive/Makefile
+201
drivers/crypto/starfive/jh7110-cryp.c
+201
drivers/crypto/starfive/jh7110-cryp.c
···
1
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Cryptographic API.
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*
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* Support for StarFive hardware cryptographic engine.
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* Copyright (c) 2022 StarFive Technology
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*
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*/
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+
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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+
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#include "jh7110-cryp.h"
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+
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#define DRIVER_NAME "jh7110-crypto"
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+
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struct starfive_dev_list {
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struct list_head dev_list;
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spinlock_t lock; /* protect dev_list */
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};
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+
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static struct starfive_dev_list dev_list = {
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.dev_list = LIST_HEAD_INIT(dev_list.dev_list),
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.lock = __SPIN_LOCK_UNLOCKED(dev_list.lock),
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};
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+
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struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx)
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{
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struct starfive_cryp_dev *cryp = NULL, *tmp;
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+
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spin_lock_bh(&dev_list.lock);
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if (!ctx->cryp) {
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list_for_each_entry(tmp, &dev_list.dev_list, list) {
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cryp = tmp;
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break;
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}
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ctx->cryp = cryp;
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} else {
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cryp = ctx->cryp;
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}
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+
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spin_unlock_bh(&dev_list.lock);
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+
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return cryp;
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}
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+
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static int starfive_dma_init(struct starfive_cryp_dev *cryp)
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{
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dma_cap_mask_t mask;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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+
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cryp->tx = dma_request_chan(cryp->dev, "tx");
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if (IS_ERR(cryp->tx))
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return dev_err_probe(cryp->dev, PTR_ERR(cryp->tx),
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"Error requesting tx dma channel.\n");
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+
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cryp->rx = dma_request_chan(cryp->dev, "rx");
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if (IS_ERR(cryp->rx)) {
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dma_release_channel(cryp->tx);
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return dev_err_probe(cryp->dev, PTR_ERR(cryp->rx),
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"Error requesting rx dma channel.\n");
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}
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return 0;
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}
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+
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static void starfive_dma_cleanup(struct starfive_cryp_dev *cryp)
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{
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dma_release_channel(cryp->tx);
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dma_release_channel(cryp->rx);
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}
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static int starfive_cryp_probe(struct platform_device *pdev)
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{
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struct starfive_cryp_dev *cryp;
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struct resource *res;
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int ret;
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cryp = devm_kzalloc(&pdev->dev, sizeof(*cryp), GFP_KERNEL);
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if (!cryp)
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return -ENOMEM;
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platform_set_drvdata(pdev, cryp);
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cryp->dev = &pdev->dev;
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+
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cryp->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(cryp->base))
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return dev_err_probe(&pdev->dev, PTR_ERR(cryp->base),
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"Error remapping memory for platform device\n");
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cryp->phys_base = res->start;
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cryp->dma_maxburst = 32;
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cryp->hclk = devm_clk_get(&pdev->dev, "hclk");
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if (IS_ERR(cryp->hclk))
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return dev_err_probe(&pdev->dev, PTR_ERR(cryp->hclk),
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"Error getting hardware reference clock\n");
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cryp->ahb = devm_clk_get(&pdev->dev, "ahb");
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if (IS_ERR(cryp->ahb))
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return dev_err_probe(&pdev->dev, PTR_ERR(cryp->ahb),
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"Error getting ahb reference clock\n");
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cryp->rst = devm_reset_control_get_shared(cryp->dev, NULL);
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if (IS_ERR(cryp->rst))
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return dev_err_probe(&pdev->dev, PTR_ERR(cryp->rst),
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"Error getting hardware reset line\n");
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clk_prepare_enable(cryp->hclk);
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clk_prepare_enable(cryp->ahb);
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reset_control_deassert(cryp->rst);
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spin_lock(&dev_list.lock);
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list_add(&cryp->list, &dev_list.dev_list);
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spin_unlock(&dev_list.lock);
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ret = starfive_dma_init(cryp);
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if (ret) {
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if (ret == -EPROBE_DEFER)
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goto err_probe_defer;
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else
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goto err_dma_init;
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}
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/* Initialize crypto engine */
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cryp->engine = crypto_engine_alloc_init(&pdev->dev, 1);
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if (!cryp->engine) {
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ret = -ENOMEM;
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goto err_engine;
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}
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ret = crypto_engine_start(cryp->engine);
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if (ret)
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goto err_engine_start;
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return 0;
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err_engine_start:
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crypto_engine_exit(cryp->engine);
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err_engine:
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starfive_dma_cleanup(cryp);
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err_dma_init:
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spin_lock(&dev_list.lock);
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list_del(&cryp->list);
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spin_unlock(&dev_list.lock);
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clk_disable_unprepare(cryp->hclk);
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clk_disable_unprepare(cryp->ahb);
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reset_control_assert(cryp->rst);
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err_probe_defer:
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return ret;
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}
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static int starfive_cryp_remove(struct platform_device *pdev)
164
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{
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struct starfive_cryp_dev *cryp = platform_get_drvdata(pdev);
166
+
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crypto_engine_stop(cryp->engine);
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crypto_engine_exit(cryp->engine);
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starfive_dma_cleanup(cryp);
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spin_lock(&dev_list.lock);
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list_del(&cryp->list);
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spin_unlock(&dev_list.lock);
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clk_disable_unprepare(cryp->hclk);
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clk_disable_unprepare(cryp->ahb);
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reset_control_assert(cryp->rst);
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return 0;
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}
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static const struct of_device_id starfive_dt_ids[] __maybe_unused = {
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{ .compatible = "starfive,jh7110-crypto", .data = NULL},
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{},
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};
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MODULE_DEVICE_TABLE(of, starfive_dt_ids);
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+
189
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static struct platform_driver starfive_cryp_driver = {
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.probe = starfive_cryp_probe,
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.remove = starfive_cryp_remove,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = starfive_dt_ids,
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},
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};
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module_platform_driver(starfive_cryp_driver);
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MODULE_LICENSE("GPL");
201
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MODULE_DESCRIPTION("StarFive JH7110 Cryptographic Module");
+63
drivers/crypto/starfive/jh7110-cryp.h
+63
drivers/crypto/starfive/jh7110-cryp.h
···
1
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __STARFIVE_STR_H__
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#define __STARFIVE_STR_H__
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5
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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+
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#include <crypto/engine.h>
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+
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#define STARFIVE_ALG_CR_OFFSET 0x0
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#define STARFIVE_ALG_FIFO_OFFSET 0x4
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#define STARFIVE_IE_MASK_OFFSET 0x8
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#define STARFIVE_IE_FLAG_OFFSET 0xc
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#define STARFIVE_DMA_IN_LEN_OFFSET 0x10
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#define STARFIVE_DMA_OUT_LEN_OFFSET 0x14
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+
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#define STARFIVE_MSG_BUFFER_SIZE SZ_16K
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+
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union starfive_alg_cr {
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u32 v;
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struct {
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u32 start :1;
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u32 aes_dma_en :1;
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u32 rsvd_0 :1;
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u32 hash_dma_en :1;
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u32 alg_done :1;
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u32 rsvd_1 :3;
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u32 clear :1;
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u32 rsvd_2 :23;
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};
32
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};
33
+
34
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struct starfive_cryp_ctx {
35
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struct crypto_engine_ctx enginectx;
36
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struct starfive_cryp_dev *cryp;
37
+
};
38
+
39
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struct starfive_cryp_dev {
40
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struct list_head list;
41
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struct device *dev;
42
+
43
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struct clk *hclk;
44
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struct clk *ahb;
45
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struct reset_control *rst;
46
+
47
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void __iomem *base;
48
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phys_addr_t phys_base;
49
+
50
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u32 dma_maxburst;
51
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struct dma_chan *tx;
52
+
struct dma_chan *rx;
53
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struct dma_slave_config cfg_in;
54
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struct dma_slave_config cfg_out;
55
+
56
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struct crypto_engine *engine;
57
+
58
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union starfive_alg_cr alg_cr;
59
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};
60
+
61
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struct starfive_cryp_dev *starfive_cryp_find_dev(struct starfive_cryp_ctx *ctx);
62
+
63
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#endif