net/mlx5: Fix build -Wframe-larger-than warnings

When building, the following warnings will appear.
"
pci_irq.c: In function ‘mlx5_ctrl_irq_request’:
pci_irq.c:494:1: warning: the frame size of 1040 bytes is larger than 1024 bytes [-Wframe-larger-than=]

pci_irq.c: In function ‘mlx5_irq_request_vector’:
pci_irq.c:561:1: warning: the frame size of 1040 bytes is larger than 1024 bytes [-Wframe-larger-than=]

eq.c: In function ‘comp_irq_request_sf’:
eq.c:897:1: warning: the frame size of 1080 bytes is larger than 1024 bytes [-Wframe-larger-than=]

irq_affinity.c: In function ‘irq_pool_request_irq’:
irq_affinity.c:74:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=]
"

These warnings indicate that the stack frame size exceeds 1024 bytes in
these functions.

To resolve this, instead of allocating large memory buffers on the stack,
it is better to use kvzalloc to allocate memory dynamically on the heap.
This approach reduces stack usage and eliminates these frame size warnings.

Acked-by: Junxian Huang <huangjunxian6@hisilicon.com>
Signed-off-by: Zhu Yanjun <yanjun.zhu@linux.dev>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250722212023.244296-1-yanjun.zhu@linux.dev
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Zhu Yanjun and committed by

Jakub Kicinski 10 months ago 43350127 89628a0e

+58 -23

3 changed files

expand all

drivers

net

ethernet

mellanox

mlx5

core

eq.c

irq_affinity.c

pci_irq.c

+15 -7

drivers/net/ethernet/mellanox/mlx5/core/eq.c

··· 876 876 { 877 877 struct mlx5_irq_pool *pool = mlx5_irq_table_get_comp_irq_pool(dev); 878 878 struct mlx5_eq_table *table = dev->priv.eq_table; 879 - struct irq_affinity_desc af_desc = {}; 879 + struct irq_affinity_desc *af_desc; 880 880 struct mlx5_irq *irq; 881 881 882 - /* In case SF irq pool does not exist, fallback to the PF irqs*/ 882 + /* In case SF irq pool does not exist, fallback to the PF irqs */ 883 883 if (!mlx5_irq_pool_is_sf_pool(pool)) 884 884 return comp_irq_request_pci(dev, vecidx); 885 885 886 - af_desc.is_managed = false; 887 - cpumask_copy(&af_desc.mask, cpu_online_mask); 888 - cpumask_andnot(&af_desc.mask, &af_desc.mask, &table->used_cpus); 889 - irq = mlx5_irq_affinity_request(dev, pool, &af_desc); 890 - if (IS_ERR(irq)) 886 + af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL); 887 + if (!af_desc) 888 + return -ENOMEM; 889 + 890 + af_desc->is_managed = false; 891 + cpumask_copy(&af_desc->mask, cpu_online_mask); 892 + cpumask_andnot(&af_desc->mask, &af_desc->mask, &table->used_cpus); 893 + irq = mlx5_irq_affinity_request(dev, pool, af_desc); 894 + if (IS_ERR(irq)) { 895 + kvfree(af_desc); 891 896 return PTR_ERR(irq); 897 + } 892 898 893 899 cpumask_or(&table->used_cpus, &table->used_cpus, mlx5_irq_get_affinity_mask(irq)); 894 900 mlx5_core_dbg(pool->dev, "IRQ %u mapped to cpu %*pbl, %u EQs on this irq\n", 895 901 pci_irq_vector(dev->pdev, mlx5_irq_get_index(irq)), 896 902 cpumask_pr_args(mlx5_irq_get_affinity_mask(irq)), 897 903 mlx5_irq_read_locked(irq) / MLX5_EQ_REFS_PER_IRQ); 904 + 905 + kvfree(af_desc); 898 906 899 907 return xa_err(xa_store(&table->comp_irqs, vecidx, irq, GFP_KERNEL)); 900 908 }

+15 -4

drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c

··· 47 47 static struct mlx5_irq * 48 48 irq_pool_request_irq(struct mlx5_irq_pool *pool, struct irq_affinity_desc *af_desc) 49 49 { 50 - struct irq_affinity_desc auto_desc = {}; 50 + struct irq_affinity_desc *auto_desc; 51 51 struct mlx5_irq *irq; 52 52 u32 irq_index; 53 53 int err; 54 54 55 + auto_desc = kvzalloc(sizeof(*auto_desc), GFP_KERNEL); 56 + if (!auto_desc) 57 + return ERR_PTR(-ENOMEM); 58 + 55 59 err = xa_alloc(&pool->irqs, &irq_index, NULL, pool->xa_num_irqs, GFP_KERNEL); 56 - if (err) 60 + if (err) { 61 + kvfree(auto_desc); 57 62 return ERR_PTR(err); 63 + } 64 + 58 65 if (pool->irqs_per_cpu) { 59 66 if (cpumask_weight(&af_desc->mask) > 1) 60 67 /* if req_mask contain more then one CPU, set the least loadad CPU 61 68 * of req_mask 62 69 */ 63 70 cpumask_set_cpu(cpu_get_least_loaded(pool, &af_desc->mask), 64 - &auto_desc.mask); 71 + &auto_desc->mask); 65 72 else 66 73 cpu_get(pool, cpumask_first(&af_desc->mask)); 67 74 } 75 + 68 76 irq = mlx5_irq_alloc(pool, irq_index, 69 - cpumask_empty(&auto_desc.mask) ? af_desc : &auto_desc, 77 + cpumask_empty(&auto_desc->mask) ? af_desc : auto_desc, 70 78 NULL); 71 79 if (IS_ERR(irq)) 72 80 xa_erase(&pool->irqs, irq_index); 81 + 82 + kvfree(auto_desc); 83 + 73 84 return irq; 74 85 } 75 86

+28 -12

drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c

··· 470 470 struct mlx5_irq *mlx5_ctrl_irq_request(struct mlx5_core_dev *dev) 471 471 { 472 472 struct mlx5_irq_pool *pool = ctrl_irq_pool_get(dev); 473 - struct irq_affinity_desc af_desc; 473 + struct irq_affinity_desc *af_desc; 474 474 struct mlx5_irq *irq; 475 475 476 - cpumask_copy(&af_desc.mask, cpu_online_mask); 477 - af_desc.is_managed = false; 476 + af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL); 477 + if (!af_desc) 478 + return ERR_PTR(-ENOMEM); 479 + 480 + cpumask_copy(&af_desc->mask, cpu_online_mask); 481 + af_desc->is_managed = false; 478 482 if (!mlx5_irq_pool_is_sf_pool(pool)) { 479 483 /* In case we are allocating a control IRQ from a pci device's pool. 480 484 * This can happen also for a SF if the SFs pool is empty. 481 485 */ 482 486 if (!pool->xa_num_irqs.max) { 483 - cpumask_clear(&af_desc.mask); 487 + cpumask_clear(&af_desc->mask); 484 488 /* In case we only have a single IRQ for PF/VF */ 485 - cpumask_set_cpu(cpumask_first(cpu_online_mask), &af_desc.mask); 489 + cpumask_set_cpu(cpumask_first(cpu_online_mask), &af_desc->mask); 486 490 } 487 491 /* Allocate the IRQ in index 0. The vector was already allocated */ 488 - irq = irq_pool_request_vector(pool, 0, &af_desc, NULL); 492 + irq = irq_pool_request_vector(pool, 0, af_desc, NULL); 489 493 } else { 490 - irq = mlx5_irq_affinity_request(dev, pool, &af_desc); 494 + irq = mlx5_irq_affinity_request(dev, pool, af_desc); 491 495 } 496 + 497 + kvfree(af_desc); 492 498 493 499 return irq; 494 500 } ··· 554 548 { 555 549 struct mlx5_irq_table *table = mlx5_irq_table_get(dev); 556 550 struct mlx5_irq_pool *pool = table->pcif_pool; 557 - struct irq_affinity_desc af_desc; 558 551 int offset = MLX5_IRQ_VEC_COMP_BASE; 552 + struct irq_affinity_desc *af_desc; 553 + struct mlx5_irq *irq; 554 + 555 + af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL); 556 + if (!af_desc) 557 + return ERR_PTR(-ENOMEM); 559 558 560 559 if (!pool->xa_num_irqs.max) 561 560 offset = 0; 562 561 563 - af_desc.is_managed = false; 564 - cpumask_clear(&af_desc.mask); 565 - cpumask_set_cpu(cpu, &af_desc.mask); 566 - return mlx5_irq_request(dev, vecidx + offset, &af_desc, rmap); 562 + af_desc->is_managed = false; 563 + cpumask_clear(&af_desc->mask); 564 + cpumask_set_cpu(cpu, &af_desc->mask); 565 + 566 + irq = mlx5_irq_request(dev, vecidx + offset, af_desc, rmap); 567 + 568 + kvfree(af_desc); 569 + 570 + return irq; 567 571 } 568 572 569 573 static struct mlx5_irq_pool *

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