Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:
"Here are some bug fixes that have piled up during ksummit/linuxcon.
1) Fix endian problems in ibmveth, from Anton Blanchard.
2) IPV6 routing code does GFP_KERNEL allocation in atomic, fix from
Benjamin Block.
3) SCTP association fixes from Daniel Borkmann.
4) When multiple VLAN headers are present we have to make sure the
second and subsequent ones are pullable in the SKB otherwise we
blindly dereference garbage. From Jiri Benc.
5) The argument adjustment of the signature of hlist_add_after*()
introduced a regression in the batman-adv code, fix from Sven
Eckelmann.
6) Fix TX hang handling to avoid a panic in i40e, from Anjali Singhai
Jain.
7) PTP flag test is inverted in i40e driver, from Jesse Brandeburg.
8) ATM LEC driver needs to hold RTNL mutex over MTU changes, from
Chas Williams.
9) Truncate packets larger then the TPACKET_V3 format configured
buffers, otherwise we overwrite past the end of said buffers.
From Eric Dumazet.
10) Fix endianness bugs in qlcnic firmware handling, from Rajesh
Borundia and Shahed Shaikh.
11) CXGB4 sometimes doesn't get all of the TX completion events it
should resulting in SKBs getting stuck in the TX queue, from
Hariprasad Shenai.
12) When the FEC chip's PTP clock is disabled, you can't access the
register. Add necessary checks to avoid the resulting hang, from
Fugang Duan"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (37 commits)
drivers: isdn: eicon: xdi_msg.h: Fix typo in #ifndef
net: sctp: fix suboptimal edge-case on non-active active/retrans path selection
net: sctp: spare unnecessary comparison in sctp_trans_elect_best
net: ethernet: broadcom: bnx2x: Remove redundant #ifdef
ibmveth: Fix endian issues with rx_no_buffer statistic
net: xgene: fix possible NULL dereference in xgene_enet_free_desc_rings()
openvswitch: fix panic with multiple vlan headers
net: ipv6: fib: don't sleep inside atomic lock
net: fec: ptp: avoid register access when ipg clock is disabled
cxgb4: Free completed tx skbs promptly
cxgb4: Fix race condition in cleanup
sctp: not send SCTP_PEER_ADDR_CHANGE notifications with failed probe
bnx2x: Revert UNDI flushing mechanism
qlcnic: Fix endianess issue in firmware load from file operation
qlcnic: Fix endianess issue in FW dump template header
qlcnic: Fix flash access interface to application
MAINTAINERS: Add section for MRF24J40 IEEE 802.15.4 radio driver
macvlan: Allow setting multicast filter on all macvlan types
packet: handle too big packets for PACKET_V3
MAINTAINERS: add entry for ec_bhf driver
...
+412
-260
+12
MAINTAINERS
+12
MAINTAINERS
···
1843
1843
F: Documentation/filesystems/befs.txt
1844
1844
F: fs/befs/
1845
1845
1846
+
BECKHOFF CX5020 ETHERCAT MASTER DRIVER
1847
+
M: Dariusz Marcinkiewicz <reksio@newterm.pl>
1848
+
L: netdev@vger.kernel.org
1849
+
S: Maintained
1850
+
F: drivers/net/ethernet/ec_bhf.c
1851
+
1846
1852
BFS FILE SYSTEM
1847
1853
M: "Tigran A. Aivazian" <tigran@aivazian.fsnet.co.uk>
1848
1854
S: Maintained
···
5987
5981
T: git git://linuxtv.org/media_tree.git
5988
5982
S: Maintained
5989
5983
F: drivers/media/radio/radio-mr800.c
5984
+
5985
+
MRF24J40 IEEE 802.15.4 RADIO DRIVER
5986
+
M: Alan Ott <alan@signal11.us>
5987
+
L: linux-wpan@vger.kernel.org
5988
+
S: Maintained
5989
+
F: drivers/net/ieee802154/mrf24j40.c
5990
5990
5991
5991
MSI LAPTOP SUPPORT
5992
5992
M: "Lee, Chun-Yi" <jlee@suse.com>
+1
-1
drivers/isdn/hardware/eicon/xdi_msg.h
+1
-1
drivers/isdn/hardware/eicon/xdi_msg.h
+1
-1
drivers/net/can/c_can/c_can_platform.c
+1
-1
drivers/net/can/c_can/c_can_platform.c
···
280
280
281
281
priv->raminit_ctrlreg = devm_ioremap(&pdev->dev, res->start,
282
282
resource_size(res));
283
-
if (IS_ERR(priv->raminit_ctrlreg) || priv->instance < 0)
283
+
if (!priv->raminit_ctrlreg || priv->instance < 0)
284
284
dev_info(&pdev->dev, "control memory is not used for raminit\n");
285
285
else
286
286
priv->raminit = c_can_hw_raminit_ti;
+9
drivers/net/can/flexcan.c
+9
drivers/net/can/flexcan.c
···
549
549
550
550
/* process state changes depending on the new state */
551
551
switch (new_state) {
552
+
case CAN_STATE_ERROR_WARNING:
553
+
netdev_dbg(dev, "Error Warning\n");
554
+
cf->can_id |= CAN_ERR_CRTL;
555
+
cf->data[1] = (bec.txerr > bec.rxerr) ?
556
+
CAN_ERR_CRTL_TX_WARNING :
557
+
CAN_ERR_CRTL_RX_WARNING;
558
+
break;
552
559
case CAN_STATE_ERROR_ACTIVE:
553
560
netdev_dbg(dev, "Error Active\n");
554
561
cf->can_id |= CAN_ERR_PROT;
···
859
852
if (priv->devtype_data->features & FLEXCAN_HAS_BROKEN_ERR_STATE ||
860
853
priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
861
854
reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;
855
+
else
856
+
reg_ctrl &= ~FLEXCAN_CTRL_ERR_MSK;
862
857
863
858
/* save for later use */
864
859
priv->reg_ctrl_default = reg_ctrl;
+33
-29
drivers/net/can/sja1000/sja1000.c
+33
-29
drivers/net/can/sja1000/sja1000.c
···
172
172
netdev_err(dev, "setting SJA1000 into normal mode failed!\n");
173
173
}
174
174
175
+
/*
176
+
* initialize SJA1000 chip:
177
+
* - reset chip
178
+
* - set output mode
179
+
* - set baudrate
180
+
* - enable interrupts
181
+
* - start operating mode
182
+
*/
183
+
static void chipset_init(struct net_device *dev)
184
+
{
185
+
struct sja1000_priv *priv = netdev_priv(dev);
186
+
187
+
/* set clock divider and output control register */
188
+
priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
189
+
190
+
/* set acceptance filter (accept all) */
191
+
priv->write_reg(priv, SJA1000_ACCC0, 0x00);
192
+
priv->write_reg(priv, SJA1000_ACCC1, 0x00);
193
+
priv->write_reg(priv, SJA1000_ACCC2, 0x00);
194
+
priv->write_reg(priv, SJA1000_ACCC3, 0x00);
195
+
196
+
priv->write_reg(priv, SJA1000_ACCM0, 0xFF);
197
+
priv->write_reg(priv, SJA1000_ACCM1, 0xFF);
198
+
priv->write_reg(priv, SJA1000_ACCM2, 0xFF);
199
+
priv->write_reg(priv, SJA1000_ACCM3, 0xFF);
200
+
201
+
priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL);
202
+
}
203
+
175
204
static void sja1000_start(struct net_device *dev)
176
205
{
177
206
struct sja1000_priv *priv = netdev_priv(dev);
···
208
179
/* leave reset mode */
209
180
if (priv->can.state != CAN_STATE_STOPPED)
210
181
set_reset_mode(dev);
182
+
183
+
/* Initialize chip if uninitialized at this stage */
184
+
if (!(priv->read_reg(priv, SJA1000_CDR) & CDR_PELICAN))
185
+
chipset_init(dev);
211
186
212
187
/* Clear error counters and error code capture */
213
188
priv->write_reg(priv, SJA1000_TXERR, 0x0);
···
267
234
bec->rxerr = priv->read_reg(priv, SJA1000_RXERR);
268
235
269
236
return 0;
270
-
}
271
-
272
-
/*
273
-
* initialize SJA1000 chip:
274
-
* - reset chip
275
-
* - set output mode
276
-
* - set baudrate
277
-
* - enable interrupts
278
-
* - start operating mode
279
-
*/
280
-
static void chipset_init(struct net_device *dev)
281
-
{
282
-
struct sja1000_priv *priv = netdev_priv(dev);
283
-
284
-
/* set clock divider and output control register */
285
-
priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
286
-
287
-
/* set acceptance filter (accept all) */
288
-
priv->write_reg(priv, SJA1000_ACCC0, 0x00);
289
-
priv->write_reg(priv, SJA1000_ACCC1, 0x00);
290
-
priv->write_reg(priv, SJA1000_ACCC2, 0x00);
291
-
priv->write_reg(priv, SJA1000_ACCC3, 0x00);
292
-
293
-
priv->write_reg(priv, SJA1000_ACCM0, 0xFF);
294
-
priv->write_reg(priv, SJA1000_ACCM1, 0xFF);
295
-
priv->write_reg(priv, SJA1000_ACCM2, 0xFF);
296
-
priv->write_reg(priv, SJA1000_ACCM3, 0xFF);
297
-
298
-
priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL);
299
237
}
300
238
301
239
/*
+13
-7
drivers/net/ethernet/apm/xgene/xgene_enet_main.c
+13
-7
drivers/net/ethernet/apm/xgene/xgene_enet_main.c
···
563
563
struct xgene_enet_desc_ring *ring;
564
564
565
565
ring = pdata->tx_ring;
566
-
if (ring && ring->cp_ring && ring->cp_ring->cp_skb)
567
-
devm_kfree(dev, ring->cp_ring->cp_skb);
568
-
xgene_enet_free_desc_ring(ring);
566
+
if (ring) {
567
+
if (ring->cp_ring && ring->cp_ring->cp_skb)
568
+
devm_kfree(dev, ring->cp_ring->cp_skb);
569
+
xgene_enet_free_desc_ring(ring);
570
+
}
569
571
570
572
ring = pdata->rx_ring;
571
-
if (ring && ring->buf_pool && ring->buf_pool->rx_skb)
572
-
devm_kfree(dev, ring->buf_pool->rx_skb);
573
-
xgene_enet_free_desc_ring(ring->buf_pool);
574
-
xgene_enet_free_desc_ring(ring);
573
+
if (ring) {
574
+
if (ring->buf_pool) {
575
+
if (ring->buf_pool->rx_skb)
576
+
devm_kfree(dev, ring->buf_pool->rx_skb);
577
+
xgene_enet_free_desc_ring(ring->buf_pool);
578
+
}
579
+
xgene_enet_free_desc_ring(ring);
580
+
}
575
581
}
576
582
577
583
static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
-4
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
-4
drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
···
483
483
484
484
#ifdef BNX2X_STOP_ON_ERROR
485
485
fp->tpa_queue_used |= (1 << queue);
486
-
#ifdef _ASM_GENERIC_INT_L64_H
487
-
DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
488
-
#else
489
486
DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
490
-
#endif
491
487
fp->tpa_queue_used);
492
488
#endif
493
489
}
+17
-75
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+17
-75
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
···
10052
10052
}
10053
10053
10054
10054
#define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4))
10055
+
#define BNX2X_PREV_UNDI_PROD_ADDR_H(f) (BAR_TSTRORM_INTMEM + \
10056
+
0x1848 + ((f) << 4))
10055
10057
#define BNX2X_PREV_UNDI_RCQ(val) ((val) & 0xffff)
10056
10058
#define BNX2X_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff)
10057
10059
#define BNX2X_PREV_UNDI_PROD(rcq, bd) ((bd) << 16 | (rcq))
···
10061
10059
#define BCM_5710_UNDI_FW_MF_MAJOR (0x07)
10062
10060
#define BCM_5710_UNDI_FW_MF_MINOR (0x08)
10063
10061
#define BCM_5710_UNDI_FW_MF_VERS (0x05)
10064
-
#define BNX2X_PREV_UNDI_MF_PORT(p) (BAR_TSTRORM_INTMEM + 0x150c + ((p) << 4))
10065
-
#define BNX2X_PREV_UNDI_MF_FUNC(f) (BAR_TSTRORM_INTMEM + 0x184c + ((f) << 4))
10066
10062
10067
10063
static bool bnx2x_prev_is_after_undi(struct bnx2x *bp)
10068
10064
{
···
10079
10079
return false;
10080
10080
}
10081
10081
10082
-
static bool bnx2x_prev_unload_undi_fw_supports_mf(struct bnx2x *bp)
10083
-
{
10084
-
u8 major, minor, version;
10085
-
u32 fw;
10086
-
10087
-
/* Must check that FW is loaded */
10088
-
if (!(REG_RD(bp, MISC_REG_RESET_REG_1) &
10089
-
MISC_REGISTERS_RESET_REG_1_RST_XSEM)) {
10090
-
BNX2X_DEV_INFO("XSEM is reset - UNDI MF FW is not loaded\n");
10091
-
return false;
10092
-
}
10093
-
10094
-
/* Read Currently loaded FW version */
10095
-
fw = REG_RD(bp, XSEM_REG_PRAM);
10096
-
major = fw & 0xff;
10097
-
minor = (fw >> 0x8) & 0xff;
10098
-
version = (fw >> 0x10) & 0xff;
10099
-
BNX2X_DEV_INFO("Loaded FW: 0x%08x: Major 0x%02x Minor 0x%02x Version 0x%02x\n",
10100
-
fw, major, minor, version);
10101
-
10102
-
if (major > BCM_5710_UNDI_FW_MF_MAJOR)
10103
-
return true;
10104
-
10105
-
if ((major == BCM_5710_UNDI_FW_MF_MAJOR) &&
10106
-
(minor > BCM_5710_UNDI_FW_MF_MINOR))
10107
-
return true;
10108
-
10109
-
if ((major == BCM_5710_UNDI_FW_MF_MAJOR) &&
10110
-
(minor == BCM_5710_UNDI_FW_MF_MINOR) &&
10111
-
(version >= BCM_5710_UNDI_FW_MF_VERS))
10112
-
return true;
10113
-
10114
-
return false;
10115
-
}
10116
-
10117
-
static void bnx2x_prev_unload_undi_mf(struct bnx2x *bp)
10118
-
{
10119
-
int i;
10120
-
10121
-
/* Due to legacy (FW) code, the first function on each engine has a
10122
-
* different offset macro from the rest of the functions.
10123
-
* Setting this for all 8 functions is harmless regardless of whether
10124
-
* this is actually a multi-function device.
10125
-
*/
10126
-
for (i = 0; i < 2; i++)
10127
-
REG_WR(bp, BNX2X_PREV_UNDI_MF_PORT(i), 1);
10128
-
10129
-
for (i = 2; i < 8; i++)
10130
-
REG_WR(bp, BNX2X_PREV_UNDI_MF_FUNC(i - 2), 1);
10131
-
10132
-
BNX2X_DEV_INFO("UNDI FW (MF) set to discard\n");
10133
-
}
10134
-
10135
-
static void bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 port, u8 inc)
10082
+
static void bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 inc)
10136
10083
{
10137
10084
u16 rcq, bd;
10138
-
u32 tmp_reg = REG_RD(bp, BNX2X_PREV_UNDI_PROD_ADDR(port));
10085
+
u32 addr, tmp_reg;
10139
10086
10087
+
if (BP_FUNC(bp) < 2)
10088
+
addr = BNX2X_PREV_UNDI_PROD_ADDR(BP_PORT(bp));
10089
+
else
10090
+
addr = BNX2X_PREV_UNDI_PROD_ADDR_H(BP_FUNC(bp) - 2);
10091
+
10092
+
tmp_reg = REG_RD(bp, addr);
10140
10093
rcq = BNX2X_PREV_UNDI_RCQ(tmp_reg) + inc;
10141
10094
bd = BNX2X_PREV_UNDI_BD(tmp_reg) + inc;
10142
10095
10143
10096
tmp_reg = BNX2X_PREV_UNDI_PROD(rcq, bd);
10144
-
REG_WR(bp, BNX2X_PREV_UNDI_PROD_ADDR(port), tmp_reg);
10097
+
REG_WR(bp, addr, tmp_reg);
10145
10098
10146
-
BNX2X_DEV_INFO("UNDI producer [%d] rings bd -> 0x%04x, rcq -> 0x%04x\n",
10147
-
port, bd, rcq);
10099
+
BNX2X_DEV_INFO("UNDI producer [%d/%d][%08x] rings bd -> 0x%04x, rcq -> 0x%04x\n",
10100
+
BP_PORT(bp), BP_FUNC(bp), addr, bd, rcq);
10148
10101
}
10149
10102
10150
10103
static int bnx2x_prev_mcp_done(struct bnx2x *bp)
···
10336
10383
/* Reset should be performed after BRB is emptied */
10337
10384
if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) {
10338
10385
u32 timer_count = 1000;
10339
-
bool need_write = true;
10340
10386
10341
10387
/* Close the MAC Rx to prevent BRB from filling up */
10342
10388
bnx2x_prev_unload_close_mac(bp, &mac_vals);
···
10372
10420
else
10373
10421
timer_count--;
10374
10422
10375
-
/* New UNDI FW supports MF and contains better
10376
-
* cleaning methods - might be redundant but harmless.
10377
-
*/
10378
-
if (bnx2x_prev_unload_undi_fw_supports_mf(bp)) {
10379
-
if (need_write) {
10380
-
bnx2x_prev_unload_undi_mf(bp);
10381
-
need_write = false;
10382
-
}
10383
-
} else if (prev_undi) {
10384
-
/* If UNDI resides in memory,
10385
-
* manually increment it
10386
-
*/
10387
-
bnx2x_prev_unload_undi_inc(bp, BP_PORT(bp), 1);
10388
-
}
10423
+
/* If UNDI resides in memory, manually increment it */
10424
+
if (prev_undi)
10425
+
bnx2x_prev_unload_undi_inc(bp, 1);
10426
+
10389
10427
udelay(10);
10390
10428
}
10391
10429
+1
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+1
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+18
-14
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+18
-14
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
···
643
643
return ret;
644
644
}
645
645
646
-
static struct workqueue_struct *workq;
647
-
648
646
/**
649
647
* link_start - enable a port
650
648
* @dev: the port to enable
···
3338
3340
adap->tid_release_head = (void **)((uintptr_t)p | chan);
3339
3341
if (!adap->tid_release_task_busy) {
3340
3342
adap->tid_release_task_busy = true;
3341
-
queue_work(workq, &adap->tid_release_task);
3343
+
queue_work(adap->workq, &adap->tid_release_task);
3342
3344
}
3343
3345
spin_unlock_bh(&adap->tid_release_lock);
3344
3346
}
···
4138
4140
notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL);
4139
4141
t4_set_reg_field(adap, SGE_INT_ENABLE3,
4140
4142
DBFIFO_HP_INT | DBFIFO_LP_INT, 0);
4141
-
queue_work(workq, &adap->db_full_task);
4143
+
queue_work(adap->workq, &adap->db_full_task);
4142
4144
}
4143
4145
}
4144
4146
···
4148
4150
disable_dbs(adap);
4149
4151
notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL);
4150
4152
}
4151
-
queue_work(workq, &adap->db_drop_task);
4153
+
queue_work(adap->workq, &adap->db_drop_task);
4152
4154
}
4153
4155
4154
4156
static void uld_attach(struct adapter *adap, unsigned int uld)
···
6515
6517
goto out_disable_device;
6516
6518
}
6517
6519
6520
+
adapter->workq = create_singlethread_workqueue("cxgb4");
6521
+
if (!adapter->workq) {
6522
+
err = -ENOMEM;
6523
+
goto out_free_adapter;
6524
+
}
6525
+
6518
6526
/* PCI device has been enabled */
6519
6527
adapter->flags |= DEV_ENABLED;
6520
6528
···
6719
6715
out_unmap_bar0:
6720
6716
iounmap(adapter->regs);
6721
6717
out_free_adapter:
6718
+
if (adapter->workq)
6719
+
destroy_workqueue(adapter->workq);
6720
+
6722
6721
kfree(adapter);
6723
6722
out_disable_device:
6724
6723
pci_disable_pcie_error_reporting(pdev);
···
6742
6735
6743
6736
if (adapter) {
6744
6737
int i;
6738
+
6739
+
/* Tear down per-adapter Work Queue first since it can contain
6740
+
* references to our adapter data structure.
6741
+
*/
6742
+
destroy_workqueue(adapter->workq);
6745
6743
6746
6744
if (is_offload(adapter))
6747
6745
detach_ulds(adapter);
···
6800
6788
{
6801
6789
int ret;
6802
6790
6803
-
workq = create_singlethread_workqueue("cxgb4");
6804
-
if (!workq)
6805
-
return -ENOMEM;
6806
-
6807
6791
/* Debugfs support is optional, just warn if this fails */
6808
6792
cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
6809
6793
if (!cxgb4_debugfs_root)
6810
6794
pr_warn("could not create debugfs entry, continuing\n");
6811
6795
6812
6796
ret = pci_register_driver(&cxgb4_driver);
6813
-
if (ret < 0) {
6797
+
if (ret < 0)
6814
6798
debugfs_remove(cxgb4_debugfs_root);
6815
-
destroy_workqueue(workq);
6816
-
}
6817
6799
6818
6800
register_inet6addr_notifier(&cxgb4_inet6addr_notifier);
6819
6801
···
6819
6813
unregister_inet6addr_notifier(&cxgb4_inet6addr_notifier);
6820
6814
pci_unregister_driver(&cxgb4_driver);
6821
6815
debugfs_remove(cxgb4_debugfs_root); /* NULL ok */
6822
-
flush_workqueue(workq);
6823
-
destroy_workqueue(workq);
6824
6816
}
6825
6817
6826
6818
module_init(cxgb4_init_module);
+2
-1
drivers/net/ethernet/chelsio/cxgb4/sge.c
+2
-1
drivers/net/ethernet/chelsio/cxgb4/sge.c
···
2303
2303
FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0));
2304
2304
c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC |
2305
2305
FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c));
2306
-
c.viid_pkd = htonl(FW_EQ_ETH_CMD_VIID(pi->viid));
2306
+
c.viid_pkd = htonl(FW_EQ_ETH_CMD_AUTOEQUEQE |
2307
+
FW_EQ_ETH_CMD_VIID(pi->viid));
2307
2308
c.fetchszm_to_iqid = htonl(FW_EQ_ETH_CMD_HOSTFCMODE(2) |
2308
2309
FW_EQ_ETH_CMD_PCIECHN(pi->tx_chan) |
2309
2310
FW_EQ_ETH_CMD_FETCHRO(1) |
+1
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+1
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+2
-1
drivers/net/ethernet/chelsio/cxgb4vf/sge.c
+2
-1
drivers/net/ethernet/chelsio/cxgb4vf/sge.c
···
2250
2250
cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC |
2251
2251
FW_EQ_ETH_CMD_EQSTART |
2252
2252
FW_LEN16(cmd));
2253
-
cmd.viid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_VIID(pi->viid));
2253
+
cmd.viid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_AUTOEQUEQE |
2254
+
FW_EQ_ETH_CMD_VIID(pi->viid));
2254
2255
cmd.fetchszm_to_iqid =
2255
2256
cpu_to_be32(FW_EQ_ETH_CMD_HOSTFCMODE(SGE_HOSTFCMODE_STPG) |
2256
2257
FW_EQ_ETH_CMD_PCIECHN(pi->port_id) |
+4
-1
drivers/net/ethernet/freescale/fec.h
+4
-1
drivers/net/ethernet/freescale/fec.h
···
275
275
struct clk *clk_enet_out;
276
276
struct clk *clk_ptp;
277
277
278
+
bool ptp_clk_on;
279
+
struct mutex ptp_clk_mutex;
280
+
278
281
/* The saved address of a sent-in-place packet/buffer, for skfree(). */
279
282
unsigned char *tx_bounce[TX_RING_SIZE];
280
283
struct sk_buff *tx_skbuff[TX_RING_SIZE];
···
338
335
u32 cycle_speed;
339
336
int hwts_rx_en;
340
337
int hwts_tx_en;
341
-
struct timer_list time_keep;
338
+
struct delayed_work time_keep;
342
339
struct regulator *reg_phy;
343
340
};
344
341
+15
-3
drivers/net/ethernet/freescale/fec_main.c
+15
-3
drivers/net/ethernet/freescale/fec_main.c
···
1611
1611
goto failed_clk_enet_out;
1612
1612
}
1613
1613
if (fep->clk_ptp) {
1614
+
mutex_lock(&fep->ptp_clk_mutex);
1614
1615
ret = clk_prepare_enable(fep->clk_ptp);
1615
-
if (ret)
1616
+
if (ret) {
1617
+
mutex_unlock(&fep->ptp_clk_mutex);
1616
1618
goto failed_clk_ptp;
1619
+
} else {
1620
+
fep->ptp_clk_on = true;
1621
+
}
1622
+
mutex_unlock(&fep->ptp_clk_mutex);
1617
1623
}
1618
1624
} else {
1619
1625
clk_disable_unprepare(fep->clk_ahb);
1620
1626
clk_disable_unprepare(fep->clk_ipg);
1621
1627
if (fep->clk_enet_out)
1622
1628
clk_disable_unprepare(fep->clk_enet_out);
1623
-
if (fep->clk_ptp)
1629
+
if (fep->clk_ptp) {
1630
+
mutex_lock(&fep->ptp_clk_mutex);
1624
1631
clk_disable_unprepare(fep->clk_ptp);
1632
+
fep->ptp_clk_on = false;
1633
+
mutex_unlock(&fep->ptp_clk_mutex);
1634
+
}
1625
1635
}
1626
1636
1627
1637
return 0;
···
2635
2625
if (IS_ERR(fep->clk_enet_out))
2636
2626
fep->clk_enet_out = NULL;
2637
2627
2628
+
fep->ptp_clk_on = false;
2629
+
mutex_init(&fep->ptp_clk_mutex);
2638
2630
fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
2639
2631
fep->bufdesc_ex =
2640
2632
pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
···
2727
2715
struct net_device *ndev = platform_get_drvdata(pdev);
2728
2716
struct fec_enet_private *fep = netdev_priv(ndev);
2729
2717
2718
+
cancel_delayed_work_sync(&fep->time_keep);
2730
2719
cancel_work_sync(&fep->tx_timeout_work);
2731
2720
unregister_netdev(ndev);
2732
2721
fec_enet_mii_remove(fep);
2733
-
del_timer_sync(&fep->time_keep);
2734
2722
if (fep->reg_phy)
2735
2723
regulator_disable(fep->reg_phy);
2736
2724
if (fep->ptp_clock)
+22
-11
drivers/net/ethernet/freescale/fec_ptp.c
+22
-11
drivers/net/ethernet/freescale/fec_ptp.c
···
245
245
u64 ns;
246
246
unsigned long flags;
247
247
248
+
mutex_lock(&fep->ptp_clk_mutex);
249
+
/* Check the ptp clock */
250
+
if (!fep->ptp_clk_on) {
251
+
mutex_unlock(&fep->ptp_clk_mutex);
252
+
return -EINVAL;
253
+
}
254
+
248
255
ns = ts->tv_sec * 1000000000ULL;
249
256
ns += ts->tv_nsec;
250
257
251
258
spin_lock_irqsave(&fep->tmreg_lock, flags);
252
259
timecounter_init(&fep->tc, &fep->cc, ns);
253
260
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
261
+
mutex_unlock(&fep->ptp_clk_mutex);
254
262
return 0;
255
263
}
256
264
···
346
338
* fec_time_keep - call timecounter_read every second to avoid timer overrun
347
339
* because ENET just support 32bit counter, will timeout in 4s
348
340
*/
349
-
static void fec_time_keep(unsigned long _data)
341
+
static void fec_time_keep(struct work_struct *work)
350
342
{
351
-
struct fec_enet_private *fep = (struct fec_enet_private *)_data;
343
+
struct delayed_work *dwork = to_delayed_work(work);
344
+
struct fec_enet_private *fep = container_of(dwork, struct fec_enet_private, time_keep);
352
345
u64 ns;
353
346
unsigned long flags;
354
347
355
-
spin_lock_irqsave(&fep->tmreg_lock, flags);
356
-
ns = timecounter_read(&fep->tc);
357
-
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
348
+
mutex_lock(&fep->ptp_clk_mutex);
349
+
if (fep->ptp_clk_on) {
350
+
spin_lock_irqsave(&fep->tmreg_lock, flags);
351
+
ns = timecounter_read(&fep->tc);
352
+
spin_unlock_irqrestore(&fep->tmreg_lock, flags);
353
+
}
354
+
mutex_unlock(&fep->ptp_clk_mutex);
358
355
359
-
mod_timer(&fep->time_keep, jiffies + HZ);
356
+
schedule_delayed_work(&fep->time_keep, HZ);
360
357
}
361
358
362
359
/**
···
399
386
400
387
fec_ptp_start_cyclecounter(ndev);
401
388
402
-
init_timer(&fep->time_keep);
403
-
fep->time_keep.data = (unsigned long)fep;
404
-
fep->time_keep.function = fec_time_keep;
405
-
fep->time_keep.expires = jiffies + HZ;
406
-
add_timer(&fep->time_keep);
389
+
INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep);
407
390
408
391
fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
409
392
if (IS_ERR(fep->ptp_clock)) {
410
393
fep->ptp_clock = NULL;
411
394
pr_err("ptp_clock_register failed\n");
412
395
}
396
+
397
+
schedule_delayed_work(&fep->time_keep, HZ);
413
398
}
+14
-4
drivers/net/ethernet/ibm/ibmveth.c
+14
-4
drivers/net/ethernet/ibm/ibmveth.c
···
292
292
atomic_add(buffers_added, &(pool->available));
293
293
}
294
294
295
+
/*
296
+
* The final 8 bytes of the buffer list is a counter of frames dropped
297
+
* because there was not a buffer in the buffer list capable of holding
298
+
* the frame.
299
+
*/
300
+
static void ibmveth_update_rx_no_buffer(struct ibmveth_adapter *adapter)
301
+
{
302
+
__be64 *p = adapter->buffer_list_addr + 4096 - 8;
303
+
304
+
adapter->rx_no_buffer = be64_to_cpup(p);
305
+
}
306
+
295
307
/* replenish routine */
296
308
static void ibmveth_replenish_task(struct ibmveth_adapter *adapter)
297
309
{
···
319
307
ibmveth_replenish_buffer_pool(adapter, pool);
320
308
}
321
309
322
-
adapter->rx_no_buffer = *(u64 *)(((char*)adapter->buffer_list_addr) +
323
-
4096 - 8);
310
+
ibmveth_update_rx_no_buffer(adapter);
324
311
}
325
312
326
313
/* empty and free ana buffer pool - also used to do cleanup in error paths */
···
709
698
710
699
free_irq(netdev->irq, netdev);
711
700
712
-
adapter->rx_no_buffer = *(u64 *)(((char *)adapter->buffer_list_addr) +
713
-
4096 - 8);
701
+
ibmveth_update_rx_no_buffer(adapter);
714
702
715
703
ibmveth_cleanup(adapter);
716
704
+1
-1
drivers/net/ethernet/intel/i40e/i40e_ptp.c
+1
-1
drivers/net/ethernet/intel/i40e/i40e_ptp.c
+32
-12
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+32
-12
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
···
1003
1003
static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1004
1004
u32 v_retval, u8 *msg, u16 msglen)
1005
1005
{
1006
-
struct i40e_pf *pf = vf->pf;
1007
-
struct i40e_hw *hw = &pf->hw;
1008
-
int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1006
+
struct i40e_pf *pf;
1007
+
struct i40e_hw *hw;
1008
+
int abs_vf_id;
1009
1009
i40e_status aq_ret;
1010
+
1011
+
/* validate the request */
1012
+
if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1013
+
return -EINVAL;
1014
+
1015
+
pf = vf->pf;
1016
+
hw = &pf->hw;
1017
+
abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1010
1018
1011
1019
/* single place to detect unsuccessful return values */
1012
1020
if (v_retval) {
···
1936
1928
{
1937
1929
struct i40e_hw *hw = &pf->hw;
1938
1930
struct i40e_vf *vf = pf->vf;
1939
-
int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1940
1931
int i;
1941
1932
1942
-
for (i = 0; i < pf->num_alloc_vfs; i++) {
1933
+
for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
1934
+
int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1935
+
/* Not all vfs are enabled so skip the ones that are not */
1936
+
if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
1937
+
!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1938
+
continue;
1939
+
1943
1940
/* Ignore return value on purpose - a given VF may fail, but
1944
1941
* we need to keep going and send to all of them
1945
1942
*/
1946
1943
i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
1947
1944
msg, msglen, NULL);
1948
-
vf++;
1949
-
abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1950
1945
}
1951
1946
}
1952
1947
···
1965
1954
struct i40e_hw *hw = &pf->hw;
1966
1955
struct i40e_vf *vf = pf->vf;
1967
1956
struct i40e_link_status *ls = &pf->hw.phy.link_info;
1968
-
int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1969
1957
int i;
1970
1958
1971
1959
pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1972
1960
pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
1973
-
for (i = 0; i < pf->num_alloc_vfs; i++) {
1961
+
for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
1962
+
int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1974
1963
if (vf->link_forced) {
1975
1964
pfe.event_data.link_event.link_status = vf->link_up;
1976
1965
pfe.event_data.link_event.link_speed =
···
1983
1972
i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
1984
1973
0, (u8 *)&pfe, sizeof(pfe),
1985
1974
NULL);
1986
-
vf++;
1987
-
abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1988
1975
}
1989
1976
}
1990
1977
···
2011
2002
void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
2012
2003
{
2013
2004
struct i40e_virtchnl_pf_event pfe;
2014
-
int abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
2005
+
int abs_vf_id;
2006
+
2007
+
/* validate the request */
2008
+
if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
2009
+
return;
2010
+
2011
+
/* verify if the VF is in either init or active before proceeding */
2012
+
if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
2013
+
!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
2014
+
return;
2015
+
2016
+
abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id;
2015
2017
2016
2018
pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
2017
2019
pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
+14
-1
drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
+14
-1
drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
···
268
268
u16 cksum;
269
269
u16 unused;
270
270
u8 model[16];
271
-
u16 mfg_id;
271
+
u8 mfg_id;
272
272
u16 id;
273
273
u8 flag;
274
274
u8 erase_cmd;
···
2360
2360
return QLC_84XX_VNIC_COUNT;
2361
2361
else
2362
2362
return QLC_DEFAULT_VNIC_COUNT;
2363
+
}
2364
+
2365
+
static inline void qlcnic_swap32_buffer(u32 *buffer, int count)
2366
+
{
2367
+
#if defined(__BIG_ENDIAN)
2368
+
u32 *tmp = buffer;
2369
+
int i;
2370
+
2371
+
for (i = 0; i < count; i++) {
2372
+
*tmp = swab32(*tmp);
2373
+
tmp++;
2374
+
}
2375
+
#endif
2363
2376
}
2364
2377
2365
2378
#ifdef CONFIG_QLCNIC_HWMON
+3
-3
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
+3
-3
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c
···
2603
2603
}
2604
2604
2605
2605
qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_DIRECT_WINDOW,
2606
-
(addr));
2606
+
(addr & 0xFFFF0000));
2607
2607
2608
2608
range = flash_offset + (count * sizeof(u32));
2609
2609
/* Check if data is spread across multiple sectors */
···
2753
2753
ret = qlcnic_83xx_lockless_flash_read32(adapter, QLCNIC_FDT_LOCATION,
2754
2754
(u8 *)&adapter->ahw->fdt,
2755
2755
count);
2756
-
2756
+
qlcnic_swap32_buffer((u32 *)&adapter->ahw->fdt, count);
2757
2757
qlcnic_83xx_unlock_flash(adapter);
2758
2758
return ret;
2759
2759
}
···
2788
2788
2789
2789
addr1 = (sector_start_addr & 0xFF) << 16;
2790
2790
addr2 = (sector_start_addr & 0xFF0000) >> 16;
2791
-
reversed_addr = addr1 | addr2;
2791
+
reversed_addr = addr1 | addr2 | (sector_start_addr & 0xFF00);
2792
2792
2793
2793
qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA,
2794
2794
reversed_addr);
+25
-10
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
+25
-10
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
···
1378
1378
{
1379
1379
struct qlc_83xx_fw_info *fw_info = adapter->ahw->fw_info;
1380
1380
const struct firmware *fw = fw_info->fw;
1381
-
u32 dest, *p_cache;
1381
+
u32 dest, *p_cache, *temp;
1382
1382
int i, ret = -EIO;
1383
+
__le32 *temp_le;
1383
1384
u8 data[16];
1384
1385
size_t size;
1385
1386
u64 addr;
1386
1387
1388
+
temp = kzalloc(fw->size, GFP_KERNEL);
1389
+
if (!temp) {
1390
+
release_firmware(fw);
1391
+
fw_info->fw = NULL;
1392
+
return -ENOMEM;
1393
+
}
1394
+
1395
+
temp_le = (__le32 *)fw->data;
1396
+
1397
+
/* FW image in file is in little endian, swap the data to nullify
1398
+
* the effect of writel() operation on big endian platform.
1399
+
*/
1400
+
for (i = 0; i < fw->size / sizeof(u32); i++)
1401
+
temp[i] = __le32_to_cpu(temp_le[i]);
1402
+
1387
1403
dest = QLCRDX(adapter->ahw, QLCNIC_FW_IMAGE_ADDR);
1388
1404
size = (fw->size & ~0xF);
1389
-
p_cache = (u32 *)fw->data;
1405
+
p_cache = temp;
1390
1406
addr = (u64)dest;
1391
1407
1392
1408
ret = qlcnic_ms_mem_write128(adapter, addr,
1393
1409
p_cache, size / 16);
1394
1410
if (ret) {
1395
1411
dev_err(&adapter->pdev->dev, "MS memory write failed\n");
1396
-
release_firmware(fw);
1397
-
fw_info->fw = NULL;
1398
-
return -EIO;
1412
+
goto exit;
1399
1413
}
1400
1414
1401
1415
/* alignment check */
1402
1416
if (fw->size & 0xF) {
1403
1417
addr = dest + size;
1404
1418
for (i = 0; i < (fw->size & 0xF); i++)
1405
-
data[i] = fw->data[size + i];
1419
+
data[i] = temp[size + i];
1406
1420
for (; i < 16; i++)
1407
1421
data[i] = 0;
1408
1422
ret = qlcnic_ms_mem_write128(adapter, addr,
···
1424
1410
if (ret) {
1425
1411
dev_err(&adapter->pdev->dev,
1426
1412
"MS memory write failed\n");
1427
-
release_firmware(fw);
1428
-
fw_info->fw = NULL;
1429
-
return -EIO;
1413
+
goto exit;
1430
1414
}
1431
1415
}
1416
+
1417
+
exit:
1432
1418
release_firmware(fw);
1433
1419
fw_info->fw = NULL;
1420
+
kfree(temp);
1434
1421
1435
-
return 0;
1422
+
return ret;
1436
1423
}
1437
1424
1438
1425
static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter)
+57
drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c
+57
drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c
···
47
47
u32 type;
48
48
u32 offset;
49
49
u32 cap_size;
50
+
#if defined(__LITTLE_ENDIAN)
50
51
u8 mask;
51
52
u8 rsvd[2];
52
53
u8 flags;
54
+
#else
55
+
u8 flags;
56
+
u8 rsvd[2];
57
+
u8 mask;
58
+
#endif
53
59
} __packed;
54
60
55
61
struct __crb {
56
62
u32 addr;
63
+
#if defined(__LITTLE_ENDIAN)
57
64
u8 stride;
58
65
u8 rsvd1[3];
66
+
#else
67
+
u8 rsvd1[3];
68
+
u8 stride;
69
+
#endif
59
70
u32 data_size;
60
71
u32 no_ops;
61
72
u32 rsvd2[4];
···
74
63
75
64
struct __ctrl {
76
65
u32 addr;
66
+
#if defined(__LITTLE_ENDIAN)
77
67
u8 stride;
78
68
u8 index_a;
79
69
u16 timeout;
70
+
#else
71
+
u16 timeout;
72
+
u8 index_a;
73
+
u8 stride;
74
+
#endif
80
75
u32 data_size;
81
76
u32 no_ops;
77
+
#if defined(__LITTLE_ENDIAN)
82
78
u8 opcode;
83
79
u8 index_v;
84
80
u8 shl_val;
85
81
u8 shr_val;
82
+
#else
83
+
u8 shr_val;
84
+
u8 shl_val;
85
+
u8 index_v;
86
+
u8 opcode;
87
+
#endif
86
88
u32 val1;
87
89
u32 val2;
88
90
u32 val3;
···
103
79
104
80
struct __cache {
105
81
u32 addr;
82
+
#if defined(__LITTLE_ENDIAN)
106
83
u16 stride;
107
84
u16 init_tag_val;
85
+
#else
86
+
u16 init_tag_val;
87
+
u16 stride;
88
+
#endif
108
89
u32 size;
109
90
u32 no_ops;
110
91
u32 ctrl_addr;
111
92
u32 ctrl_val;
112
93
u32 read_addr;
94
+
#if defined(__LITTLE_ENDIAN)
113
95
u8 read_addr_stride;
114
96
u8 read_addr_num;
115
97
u8 rsvd1[2];
98
+
#else
99
+
u8 rsvd1[2];
100
+
u8 read_addr_num;
101
+
u8 read_addr_stride;
102
+
#endif
116
103
} __packed;
117
104
118
105
struct __ocm {
···
157
122
158
123
struct __queue {
159
124
u32 sel_addr;
125
+
#if defined(__LITTLE_ENDIAN)
160
126
u16 stride;
161
127
u8 rsvd[2];
128
+
#else
129
+
u8 rsvd[2];
130
+
u16 stride;
131
+
#endif
162
132
u32 size;
163
133
u32 no_ops;
164
134
u8 rsvd2[8];
165
135
u32 read_addr;
136
+
#if defined(__LITTLE_ENDIAN)
166
137
u8 read_addr_stride;
167
138
u8 read_addr_cnt;
168
139
u8 rsvd3[2];
140
+
#else
141
+
u8 rsvd3[2];
142
+
u8 read_addr_cnt;
143
+
u8 read_addr_stride;
144
+
#endif
169
145
} __packed;
170
146
171
147
struct __pollrd {
172
148
u32 sel_addr;
173
149
u32 read_addr;
174
150
u32 sel_val;
151
+
#if defined(__LITTLE_ENDIAN)
175
152
u16 sel_val_stride;
176
153
u16 no_ops;
154
+
#else
155
+
u16 no_ops;
156
+
u16 sel_val_stride;
157
+
#endif
177
158
u32 poll_wait;
178
159
u32 poll_mask;
179
160
u32 data_size;
···
204
153
u32 no_ops;
205
154
u32 sel_val_mask;
206
155
u32 read_addr;
156
+
#if defined(__LITTLE_ENDIAN)
207
157
u8 sel_val_stride;
208
158
u8 data_size;
209
159
u8 rsvd[2];
160
+
#else
161
+
u8 rsvd[2];
162
+
u8 data_size;
163
+
u8 sel_val_stride;
164
+
#endif
210
165
} __packed;
211
166
212
167
struct __pollrdmwr {
+15
-1
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
+15
-1
drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c
···
280
280
if (ret != 0)
281
281
return ret;
282
282
qlcnic_read_crb(adapter, buf, offset, size);
283
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
283
284
284
285
return size;
285
286
}
···
297
296
if (ret != 0)
298
297
return ret;
299
298
299
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
300
300
qlcnic_write_crb(adapter, buf, offset, size);
301
301
return size;
302
302
}
···
331
329
return -EIO;
332
330
333
331
memcpy(buf, &data, size);
332
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
334
333
335
334
return size;
336
335
}
···
349
346
if (ret != 0)
350
347
return ret;
351
348
349
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
352
350
memcpy(&data, buf, size);
353
351
354
352
if (qlcnic_pci_mem_write_2M(adapter, offset, data))
···
416
412
if (rem)
417
413
return QL_STATUS_INVALID_PARAM;
418
414
415
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
419
416
pm_cfg = (struct qlcnic_pm_func_cfg *)buf;
420
417
ret = validate_pm_config(adapter, pm_cfg, count);
421
418
···
479
474
pm_cfg[pci_func].dest_npar = 0;
480
475
pm_cfg[pci_func].pci_func = i;
481
476
}
477
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
482
478
return size;
483
479
}
484
480
···
561
555
if (rem)
562
556
return QL_STATUS_INVALID_PARAM;
563
557
558
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
564
559
esw_cfg = (struct qlcnic_esw_func_cfg *)buf;
565
560
ret = validate_esw_config(adapter, esw_cfg, count);
566
561
if (ret)
···
656
649
if (qlcnic_get_eswitch_port_config(adapter, &esw_cfg[pci_func]))
657
650
return QL_STATUS_INVALID_PARAM;
658
651
}
652
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
659
653
return size;
660
654
}
661
655
···
696
688
if (rem)
697
689
return QL_STATUS_INVALID_PARAM;
698
690
691
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
699
692
np_cfg = (struct qlcnic_npar_func_cfg *)buf;
700
693
ret = validate_npar_config(adapter, np_cfg, count);
701
694
if (ret)
···
768
759
np_cfg[pci_func].max_tx_queues = nic_info.max_tx_ques;
769
760
np_cfg[pci_func].max_rx_queues = nic_info.max_rx_ques;
770
761
}
762
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
771
763
return size;
772
764
}
773
765
···
926
916
927
917
pci_cfg = (struct qlcnic_pci_func_cfg *)buf;
928
918
count = size / sizeof(struct qlcnic_pci_func_cfg);
919
+
qlcnic_swap32_buffer((u32 *)pci_info, size / sizeof(u32));
929
920
for (i = 0; i < count; i++) {
930
921
pci_cfg[i].pci_func = pci_info[i].id;
931
922
pci_cfg[i].func_type = pci_info[i].type;
···
980
969
}
981
970
982
971
qlcnic_83xx_unlock_flash(adapter);
972
+
qlcnic_swap32_buffer((u32 *)p_read_buf, count);
983
973
memcpy(buf, p_read_buf, size);
984
974
kfree(p_read_buf);
985
975
···
998
986
if (!p_cache)
999
987
return -ENOMEM;
1000
988
989
+
count = size / sizeof(u32);
990
+
qlcnic_swap32_buffer((u32 *)buf, count);
1001
991
memcpy(p_cache, buf, size);
1002
992
p_src = p_cache;
1003
-
count = size / sizeof(u32);
1004
993
1005
994
if (qlcnic_83xx_lock_flash(adapter) != 0) {
1006
995
kfree(p_cache);
···
1066
1053
if (!p_cache)
1067
1054
return -ENOMEM;
1068
1055
1056
+
qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32));
1069
1057
memcpy(p_cache, buf, size);
1070
1058
p_src = p_cache;
1071
1059
count = size / sizeof(u32);
+8
-2
drivers/net/macvlan.c
+8
-2
drivers/net/macvlan.c
···
739
739
struct macvlan_dev *vlan = netdev_priv(dev);
740
740
int err = -EINVAL;
741
741
742
-
if (!vlan->port->passthru)
742
+
/* Support unicast filter only on passthru devices.
743
+
* Multicast filter should be allowed on all devices.
744
+
*/
745
+
if (!vlan->port->passthru && is_unicast_ether_addr(addr))
743
746
return -EOPNOTSUPP;
744
747
745
748
if (flags & NLM_F_REPLACE)
···
763
760
struct macvlan_dev *vlan = netdev_priv(dev);
764
761
int err = -EINVAL;
765
762
766
-
if (!vlan->port->passthru)
763
+
/* Support unicast filter only on passthru devices.
764
+
* Multicast filter should be allowed on all devices.
765
+
*/
766
+
if (!vlan->port->passthru && is_unicast_ether_addr(addr))
767
767
return -EOPNOTSUPP;
768
768
769
769
if (is_unicast_ether_addr(addr))
+21
-21
drivers/net/phy/bcm7xxx.c
+21
-21
drivers/net/phy/bcm7xxx.c
···
157
157
return bcm7xxx_28nm_afe_config_init(phydev);
158
158
}
159
159
160
+
static int bcm7xxx_28nm_resume(struct phy_device *phydev)
161
+
{
162
+
int ret;
163
+
164
+
/* Re-apply workarounds coming out suspend/resume */
165
+
ret = bcm7xxx_28nm_config_init(phydev);
166
+
if (ret)
167
+
return ret;
168
+
169
+
/* 28nm Gigabit PHYs come out of reset without any half-duplex
170
+
* or "hub" compliant advertised mode, fix that. This does not
171
+
* cause any problems with the PHY library since genphy_config_aneg()
172
+
* gracefully handles auto-negotiated and forced modes.
173
+
*/
174
+
return genphy_config_aneg(phydev);
175
+
}
176
+
160
177
static int phy_set_clr_bits(struct phy_device *dev, int location,
161
178
int set_mask, int clr_mask)
162
179
{
···
229
212
}
230
213
231
214
/* Workaround for putting the PHY in IDDQ mode, required
232
-
* for all BCM7XXX PHYs
215
+
* for all BCM7XXX 40nm and 65nm PHYs
233
216
*/
234
217
static int bcm7xxx_suspend(struct phy_device *phydev)
235
218
{
···
274
257
.config_init = bcm7xxx_28nm_afe_config_init,
275
258
.config_aneg = genphy_config_aneg,
276
259
.read_status = genphy_read_status,
277
-
.suspend = bcm7xxx_suspend,
278
-
.resume = bcm7xxx_28nm_afe_config_init,
260
+
.resume = bcm7xxx_28nm_resume,
279
261
.driver = { .owner = THIS_MODULE },
280
262
}, {
281
263
.phy_id = PHY_ID_BCM7439,
···
286
270
.config_init = bcm7xxx_28nm_afe_config_init,
287
271
.config_aneg = genphy_config_aneg,
288
272
.read_status = genphy_read_status,
289
-
.suspend = bcm7xxx_suspend,
290
-
.resume = bcm7xxx_28nm_afe_config_init,
273
+
.resume = bcm7xxx_28nm_resume,
291
274
.driver = { .owner = THIS_MODULE },
292
275
}, {
293
276
.phy_id = PHY_ID_BCM7445,
···
298
283
.config_init = bcm7xxx_28nm_config_init,
299
284
.config_aneg = genphy_config_aneg,
300
285
.read_status = genphy_read_status,
301
-
.suspend = bcm7xxx_suspend,
302
-
.resume = bcm7xxx_28nm_config_init,
303
-
.driver = { .owner = THIS_MODULE },
304
-
}, {
305
-
.name = "Broadcom BCM7XXX 28nm",
306
-
.phy_id = PHY_ID_BCM7XXX_28,
307
-
.phy_id_mask = PHY_BCM_OUI_MASK,
308
-
.features = PHY_GBIT_FEATURES |
309
-
SUPPORTED_Pause | SUPPORTED_Asym_Pause,
310
-
.flags = PHY_IS_INTERNAL,
311
-
.config_init = bcm7xxx_28nm_config_init,
312
-
.config_aneg = genphy_config_aneg,
313
-
.read_status = genphy_read_status,
314
-
.suspend = bcm7xxx_suspend,
315
-
.resume = bcm7xxx_28nm_config_init,
286
+
.resume = bcm7xxx_28nm_afe_config_init,
316
287
.driver = { .owner = THIS_MODULE },
317
288
}, {
318
289
.phy_id = PHY_BCM_OUI_4,
···
332
331
{ PHY_ID_BCM7366, 0xfffffff0, },
333
332
{ PHY_ID_BCM7439, 0xfffffff0, },
334
333
{ PHY_ID_BCM7445, 0xfffffff0, },
335
-
{ PHY_ID_BCM7XXX_28, 0xfffffc00 },
336
334
{ PHY_BCM_OUI_4, 0xffff0000 },
337
335
{ PHY_BCM_OUI_5, 0xffffff00 },
338
336
{ }
+21
-12
drivers/net/phy/smsc.c
+21
-12
drivers/net/phy/smsc.c
···
43
43
44
44
static int smsc_phy_config_init(struct phy_device *phydev)
45
45
{
46
+
int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
47
+
48
+
if (rc < 0)
49
+
return rc;
50
+
51
+
/* Enable energy detect mode for this SMSC Transceivers */
52
+
rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
53
+
rc | MII_LAN83C185_EDPWRDOWN);
54
+
if (rc < 0)
55
+
return rc;
56
+
57
+
return smsc_phy_ack_interrupt(phydev);
58
+
}
59
+
60
+
static int smsc_phy_reset(struct phy_device *phydev)
61
+
{
46
62
int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES);
47
63
if (rc < 0)
48
64
return rc;
···
82
66
rc = phy_read(phydev, MII_BMCR);
83
67
} while (rc & BMCR_RESET);
84
68
}
85
-
86
-
rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
87
-
if (rc < 0)
88
-
return rc;
89
-
90
-
/* Enable energy detect mode for this SMSC Transceivers */
91
-
rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
92
-
rc | MII_LAN83C185_EDPWRDOWN);
93
-
if (rc < 0)
94
-
return rc;
95
-
96
-
return smsc_phy_ack_interrupt (phydev);
69
+
return 0;
97
70
}
98
71
99
72
static int lan911x_config_init(struct phy_device *phydev)
···
147
142
.config_aneg = genphy_config_aneg,
148
143
.read_status = genphy_read_status,
149
144
.config_init = smsc_phy_config_init,
145
+
.soft_reset = smsc_phy_reset,
150
146
151
147
/* IRQ related */
152
148
.ack_interrupt = smsc_phy_ack_interrupt,
···
170
164
.config_aneg = genphy_config_aneg,
171
165
.read_status = genphy_read_status,
172
166
.config_init = smsc_phy_config_init,
167
+
.soft_reset = smsc_phy_reset,
173
168
174
169
/* IRQ related */
175
170
.ack_interrupt = smsc_phy_ack_interrupt,
···
193
186
.config_aneg = genphy_config_aneg,
194
187
.read_status = genphy_read_status,
195
188
.config_init = smsc_phy_config_init,
189
+
.soft_reset = smsc_phy_reset,
196
190
197
191
/* IRQ related */
198
192
.ack_interrupt = smsc_phy_ack_interrupt,
···
238
230
.config_aneg = genphy_config_aneg,
239
231
.read_status = lan87xx_read_status,
240
232
.config_init = smsc_phy_config_init,
233
+
.soft_reset = smsc_phy_reset,
241
234
242
235
/* IRQ related */
243
236
.ack_interrupt = smsc_phy_ack_interrupt,
-1
include/linux/brcmphy.h
-1
include/linux/brcmphy.h
+2
net/atm/lec.c
+2
net/atm/lec.c
···
410
410
priv->lane2_ops = NULL;
411
411
if (priv->lane_version > 1)
412
412
priv->lane2_ops = &lane2_ops;
413
+
rtnl_lock();
413
414
if (dev_set_mtu(dev, mesg->content.config.mtu))
414
415
pr_info("%s: change_mtu to %d failed\n",
415
416
dev->name, mesg->content.config.mtu);
417
+
rtnl_unlock();
416
418
priv->is_proxy = mesg->content.config.is_proxy;
417
419
break;
418
420
case l_flush_tran_id:
+1
-1
net/batman-adv/fragmentation.c
+1
-1
net/batman-adv/fragmentation.c
···
188
188
189
189
/* Reached the end of the list, so insert after 'frag_entry_last'. */
190
190
if (likely(frag_entry_last)) {
191
-
hlist_add_behind(&frag_entry_last->list, &frag_entry_new->list);
191
+
hlist_add_behind(&frag_entry_new->list, &frag_entry_last->list);
192
192
chain->size += skb->len - hdr_size;
193
193
chain->timestamp = jiffies;
194
194
ret = true;
+1
-1
net/ipv6/ip6_fib.c
+1
-1
net/ipv6/ip6_fib.c
+5
net/openvswitch/actions.c
+5
net/openvswitch/actions.c
···
42
42
43
43
static int make_writable(struct sk_buff *skb, int write_len)
44
44
{
45
+
if (!pskb_may_pull(skb, write_len))
46
+
return -ENOMEM;
47
+
45
48
if (!skb_cloned(skb) || skb_clone_writable(skb, write_len))
46
49
return 0;
47
50
···
73
70
74
71
vlan_set_encap_proto(skb, vhdr);
75
72
skb->mac_header += VLAN_HLEN;
73
+
if (skb_network_offset(skb) < ETH_HLEN)
74
+
skb_set_network_header(skb, ETH_HLEN);
76
75
skb_reset_mac_len(skb);
77
76
78
77
return 0;
+17
net/packet/af_packet.c
+17
net/packet/af_packet.c
···
632
632
p1->tov_in_jiffies = msecs_to_jiffies(p1->retire_blk_tov);
633
633
p1->blk_sizeof_priv = req_u->req3.tp_sizeof_priv;
634
634
635
+
p1->max_frame_len = p1->kblk_size - BLK_PLUS_PRIV(p1->blk_sizeof_priv);
635
636
prb_init_ft_ops(p1, req_u);
636
637
prb_setup_retire_blk_timer(po, tx_ring);
637
638
prb_open_block(p1, pbd);
···
1942
1941
snaplen = po->rx_ring.frame_size - macoff;
1943
1942
if ((int)snaplen < 0)
1944
1943
snaplen = 0;
1944
+
}
1945
+
} else if (unlikely(macoff + snaplen >
1946
+
GET_PBDQC_FROM_RB(&po->rx_ring)->max_frame_len)) {
1947
+
u32 nval;
1948
+
1949
+
nval = GET_PBDQC_FROM_RB(&po->rx_ring)->max_frame_len - macoff;
1950
+
pr_err_once("tpacket_rcv: packet too big, clamped from %u to %u. macoff=%u\n",
1951
+
snaplen, nval, macoff);
1952
+
snaplen = nval;
1953
+
if (unlikely((int)snaplen < 0)) {
1954
+
snaplen = 0;
1955
+
macoff = GET_PBDQC_FROM_RB(&po->rx_ring)->max_frame_len;
1945
1956
}
1946
1957
}
1947
1958
spin_lock(&sk->sk_receive_queue.lock);
···
3795
3782
if (unlikely((int)req->tp_block_size <= 0))
3796
3783
goto out;
3797
3784
if (unlikely(req->tp_block_size & (PAGE_SIZE - 1)))
3785
+
goto out;
3786
+
if (po->tp_version >= TPACKET_V3 &&
3787
+
(int)(req->tp_block_size -
3788
+
BLK_PLUS_PRIV(req_u->req3.tp_sizeof_priv)) <= 0)
3798
3789
goto out;
3799
3790
if (unlikely(req->tp_frame_size < po->tp_hdrlen +
3800
3791
po->tp_reserve))
+1
net/packet/internal.h
+1
net/packet/internal.h
+13
-33
net/sched/sch_cbq.c
+13
-33
net/sched/sch_cbq.c
···
159
159
struct cbq_class *tx_borrowed;
160
160
int tx_len;
161
161
psched_time_t now; /* Cached timestamp */
162
-
psched_time_t now_rt; /* Cached real time */
163
162
unsigned int pmask;
164
163
165
164
struct hrtimer delay_timer;
···
352
353
int toplevel = q->toplevel;
353
354
354
355
if (toplevel > cl->level && !(qdisc_is_throttled(cl->q))) {
355
-
psched_time_t now;
356
-
psched_tdiff_t incr;
357
-
358
-
now = psched_get_time();
359
-
incr = now - q->now_rt;
360
-
now = q->now + incr;
356
+
psched_time_t now = psched_get_time();
361
357
362
358
do {
363
359
if (cl->undertime < now) {
···
694
700
struct cbq_class *this = q->tx_class;
695
701
struct cbq_class *cl = this;
696
702
int len = q->tx_len;
703
+
psched_time_t now;
697
704
698
705
q->tx_class = NULL;
706
+
/* Time integrator. We calculate EOS time
707
+
* by adding expected packet transmission time.
708
+
*/
709
+
now = q->now + L2T(&q->link, len);
699
710
700
711
for ( ; cl; cl = cl->share) {
701
712
long avgidle = cl->avgidle;
···
716
717
* idle = (now - last) - last_pktlen/rate
717
718
*/
718
719
719
-
idle = q->now - cl->last;
720
+
idle = now - cl->last;
720
721
if ((unsigned long)idle > 128*1024*1024) {
721
722
avgidle = cl->maxidle;
722
723
} else {
···
760
761
idle -= L2T(&q->link, len);
761
762
idle += L2T(cl, len);
762
763
763
-
cl->undertime = q->now + idle;
764
+
cl->undertime = now + idle;
764
765
} else {
765
766
/* Underlimit */
766
767
···
770
771
else
771
772
cl->avgidle = avgidle;
772
773
}
773
-
cl->last = q->now;
774
+
if ((s64)(now - cl->last) > 0)
775
+
cl->last = now;
774
776
}
775
777
776
778
cbq_update_toplevel(q, this, q->tx_borrowed);
···
943
943
struct sk_buff *skb;
944
944
struct cbq_sched_data *q = qdisc_priv(sch);
945
945
psched_time_t now;
946
-
psched_tdiff_t incr;
947
946
948
947
now = psched_get_time();
949
-
incr = now - q->now_rt;
950
948
951
-
if (q->tx_class) {
952
-
psched_tdiff_t incr2;
953
-
/* Time integrator. We calculate EOS time
954
-
* by adding expected packet transmission time.
955
-
* If real time is greater, we warp artificial clock,
956
-
* so that:
957
-
*
958
-
* cbq_time = max(real_time, work);
959
-
*/
960
-
incr2 = L2T(&q->link, q->tx_len);
961
-
q->now += incr2;
949
+
if (q->tx_class)
962
950
cbq_update(q);
963
-
if ((incr -= incr2) < 0)
964
-
incr = 0;
965
-
q->now += incr;
966
-
} else {
967
-
if (now > q->now)
968
-
q->now = now;
969
-
}
970
-
q->now_rt = now;
951
+
952
+
q->now = now;
971
953
972
954
for (;;) {
973
955
q->wd_expires = 0;
···
1205
1223
hrtimer_cancel(&q->delay_timer);
1206
1224
q->toplevel = TC_CBQ_MAXLEVEL;
1207
1225
q->now = psched_get_time();
1208
-
q->now_rt = q->now;
1209
1226
1210
1227
for (prio = 0; prio <= TC_CBQ_MAXPRIO; prio++)
1211
1228
q->active[prio] = NULL;
···
1388
1407
q->delay_timer.function = cbq_undelay;
1389
1408
q->toplevel = TC_CBQ_MAXLEVEL;
1390
1409
q->now = psched_get_time();
1391
-
q->now_rt = q->now;
1392
1410
1393
1411
cbq_link_class(&q->link);
1394
1412
+5
-7
net/sctp/associola.c
+5
-7
net/sctp/associola.c
···
813
813
else {
814
814
dst_release(transport->dst);
815
815
transport->dst = NULL;
816
+
ulp_notify = false;
816
817
}
817
818
818
819
spc_state = SCTP_ADDR_UNREACHABLE;
···
1245
1244
{
1246
1245
u8 score_curr, score_best;
1247
1246
1248
-
if (best == NULL)
1247
+
if (best == NULL || curr == best)
1249
1248
return curr;
1250
1249
1251
1250
score_curr = sctp_trans_score(curr);
···
1356
1355
trans_sec = trans_pri;
1357
1356
1358
1357
/* If we failed to find a usable transport, just camp on the
1359
-
* primary or retran, even if they are inactive, if possible
1360
-
* pick a PF iff it's the better choice.
1358
+
* active or pick a PF iff it's the better choice.
1361
1359
*/
1362
1360
if (trans_pri == NULL) {
1363
-
trans_pri = sctp_trans_elect_best(asoc->peer.primary_path,
1364
-
asoc->peer.retran_path);
1365
-
trans_pri = sctp_trans_elect_best(trans_pri, trans_pf);
1366
-
trans_sec = asoc->peer.primary_path;
1361
+
trans_pri = sctp_trans_elect_best(asoc->peer.active_path, trans_pf);
1362
+
trans_sec = trans_pri;
1367
1363
}
1368
1364
1369
1365
/* Set the active and retran transports. */
+4
-1
net/tipc/port.h
+4
-1
net/tipc/port.h
···
179
179
return msg_importance(&port->phdr);
180
180
}
181
181
182
-
static inline void tipc_port_set_importance(struct tipc_port *port, int imp)
182
+
static inline int tipc_port_set_importance(struct tipc_port *port, int imp)
183
183
{
184
+
if (imp > TIPC_CRITICAL_IMPORTANCE)
185
+
return -EINVAL;
184
186
msg_set_importance(&port->phdr, (u32)imp);
187
+
return 0;
185
188
}
186
189
187
190
#endif