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watchdog: it87_wdt: add PWRGD enable quirk for Qotom QCML04

For the watchdog timer to work properly on the QCML04 board we need to
set PWRGD enable in the Environment Controller Configuration Registers
Special Configuration Register 1 when it is not already set, this may
be the case when the watchdog is not enabled from within the BIOS.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20241025063441.3494837-1-james.hilliard1@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>

authored by

James Hilliard and committed by
Wim Van Sebroeck 43439076 90fc2c8e

+39
+39
drivers/watchdog/it87_wdt.c
··· 20 20 21 21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22 22 23 + #include <linux/bits.h> 24 + #include <linux/dmi.h> 23 25 #include <linux/init.h> 24 26 #include <linux/io.h> 25 27 #include <linux/kernel.h> ··· 42 40 #define VAL 0x2f 43 41 44 42 /* Logical device Numbers LDN */ 43 + #define EC 0x04 45 44 #define GPIO 0x07 46 45 47 46 /* Configuration Registers and Functions */ ··· 75 72 #define IT8783_ID 0x8783 76 73 #define IT8784_ID 0x8784 77 74 #define IT8786_ID 0x8786 75 + 76 + /* Environment Controller Configuration Registers LDN=0x04 */ 77 + #define SCR1 0xfa 78 + 79 + /* Environment Controller Bits SCR1 */ 80 + #define WDT_PWRGD 0x20 78 81 79 82 /* GPIO Configuration Registers LDN=0x07 */ 80 83 #define WDTCTRL 0x71 ··· 249 240 return ret; 250 241 } 251 242 243 + enum { 244 + IT87_WDT_OUTPUT_THROUGH_PWRGD = BIT(0), 245 + }; 246 + 247 + static const struct dmi_system_id it87_quirks[] = { 248 + { 249 + /* Qotom Q30900P (IT8786) */ 250 + .matches = { 251 + DMI_EXACT_MATCH(DMI_BOARD_NAME, "QCML04"), 252 + }, 253 + .driver_data = (void *)IT87_WDT_OUTPUT_THROUGH_PWRGD, 254 + }, 255 + {} 256 + }; 257 + 252 258 static const struct watchdog_info ident = { 253 259 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 254 260 .firmware_version = 1, ··· 285 261 286 262 static int __init it87_wdt_init(void) 287 263 { 264 + const struct dmi_system_id *dmi_id; 288 265 u8 chip_rev; 289 266 u8 ctrl; 267 + int quirks = 0; 290 268 int rc; 291 269 292 270 rc = superio_enter(); ··· 298 272 chip_type = superio_inw(CHIPID); 299 273 chip_rev = superio_inb(CHIPREV) & 0x0f; 300 274 superio_exit(); 275 + 276 + dmi_id = dmi_first_match(it87_quirks); 277 + if (dmi_id) 278 + quirks = (long)dmi_id->driver_data; 301 279 302 280 switch (chip_type) { 303 281 case IT8702_ID: ··· 361 331 break; 362 332 default: 363 333 superio_outb(0x00, WDTCTRL); 334 + } 335 + 336 + if (quirks & IT87_WDT_OUTPUT_THROUGH_PWRGD) { 337 + superio_select(EC); 338 + ctrl = superio_inb(SCR1); 339 + if (!(ctrl & WDT_PWRGD)) { 340 + ctrl |= WDT_PWRGD; 341 + superio_outb(ctrl, SCR1); 342 + } 364 343 } 365 344 366 345 superio_exit();