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drm/amd/display: VSIF v3 set Max Refresh Rate

[WHY]
FreeSync spec requires PB8 and PB12 to be set to nominal
refresh rate regardless of fixed rate or variable

[HOW]
Removed the condition that checks and overwrites max refresh rate
and set PB8/PB12 to be set to max refresh rate always

Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Muhammad Ansari <muhammad.ansari@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Muhammad Ansari and committed by
Alex Deucher 43693e85 4ea7151f

+2 -7
+2 -7
drivers/gpu/drm/amd/display/modules/freesync/freesync.c
··· 626 626 unsigned int max_refresh; 627 627 unsigned int fixed_refresh; 628 628 unsigned int min_programmed; 629 - unsigned int max_programmed; 630 629 631 630 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 632 631 infopacket->sb[1] = 0x1A; ··· 671 672 (vrr->state == VRR_STATE_INACTIVE) ? min_refresh : 672 673 max_refresh; // Non-fs case, program nominal range 673 674 674 - max_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh : 675 - (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? max_refresh : 676 - max_refresh;// Non-fs case, program nominal range 677 - 678 675 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 679 676 infopacket->sb[7] = min_programmed & 0xFF; 680 677 681 678 /* PB8 = FreeSync Maximum refresh rate (Hz) */ 682 - infopacket->sb[8] = max_programmed & 0xFF; 679 + infopacket->sb[8] = max_refresh & 0xFF; 683 680 684 681 /* PB11 : MSB FreeSync Minimum refresh rate [Hz] - bits 9:8 */ 685 682 infopacket->sb[11] = (min_programmed >> 8) & 0x03; 686 683 687 684 /* PB12 : MSB FreeSync Maximum refresh rate [Hz] - bits 9:8 */ 688 - infopacket->sb[12] = (max_programmed >> 8) & 0x03; 685 + infopacket->sb[12] = (max_refresh >> 8) & 0x03; 689 686 690 687 /* PB16 : Reserved bits 7:1, FixedRate bit 0 */ 691 688 infopacket->sb[16] = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? 1 : 0;