Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: mfd: max77620: Convert to DT schema
Convert max77620 Device Tree bindings from TXT to YAML format. This patch
does not change any functionality; the bindings remain the same. The
thermal bindings are incorporated into the binding. GPIO controller
function in MAX77620 has no dedicated node and is folded into the parent
node itself.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@kernel.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260312085258.11431-4-clamor95@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
authored by
Svyatoslav Ryhel
and committed by
Lee Jones
4370650b
30eedf24
+424
-234
-2
Documentation/devicetree/bindings/gpio/trivial-gpio.yaml
-2
Documentation/devicetree/bindings/gpio/trivial-gpio.yaml
···
27
27
- gateworks,pld-gpio
28
28
- ibm,ppc4xx-gpio
29
29
- loongson,ls1x-gpio
30
-
- maxim,max77620
31
30
- nintendo,hollywood-gpio
32
31
- nxp,pca9570
33
32
- nxp,pca9571
···
85
86
compatible:
86
87
contains:
87
88
enum:
88
-
- maxim,max77620
89
89
- rockchip,rk3328-grf-gpio
90
90
- ti,lp3943-gpio
91
91
- ti,palmas-gpio
-162
Documentation/devicetree/bindings/mfd/max77620.txt
-162
Documentation/devicetree/bindings/mfd/max77620.txt
···
1
-
MAX77620 Power management IC from Maxim Semiconductor.
2
-
3
-
Required properties:
4
-
-------------------
5
-
- compatible: Must be one of
6
-
"maxim,max77620"
7
-
"maxim,max20024"
8
-
"maxim,max77663"
9
-
- reg: I2C device address.
10
-
11
-
Optional properties:
12
-
-------------------
13
-
- interrupts: The interrupt on the parent the controller is
14
-
connected to.
15
-
- interrupt-controller: Marks the device node as an interrupt controller.
16
-
- #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17
-
variant of <../interrupt-controller/interrupts.txt>
18
-
IRQ numbers for different interrupt source of MAX77620
19
-
are defined at dt-bindings/mfd/max77620.h.
20
-
21
-
- system-power-controller: Indicates that this PMIC is controlling the
22
-
system power, see [1] for more details.
23
-
24
-
[1] Documentation/devicetree/bindings/power/power-controller.txt
25
-
26
-
Optional subnodes and their properties:
27
-
=======================================
28
-
29
-
Flexible power sequence configurations:
30
-
--------------------------------------
31
-
The Flexible Power Sequencer (FPS) allows each regulator to power up under
32
-
hardware or software control. Additionally, each regulator can power on
33
-
independently or among a group of other regulators with an adjustable power-up
34
-
and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
35
-
to be part of a sequence allowing external regulators to be sequenced along
36
-
with internal regulators. 32KHz clock can be programmed to be part of a
37
-
sequence.
38
-
39
-
The flexible sequencing structure consists of two hardware enable inputs
40
-
(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
41
-
Each master sequencing timer is programmable through its configuration
42
-
register to have a hardware enable source (EN1 or EN2) or a software enable
43
-
source (SW). When enabled/disabled, the master sequencing timer generates
44
-
eight sequencing events on different time periods called slots. The time
45
-
period between each event is programmable within the configuration register.
46
-
Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
47
-
sequence slave register which allows its enable source to be specified as
48
-
a flexible power sequencer timer or a software bit. When a FPS source of
49
-
regulators, GPIOs and clocks specifies the enable source to be a flexible
50
-
power sequencer, the power up and power down delays can be specified in
51
-
the regulators, GPIOs and clocks flexible power sequencer configuration
52
-
registers.
53
-
54
-
When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
55
-
clock are set into following state at the sequencing event that
56
-
corresponds to its flexible sequencer configuration register.
57
-
Sleep state: In this state, regulators, GPIOs
58
-
and 32KHz clock get disabled at
59
-
the sequencing event.
60
-
Global Low Power Mode (GLPM): In this state, regulators are set in
61
-
low power mode at the sequencing event.
62
-
63
-
The configuration parameters of FPS is provided through sub-node "fps"
64
-
and their child for FPS specific. The child node name for FPS are "fps0",
65
-
"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
66
-
67
-
The FPS configurations like FPS source, power up and power down slots for
68
-
regulators, GPIOs and 32kHz clocks are provided in their respective
69
-
configuration nodes which is explained in respective sub-system DT
70
-
binding document.
71
-
72
-
There is need for different FPS configuration parameters based on system
73
-
state like when system state changed from active to suspend or active to
74
-
power off (shutdown).
75
-
76
-
Optional properties:
77
-
-------------------
78
-
-maxim,fps-event-source: u32, FPS event source like external
79
-
hardware input to PMIC i.e. EN0, EN1 or
80
-
software (SW).
81
-
The macros are defined on
82
-
dt-bindings/mfd/max77620.h
83
-
for different control source.
84
-
- MAX77620_FPS_EVENT_SRC_EN0
85
-
for hardware input pin EN0.
86
-
- MAX77620_FPS_EVENT_SRC_EN1
87
-
for hardware input pin EN1.
88
-
- MAX77620_FPS_EVENT_SRC_SW
89
-
for software control.
90
-
91
-
-maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds
92
-
when system enters in to shutdown
93
-
state.
94
-
95
-
-maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds
96
-
when system enters in to suspend state.
97
-
98
-
-maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS
99
-
event cleared (set to LOW) whether it
100
-
should go to sleep state or low-power
101
-
state. Following are valid values:
102
-
- MAX77620_FPS_INACTIVE_STATE_SLEEP
103
-
to set the PMIC state to sleep.
104
-
- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
105
-
to set the PMIC state to low
106
-
power.
107
-
Absence of this property or other value
108
-
will not change device state when FPS
109
-
event get cleared.
110
-
111
-
Here supported time periods by device in microseconds are as follows:
112
-
MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
113
-
MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
114
-
MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
115
-
116
-
-maxim,power-ok-control: configure map power ok bit
117
-
1: Enables POK(Power OK) to control nRST_IO and GPIO1
118
-
POK function.
119
-
0: Disables POK control.
120
-
if property missing, do not configure MPOK bit.
121
-
If POK mapping is enabled for GPIO1/nRST_IO then,
122
-
GPIO1/nRST_IO pins are HIGH only if all rails
123
-
that have POK control enabled are HIGH.
124
-
If any of the rails goes down(which are enabled for POK
125
-
control) then, GPIO1/nRST_IO goes LOW.
126
-
this property is valid for max20024 only.
127
-
128
-
For DT binding details of different sub modules like GPIO, pincontrol,
129
-
regulator, power, please refer respective device-tree binding document
130
-
under their respective sub-system directories.
131
-
132
-
Example:
133
-
--------
134
-
#include <dt-bindings/mfd/max77620.h>
135
-
136
-
max77620@3c {
137
-
compatible = "maxim,max77620";
138
-
reg = <0x3c>;
139
-
140
-
interrupt-parent = <&intc>;
141
-
interrupts = <0 86 IRQ_TYPE_NONE>;
142
-
143
-
interrupt-controller;
144
-
#interrupt-cells = <2>;
145
-
146
-
fps {
147
-
fps0 {
148
-
maxim,shutdown-fps-time-period-us = <1280>;
149
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
150
-
};
151
-
152
-
fps1 {
153
-
maxim,shutdown-fps-time-period-us = <1280>;
154
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
155
-
};
156
-
157
-
fps2 {
158
-
maxim,shutdown-fps-time-period-us = <1280>;
159
-
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
160
-
};
161
-
};
162
-
};
+424
Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
+424
Documentation/devicetree/bindings/mfd/maxim,max77620.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/maxim,max77620.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: MAX77620 Power management IC from Maxim Semiconductor
8
+
9
+
maintainers:
10
+
- Svyatoslav Ryhel <clamor95@gmail.com>
11
+
12
+
properties:
13
+
compatible:
14
+
enum:
15
+
- maxim,max20024
16
+
- maxim,max77620
17
+
- maxim,max77663
18
+
19
+
reg:
20
+
maxItems: 1
21
+
22
+
interrupts:
23
+
maxItems: 1
24
+
25
+
interrupt-controller: true
26
+
27
+
"#interrupt-cells":
28
+
const: 2
29
+
30
+
gpio-controller: true
31
+
32
+
"#gpio-cells":
33
+
const: 2
34
+
description:
35
+
Device has 8 GPIO pins which can be configured as GPIO as well as
36
+
the special IO functions. The first cell is the pin number, and the
37
+
second cell is used to specify the gpio polarity (GPIO_ACTIVE_HIGH or
38
+
GPIO_ACTIVE_LOW).
39
+
40
+
system-power-controller: true
41
+
42
+
"#thermal-sensor-cells":
43
+
const: 0
44
+
description:
45
+
Maxim Semiconductor MAX77620 supports alarm interrupts when its
46
+
die temperature crosses 120C and 140C. These threshold temperatures
47
+
are not configurable. Device does not provide the real temperature
48
+
of die other than just indicating whether temperature is above or
49
+
below threshold level.
50
+
51
+
fps:
52
+
type: object
53
+
additionalProperties: false
54
+
description: |
55
+
The Flexible Power Sequencer (FPS) allows each regulator to power up
56
+
under hardware or software control. Additionally, each regulator can
57
+
power on independently or among a group of other regulators with an
58
+
adjustable power-up and power-down delays (sequencing). GPIO1, GPIO2,
59
+
and GPIO3 can be programmed to be part of a sequence allowing external
60
+
regulators to be sequenced along with internal regulators. 32KHz clock
61
+
can be programmed to be part of a sequence.
62
+
63
+
The flexible sequencing structure consists of two hardware enable inputs
64
+
(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
65
+
Each master sequencing timer is programmable through its configuration
66
+
register to have a hardware enable source (EN1 or EN2) or a software enable
67
+
source (SW). When enabled/disabled, the master sequencing timer generates
68
+
eight sequencing events on different time periods called slots. The time
69
+
period between each event is programmable within the configuration register.
70
+
Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
71
+
sequence slave register which allows its enable source to be specified as
72
+
a flexible power sequencer timer or a software bit. When a FPS source of
73
+
regulators, GPIOs and clocks specifies the enable source to be a flexible
74
+
power sequencer, the power up and power down delays can be specified in
75
+
the regulators, GPIOs and clocks flexible power sequencer configuration
76
+
registers.
77
+
78
+
When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz clock
79
+
are set into following state at the sequencing event that corresponds
80
+
to its flexible sequencer configuration register.
81
+
82
+
Sleep state: In this state, regulators, GPIOs and 32KHz clock get disabled
83
+
at the sequencing event.
84
+
Global Low Power Mode (GLPM): In this state, regulators are set in low
85
+
power mode at the sequencing event.
86
+
87
+
The configuration parameters of FPS is provided through sub-node "fps"
88
+
and their child for FPS specific. The child node name for FPS are "fps0",
89
+
"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
90
+
91
+
The FPS configurations like FPS source, power up and power down slots for
92
+
regulators, GPIOs and 32kHz clocks are provided in their respective
93
+
configuration nodes which is explained in respective sub-system DT
94
+
binding document.
95
+
96
+
There is need for different FPS configuration parameters based on system
97
+
state like when system state changed from active to suspend or active to
98
+
power off (shutdown).
99
+
100
+
patternProperties:
101
+
"^fps[0-2]$":
102
+
type: object
103
+
additionalProperties: false
104
+
105
+
properties:
106
+
maxim,fps-event-source:
107
+
$ref: /schemas/types.yaml#/definitions/uint32
108
+
description: |
109
+
FPS event source like external hardware input to PMIC i.e. EN0, EN1
110
+
or software (SW).
111
+
112
+
The macros are defined on dt-bindings/mfd/max77620.h for different
113
+
control source.
114
+
- MAX77620_FPS_EVENT_SRC_EN0 for hardware input pin EN0.
115
+
- MAX77620_FPS_EVENT_SRC_EN1 for hardware input pin EN1.
116
+
- MAX77620_FPS_EVENT_SRC_SW for software control.
117
+
118
+
maxim,shutdown-fps-time-period-us:
119
+
description:
120
+
FPS time period in microseconds when system enters in to shutdown state.
121
+
122
+
maxim,suspend-fps-time-period-us:
123
+
description:
124
+
FPS time period in microseconds when system enters in to suspend state.
125
+
126
+
maxim,device-state-on-disabled-event:
127
+
$ref: /schemas/types.yaml#/definitions/uint32
128
+
description: |
129
+
Describe the PMIC state when FPS event cleared (set to LOW) whether it
130
+
should go to sleep state or low-power state. Following are valid values:
131
+
- MAX77620_FPS_INACTIVE_STATE_SLEEP to set the PMIC state to sleep.
132
+
- MAX77620_FPS_INACTIVE_STATE_LOW_POWER to set the PMIC state to low
133
+
power.
134
+
Absence of this property or other value will not change device state
135
+
when FPS event get cleared.
136
+
137
+
maxim,power-ok-control:
138
+
$ref: /schemas/types.yaml#/definitions/uint32
139
+
description: |
140
+
Configure map power ok bit
141
+
142
+
1: Enables POK(Power OK) to control nRST_IO and GPIO1 POK function.
143
+
0: Disables POK control.
144
+
145
+
If property missing, do not configure MPOK bit. If POK mapping is
146
+
enabled for GPIO1/nRST_IO then, GPIO1/nRST_IO pins are HIGH only if
147
+
all rails that have POK control enabled are HIGH. If any of the rails
148
+
goes down (which are enabled for POK control) then, GPIO1/nRST_IO
149
+
goes LOW.
150
+
enum: [0, 1]
151
+
152
+
pinmux:
153
+
$ref: /schemas/pinctrl/maxim,max77620-pinctrl.yaml
154
+
155
+
regulators:
156
+
$ref: /schemas/regulator/maxim,max77620-regulator.yaml
157
+
158
+
allOf:
159
+
- if:
160
+
properties:
161
+
compatible:
162
+
contains:
163
+
enum:
164
+
- maxim,max20024
165
+
- maxim,max77663
166
+
then:
167
+
properties:
168
+
"#thermal-sensor-cells": false
169
+
fps:
170
+
patternProperties:
171
+
"^fps[0-2]$":
172
+
properties:
173
+
maxim,shutdown-fps-time-period-us:
174
+
enum: [20, 40, 80, 160, 320, 640, 1280, 2540]
175
+
maxim,suspend-fps-time-period-us:
176
+
enum: [20, 40, 80, 160, 320, 640, 1280, 2540]
177
+
maxim,power-ok-control: false
178
+
179
+
- if:
180
+
properties:
181
+
compatible:
182
+
contains:
183
+
const: maxim,max77620
184
+
then:
185
+
properties:
186
+
fps:
187
+
patternProperties:
188
+
"^fps[0-2]$":
189
+
properties:
190
+
maxim,shutdown-fps-time-period-us:
191
+
enum: [40, 80, 160, 320, 640, 1280, 2560, 5120]
192
+
maxim,suspend-fps-time-period-us:
193
+
enum: [40, 80, 160, 320, 640, 1280, 2560, 5120]
194
+
195
+
required:
196
+
- compatible
197
+
- reg
198
+
199
+
additionalProperties: false
200
+
201
+
examples:
202
+
- |
203
+
#include <dt-bindings/interrupt-controller/irq.h>
204
+
#include <dt-bindings/mfd/max77620.h>
205
+
206
+
i2c {
207
+
#address-cells = <1>;
208
+
#size-cells = <0>;
209
+
210
+
pmic@3c {
211
+
compatible = "maxim,max77620";
212
+
reg = <0x3c>;
213
+
214
+
interrupt-parent = <&gpio>;
215
+
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
216
+
217
+
interrupt-controller;
218
+
#interrupt-cells = <2>;
219
+
220
+
gpio-controller;
221
+
#gpio-cells = <2>;
222
+
223
+
#thermal-sensor-cells = <0>;
224
+
225
+
system-power-controller;
226
+
227
+
pinctrl-names = "default";
228
+
pinctrl-0 = <&max77620_default>;
229
+
230
+
max77620_default: pinmux {
231
+
gpio0 {
232
+
pins = "gpio0";
233
+
function = "gpio";
234
+
};
235
+
236
+
gpio1 {
237
+
pins = "gpio1";
238
+
function = "fps-out";
239
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
240
+
};
241
+
242
+
gpio2 {
243
+
pins = "gpio2";
244
+
function = "fps-out";
245
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
246
+
};
247
+
248
+
gpio3 {
249
+
pins = "gpio3";
250
+
function = "gpio";
251
+
};
252
+
253
+
gpio4 {
254
+
pins = "gpio4";
255
+
function = "32k-out1";
256
+
};
257
+
258
+
gpio5-6 {
259
+
pins = "gpio5", "gpio6";
260
+
function = "gpio";
261
+
drive-push-pull = <1>;
262
+
};
263
+
264
+
gpio7 {
265
+
pins = "gpio7";
266
+
function = "gpio";
267
+
};
268
+
};
269
+
270
+
fps {
271
+
fps0 {
272
+
maxim,shutdown-fps-time-period-us = <1280>;
273
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
274
+
};
275
+
276
+
fps1 {
277
+
maxim,shutdown-fps-time-period-us = <1280>;
278
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
279
+
};
280
+
281
+
fps2 {
282
+
maxim,shutdown-fps-time-period-us = <1280>;
283
+
maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
284
+
};
285
+
};
286
+
287
+
regulators {
288
+
in-sd0-supply = <&vdd_5v0_vbus>;
289
+
in-sd1-supply = <&vdd_5v0_vbus>;
290
+
in-sd2-supply = <&vdd_5v0_vbus>;
291
+
in-sd3-supply = <&vdd_5v0_vbus>;
292
+
293
+
in-ldo0-1-supply = <&vdd_1v8_vio>;
294
+
in-ldo2-supply = <&vdd_3v3_vbat>;
295
+
in-ldo3-5-supply = <&vdd_3v3_vbat>;
296
+
in-ldo4-6-supply = <&vdd_3v3_vbat>;
297
+
in-ldo7-8-supply = <&vdd_1v8_vio>;
298
+
299
+
sd0 {
300
+
regulator-name = "vdd_cpu";
301
+
regulator-min-microvolt = <800000>;
302
+
regulator-max-microvolt = <1250000>;
303
+
regulator-always-on;
304
+
regulator-boot-on;
305
+
306
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
307
+
};
308
+
309
+
sd1 {
310
+
regulator-name = "vdd_core";
311
+
regulator-min-microvolt = <950000>;
312
+
regulator-max-microvolt = <1350000>;
313
+
regulator-always-on;
314
+
regulator-boot-on;
315
+
316
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
317
+
};
318
+
319
+
vdd_1v8_vio: sd2 {
320
+
regulator-name = "vdd_1v8_gen";
321
+
regulator-min-microvolt = <1800000>;
322
+
regulator-max-microvolt = <1800000>;
323
+
regulator-always-on;
324
+
regulator-boot-on;
325
+
326
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
327
+
};
328
+
329
+
sd3 {
330
+
regulator-name = "vddio_ddr";
331
+
regulator-min-microvolt = <1200000>;
332
+
regulator-max-microvolt = <1200000>;
333
+
regulator-always-on;
334
+
regulator-boot-on;
335
+
336
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
337
+
};
338
+
339
+
ldo0 {
340
+
regulator-name = "avdd_pll";
341
+
regulator-min-microvolt = <1200000>;
342
+
regulator-max-microvolt = <1200000>;
343
+
regulator-always-on;
344
+
regulator-boot-on;
345
+
346
+
maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
347
+
};
348
+
349
+
ldo1 {
350
+
regulator-name = "vdd_ddr_hs";
351
+
regulator-min-microvolt = <1000000>;
352
+
regulator-max-microvolt = <1000000>;
353
+
regulator-always-on;
354
+
regulator-boot-on;
355
+
356
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
357
+
};
358
+
359
+
ldo2 {
360
+
regulator-name = "avdd_usb";
361
+
regulator-min-microvolt = <3300000>;
362
+
regulator-max-microvolt = <3300000>;
363
+
364
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
365
+
};
366
+
367
+
ldo3 {
368
+
regulator-name = "vdd_sdmmc3";
369
+
regulator-min-microvolt = <3000000>;
370
+
regulator-max-microvolt = <3000000>;
371
+
regulator-always-on;
372
+
373
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
374
+
};
375
+
376
+
ldo4 {
377
+
regulator-name = "vdd_rtc";
378
+
regulator-min-microvolt = <1200000>;
379
+
regulator-max-microvolt = <1200000>;
380
+
regulator-always-on;
381
+
regulator-boot-on;
382
+
383
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
384
+
};
385
+
386
+
ldo5 {
387
+
regulator-name = "vdd_ddr_rx";
388
+
regulator-min-microvolt = <2850000>;
389
+
regulator-max-microvolt = <2850000>;
390
+
regulator-always-on;
391
+
regulator-boot-on;
392
+
393
+
maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
394
+
};
395
+
396
+
ldo6 {
397
+
regulator-name = "avdd_osc";
398
+
regulator-min-microvolt = <1800000>;
399
+
regulator-max-microvolt = <1800000>;
400
+
regulator-always-on;
401
+
regulator-boot-on;
402
+
403
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
404
+
};
405
+
406
+
ldo7 {
407
+
regulator-name = "vdd_1v2_mhl";
408
+
regulator-min-microvolt = <1050000>;
409
+
regulator-max-microvolt = <1250000>;
410
+
411
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
412
+
};
413
+
414
+
ldo8 {
415
+
regulator-name = "avdd_dsi_csi";
416
+
regulator-min-microvolt = <1200000>;
417
+
regulator-max-microvolt = <1200000>;
418
+
419
+
maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>;
420
+
};
421
+
};
422
+
};
423
+
};
424
+
...
-70
Documentation/devicetree/bindings/thermal/max77620_thermal.txt
-70
Documentation/devicetree/bindings/thermal/max77620_thermal.txt
···
1
-
Thermal driver for MAX77620 Power management IC from Maxim Semiconductor.
2
-
3
-
Maxim Semiconductor MAX77620 supports alarm interrupts when its
4
-
die temperature crosses 120C and 140C. These threshold temperatures
5
-
are not configurable. Device does not provide the real temperature
6
-
of die other than just indicating whether temperature is above or
7
-
below threshold level.
8
-
9
-
Required properties:
10
-
-------------------
11
-
#thermal-sensor-cells: For more details, please refer to
12
-
<devicetree/bindings/thermal/thermal-sensor.yaml>
13
-
The value must be 0.
14
-
15
-
For more details, please refer generic thermal DT binding document
16
-
<devicetree/bindings/thermal/thermal*.yaml>.
17
-
18
-
Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
19
-
document for the MAX77620.
20
-
21
-
Example:
22
-
--------
23
-
#include <dt-bindings/mfd/max77620.h>
24
-
#include <dt-bindings/thermal/thermal.h>
25
-
...
26
-
27
-
i2c@7000d000 {
28
-
spmic: max77620@3c {
29
-
compatible = "maxim,max77620";
30
-
:::::
31
-
#thermal-sensor-cells = <0>;
32
-
:::
33
-
};
34
-
};
35
-
36
-
cool_dev: cool-dev {
37
-
compatible = "cooling-dev";
38
-
#cooling-cells = <2>;
39
-
};
40
-
41
-
thermal-zones {
42
-
PMIC-Die {
43
-
polling-delay = <0>;
44
-
polling-delay-passive = <0>;
45
-
thermal-sensors = <&spmic>;
46
-
47
-
trips {
48
-
pmic_die_warn_temp_thresh: hot-die {
49
-
temperature = <120000>;
50
-
type = "hot";
51
-
hysteresis = <0>;
52
-
};
53
-
54
-
pmic_die_cirt_temp_thresh: cirtical-die {
55
-
temperature = <140000>;
56
-
type = "critical";
57
-
hysteresis = <0>;
58
-
};
59
-
};
60
-
61
-
cooling-maps {
62
-
map0 {
63
-
trip = <&pmic_die_warn_temp_thresh>;
64
-
cooling-device = <&cool_dev THERMAL_NO_LIMIT
65
-
THERMAL_NO_LIMIT>;
66
-
contribution = <100>;
67
-
};
68
-
};
69
-
};
70
-
};