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kernel
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linux
dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
The "Other Logic Block" found in the EyeQ6Lplus from Mobileye provides
various functions for the controllers present in the SoC.
The OLB produces 22 clocks derived from its input, which is connected
to the main oscillator of the SoC.
It provides reset signals via two reset domains.
It also controls 32 pins to be either a GPIO or an alternate function.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
authored by
Benoît Monin
and committed by
Thomas Bogendoerfer
4434c389
20e65a6d
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Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq6lplus-olb.yaml
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Documentation/devicetree/bindings/soc/mobileye/mobileye,eyeq6lplus-olb.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/mobileye/mobileye,eyeq6lplus-olb.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mobileye EyeQ6Lplus SoC system controller
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maintainers:
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- Benoît Monin <benoit.monin@bootlin.com>
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- Grégory Clement <gregory.clement@bootlin.com>
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- Théo Lebrun <theo.lebrun@bootlin.com>
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- Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
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description:
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OLB ("Other Logic Block") is a hardware block grouping smaller blocks.
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Clocks, resets, pinctrl are being handled from here. EyeQ6Lplus hosts
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a single instance providing 22 clocks, two reset domains and one bank
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of 32 pins.
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properties:
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compatible:
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items:
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- const: mobileye,eyeq6lplus-olb
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- const: syscon
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reg:
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maxItems: 1
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'#reset-cells':
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description:
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First cell is reset domain index.
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Second cell is reset index inside that domain.
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const: 2
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'#clock-cells':
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const: 1
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clocks:
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maxItems: 1
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description:
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Input parent clock to all PLLs. Expected to be the main crystal.
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clock-names:
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const: ref
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patternProperties:
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'-pins?$':
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type: object
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description: Pin muxing configuration.
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$ref: /schemas/pinctrl/pinmux-node.yaml#
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additionalProperties: false
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properties:
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pins: true
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function:
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enum: [gpio, timer0, timer1, uart_ssi, spi0, uart0, timer2, timer3,
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timer_ext0, spi1, timer_ext1, ext_ref_clk, mipi_ref_clk]
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bias-disable: true
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bias-pull-down: true
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bias-pull-up: true
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drive-strength: true
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required:
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- pins
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- function
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allOf:
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- if:
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properties:
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function:
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const: gpio
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then:
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properties:
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pins:
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items: # PA0 - PA31
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pattern: '^(PA[1,2]?[0-9]|PA3[0,1])$'
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- if:
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properties:
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function:
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const: timer0
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then:
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properties:
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pins:
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items:
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enum: [PA0, PA1]
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- if:
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properties:
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function:
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const: timer1
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then:
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properties:
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pins:
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items:
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enum: [PA2, PA3]
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- if:
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properties:
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function:
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const: uart_ssi
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then:
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properties:
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pins:
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items:
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enum: [PA4, PA5]
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- if:
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properties:
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function:
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const: spi0
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then:
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properties:
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pins:
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items:
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enum: [PA6, PA7, PA8, PA9, PA10]
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- if:
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properties:
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function:
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const: uart0
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then:
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properties:
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pins:
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items:
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enum: [PA11, PA12]
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- if:
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properties:
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function:
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const: timer2
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then:
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properties:
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pins:
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items:
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enum: [PA13, PA14]
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- if:
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properties:
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function:
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const: timer3
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then:
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properties:
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pins:
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items:
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enum: [PA15, PA16]
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- if:
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properties:
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function:
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const: timer_ext0
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then:
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properties:
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pins:
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items:
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enum: [PA17, PA18, PA19, PA20]
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- if:
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properties:
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function:
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const: spi1
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then:
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properties:
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pins:
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items:
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enum: [PA21, PA22, PA23, PA24, PA25]
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- if:
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properties:
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function:
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const: timer_ext1
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then:
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properties:
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pins:
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items:
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enum: [PA26, PA27, PA28, PA29]
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- if:
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properties:
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function:
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const: ext_ref_clk
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then:
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properties:
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pins:
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items:
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enum: [PA30]
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- if:
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properties:
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function:
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const: mipi_ref_clk
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then:
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properties:
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pins:
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items:
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enum: [PA31]
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required:
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- compatible
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- reg
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- '#clock-cells'
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- clocks
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- clock-names
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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system-controller@e8400000 {
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compatible = "mobileye,eyeq6lplus-olb", "syscon";
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reg = <0 0xe8400000 0x0 0x80000>;
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#reset-cells = <2>;
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#clock-cells = <1>;
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clocks = <&xtal>;
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clock-names = "ref";
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};
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};
+37
include/dt-bindings/clock/mobileye,eyeq6lplus-clk.h
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include/dt-bindings/clock/mobileye,eyeq6lplus-clk.h
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (C) 2025 Mobileye Vision Technologies Ltd.
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*/
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#ifndef _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ6LPLUS_CLK_H
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#define _DT_BINDINGS_CLOCK_MOBILEYE_EYEQ6LPLUS_CLK_H
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#define EQ6LPC_PLL_CPU 0
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#define EQ6LPC_PLL_DDR 1
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#define EQ6LPC_PLL_PER 2
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#define EQ6LPC_PLL_VDI 3
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#define EQ6LPC_PLL_ACC 4
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#define EQ6LPC_CPU_OCC 5
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#define EQ6LPC_ACC_VDI 6
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#define EQ6LPC_ACC_OCC 7
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#define EQ6LPC_ACC_FCMU 8
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#define EQ6LPC_DDR_OCC 9
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#define EQ6LPC_PER_OCC 10
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#define EQ6LPC_PER_I2C_SER 11
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#define EQ6LPC_PER_PCLK 12
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#define EQ6LPC_PER_TSU 13
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#define EQ6LPC_PER_OSPI 14
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#define EQ6LPC_PER_GPIO 15
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#define EQ6LPC_PER_TIMER 16
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#define EQ6LPC_PER_I2C 17
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#define EQ6LPC_PER_UART 18
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#define EQ6LPC_PER_SPI 19
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#define EQ6LPC_PER_PERIPH 20
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#define EQ6LPC_VDI_OCC 21
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#endif