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Merge branch 'net-mlx5-support-ptm-on-arm-architecture'
Tariq Toukan says:
====================
net/mlx5: Support PTM on ARM architecture
This series by Carolina refactors mlx5 crosststamp initialization and
enables cross-timestamp support on ARM.
====================
Link: https://patch.msgid.link/20260316133607.8738-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+26
-14
+26
-14
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
+26
-14
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c
···
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#include "lib/eq.h"
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#include "en.h"
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#include "clock.h"
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-
#ifdef CONFIG_X86
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+
#if defined(CONFIG_X86) || defined(CONFIG_ARM_ARCH_TIMER)
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#include <linux/timekeeping.h>
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#include <linux/cpufeature.h>
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-
#endif /* CONFIG_X86 */
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+
#endif /* CONFIG_X86 || CONFIG_ARM_ARCH_TIMER */
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#define MLX5_RT_CLOCK_IDENTITY_SIZE MLX5_FLD_SZ_BYTES(mrtcq_reg, rt_clock_identity)
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47
···
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MLX5_REG_MTUTC, 0, 1);
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}
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-
#ifdef CONFIG_X86
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+
#if defined(CONFIG_X86) || defined(CONFIG_ARM_ARCH_TIMER)
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static bool mlx5_is_ptm_source_time_available(struct mlx5_core_dev *dev)
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{
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u32 out[MLX5_ST_SZ_DW(mtptm_reg)] = {0};
···
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host = MLX5_GET64(mtctr_reg, out, first_clock_timestamp);
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*sys_counterval = (struct system_counterval_t) {
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.cycles = host,
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-
.cs_id = CSID_X86_ART,
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+
.cs_id = IS_ENABLED(CONFIG_X86) ? CSID_X86_ART :
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CSID_ARM_ARCH_COUNTER,
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.use_nsecs = true,
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};
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*device = MLX5_GET64(mtctr_reg, out, second_clock_timestamp);
···
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mlx5_clock_unlock(clock);
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return err;
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}
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-
#endif /* CONFIG_X86 */
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+
#endif /* CONFIG_X86 || CONFIG_ARM_ARCH_TIMER */
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static u64 mlx5_read_time(struct mlx5_core_dev *dev,
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struct ptp_system_timestamp *sts,
···
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min(S32_MAX, 1 << log_max_freq_adjustment);
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}
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+
static void mlx5_init_crosststamp(struct mlx5_core_dev *mdev,
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+
bool expose_cycles, struct mlx5_clock *clock)
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+
{
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+
#if defined(CONFIG_X86)
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+
if (!boot_cpu_has(X86_FEATURE_ART))
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+
return;
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+
#endif /* CONFIG_X86 */
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+
#if defined(CONFIG_X86) || defined(CONFIG_ARM_ARCH_TIMER)
1312
+
if (!MLX5_CAP_MCAM_REG3(mdev, mtptm) ||
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+
!MLX5_CAP_MCAM_REG3(mdev, mtctr))
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+
return;
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+
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+
clock->ptp_info.getcrosststamp = mlx5_ptp_getcrosststamp;
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+
if (expose_cycles)
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clock->ptp_info.getcrosscycles = mlx5_ptp_getcrosscycles;
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+
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+
#endif /* CONFIG_X86 || CONFIG_ARM_ARCH_TIMER */
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}
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+
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static void mlx5_init_timer_clock(struct mlx5_core_dev *mdev)
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{
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struct mlx5_clock *clock = mdev->clock;
···
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expose_cycles = !MLX5_CAP_GEN(mdev, disciplined_fr_counter) ||
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!mlx5_real_time_mode(mdev);
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-
#ifdef CONFIG_X86
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-
if (MLX5_CAP_MCAM_REG3(mdev, mtptm) &&
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-
MLX5_CAP_MCAM_REG3(mdev, mtctr) && boot_cpu_has(X86_FEATURE_ART)) {
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-
clock->ptp_info.getcrosststamp = mlx5_ptp_getcrosststamp;
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if (expose_cycles)
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clock->ptp_info.getcrosscycles =
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mlx5_ptp_getcrosscycles;
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-
}
1346
-
#endif /* CONFIG_X86 */
1318
+
mlx5_init_crosststamp(mdev, expose_cycles, clock);
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if (expose_cycles)
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clock->ptp_info.getcyclesx64 = mlx5_ptp_getcyclesx;