Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'hwmon-for-v6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon fixes from Guenter Roeck:
- Fix severe regression in asus-ec-sensors driver
which resulted in EC driver failures
- Fix various bugs in mr75203 driver
- Fix byte order bug in tps23861 driver
* tag 'hwmon-for-v6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
hwmon: (asus-ec-sensors) autoload module via DMI data
hwmon: (mr75203) enable polling for all VM channels
hwmon: (mr75203) fix multi-channel voltage reading
hwmon: (mr75203) fix voltage equation for negative source input
hwmon: (mr75203) update pvt->v_num and vm_num to the actual number of used sensors
hwmon: (mr75203) fix VM sensor allocation when "intel,vm-map" not defined
dt-bindings: hwmon: (mr75203) fix "intel,vm-map" property to be optional
hwmon: (tps23861) fix byte order in resistance register
+278
-213
-1
Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
-1
Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml
+222
-186
drivers/hwmon/asus-ec-sensors.c
+222
-186
drivers/hwmon/asus-ec-sensors.c
···
266
266
#define SENSOR_SET_WATER_BLOCK \
267
267
(SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT)
268
268
269
-
270
269
struct ec_board_info {
271
-
const char *board_names[MAX_IDENTICAL_BOARD_VARIATIONS];
272
270
unsigned long sensors;
273
271
/*
274
272
* Defines which mutex to use for guarding access to the state and the
···
279
281
enum board_family family;
280
282
};
281
283
282
-
static const struct ec_board_info board_info[] = {
283
-
{
284
-
.board_names = {"PRIME X470-PRO"},
285
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
286
-
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
287
-
SENSOR_FAN_CPU_OPT |
288
-
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
289
-
.mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
290
-
.family = family_amd_400_series,
291
-
},
292
-
{
293
-
.board_names = {"PRIME X570-PRO"},
294
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
295
-
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
296
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
297
-
.family = family_amd_500_series,
298
-
},
299
-
{
300
-
.board_names = {"ProArt X570-CREATOR WIFI"},
301
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
302
-
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
303
-
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
304
-
},
305
-
{
306
-
.board_names = {"Pro WS X570-ACE"},
307
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
308
-
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
309
-
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
310
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
311
-
.family = family_amd_500_series,
312
-
},
313
-
{
314
-
.board_names = {"ROG CROSSHAIR VIII DARK HERO"},
315
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
316
-
SENSOR_TEMP_T_SENSOR |
317
-
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
318
-
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
319
-
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
320
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
321
-
.family = family_amd_500_series,
322
-
},
323
-
{
324
-
.board_names = {
325
-
"ROG CROSSHAIR VIII FORMULA",
326
-
"ROG CROSSHAIR VIII HERO",
327
-
"ROG CROSSHAIR VIII HERO (WI-FI)",
328
-
},
329
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
330
-
SENSOR_TEMP_T_SENSOR |
331
-
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
332
-
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
333
-
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
334
-
SENSOR_IN_CPU_CORE,
335
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
336
-
.family = family_amd_500_series,
337
-
},
338
-
{
339
-
.board_names = {
340
-
"ROG MAXIMUS XI HERO",
341
-
"ROG MAXIMUS XI HERO (WI-FI)",
342
-
},
343
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
344
-
SENSOR_TEMP_T_SENSOR |
345
-
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
346
-
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
347
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
348
-
.family = family_intel_300_series,
349
-
},
350
-
{
351
-
.board_names = {"ROG CROSSHAIR VIII IMPACT"},
352
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
353
-
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
354
-
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
355
-
SENSOR_IN_CPU_CORE,
356
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
357
-
.family = family_amd_500_series,
358
-
},
359
-
{
360
-
.board_names = {"ROG STRIX B550-E GAMING"},
361
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
362
-
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
363
-
SENSOR_FAN_CPU_OPT,
364
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
365
-
.family = family_amd_500_series,
366
-
},
367
-
{
368
-
.board_names = {"ROG STRIX B550-I GAMING"},
369
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
370
-
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
371
-
SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
372
-
SENSOR_IN_CPU_CORE,
373
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
374
-
.family = family_amd_500_series,
375
-
},
376
-
{
377
-
.board_names = {"ROG STRIX X570-E GAMING"},
378
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
379
-
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
380
-
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
381
-
SENSOR_IN_CPU_CORE,
382
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
383
-
.family = family_amd_500_series,
384
-
},
385
-
{
386
-
.board_names = {"ROG STRIX X570-E GAMING WIFI II"},
387
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
388
-
SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
389
-
SENSOR_IN_CPU_CORE,
390
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
391
-
.family = family_amd_500_series,
392
-
},
393
-
{
394
-
.board_names = {"ROG STRIX X570-F GAMING"},
395
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
396
-
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
397
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
398
-
.family = family_amd_500_series,
399
-
},
400
-
{
401
-
.board_names = {"ROG STRIX X570-I GAMING"},
402
-
.sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
403
-
SENSOR_TEMP_T_SENSOR |
404
-
SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
405
-
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
406
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
407
-
.family = family_amd_500_series,
408
-
},
409
-
{
410
-
.board_names = {"ROG STRIX Z690-A GAMING WIFI D4"},
411
-
.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
412
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
413
-
.family = family_intel_600_series,
414
-
},
415
-
{
416
-
.board_names = {"ROG ZENITH II EXTREME"},
417
-
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
418
-
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
419
-
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
420
-
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
421
-
SENSOR_SET_WATER_BLOCK |
422
-
SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
423
-
SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
424
-
.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
425
-
.family = family_amd_500_series,
426
-
},
427
-
{}
284
+
static const struct ec_board_info board_info_prime_x470_pro = {
285
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
286
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
287
+
SENSOR_FAN_CPU_OPT |
288
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
289
+
.mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH,
290
+
.family = family_amd_400_series,
291
+
};
292
+
293
+
static const struct ec_board_info board_info_prime_x570_pro = {
294
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
295
+
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
296
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
297
+
.family = family_amd_500_series,
298
+
};
299
+
300
+
static const struct ec_board_info board_info_pro_art_x570_creator_wifi = {
301
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
302
+
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT |
303
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
304
+
.family = family_amd_500_series,
305
+
};
306
+
307
+
static const struct ec_board_info board_info_pro_ws_x570_ace = {
308
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
309
+
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET |
310
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
311
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
312
+
.family = family_amd_500_series,
313
+
};
314
+
315
+
static const struct ec_board_info board_info_crosshair_viii_dark_hero = {
316
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
317
+
SENSOR_TEMP_T_SENSOR |
318
+
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
319
+
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
320
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
321
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
322
+
.family = family_amd_500_series,
323
+
};
324
+
325
+
static const struct ec_board_info board_info_crosshair_viii_hero = {
326
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
327
+
SENSOR_TEMP_T_SENSOR |
328
+
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
329
+
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
330
+
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU |
331
+
SENSOR_IN_CPU_CORE,
332
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
333
+
.family = family_amd_500_series,
334
+
};
335
+
336
+
static const struct ec_board_info board_info_maximus_xi_hero = {
337
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
338
+
SENSOR_TEMP_T_SENSOR |
339
+
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
340
+
SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW,
341
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
342
+
.family = family_intel_300_series,
343
+
};
344
+
345
+
static const struct ec_board_info board_info_crosshair_viii_impact = {
346
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
347
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
348
+
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
349
+
SENSOR_IN_CPU_CORE,
350
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
351
+
.family = family_amd_500_series,
352
+
};
353
+
354
+
static const struct ec_board_info board_info_strix_b550_e_gaming = {
355
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
356
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
357
+
SENSOR_FAN_CPU_OPT,
358
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
359
+
.family = family_amd_500_series,
360
+
};
361
+
362
+
static const struct ec_board_info board_info_strix_b550_i_gaming = {
363
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
364
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
365
+
SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU |
366
+
SENSOR_IN_CPU_CORE,
367
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
368
+
.family = family_amd_500_series,
369
+
};
370
+
371
+
static const struct ec_board_info board_info_strix_x570_e_gaming = {
372
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
373
+
SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
374
+
SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
375
+
SENSOR_IN_CPU_CORE,
376
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
377
+
.family = family_amd_500_series,
378
+
};
379
+
380
+
static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = {
381
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
382
+
SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU |
383
+
SENSOR_IN_CPU_CORE,
384
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
385
+
.family = family_amd_500_series,
386
+
};
387
+
388
+
static const struct ec_board_info board_info_strix_x570_f_gaming = {
389
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
390
+
SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET,
391
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
392
+
.family = family_amd_500_series,
393
+
};
394
+
395
+
static const struct ec_board_info board_info_strix_x570_i_gaming = {
396
+
.sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM |
397
+
SENSOR_TEMP_T_SENSOR |
398
+
SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET |
399
+
SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE,
400
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
401
+
.family = family_amd_500_series,
402
+
};
403
+
404
+
static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = {
405
+
.sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM,
406
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX,
407
+
.family = family_intel_600_series,
408
+
};
409
+
410
+
static const struct ec_board_info board_info_zenith_ii_extreme = {
411
+
.sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
412
+
SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
413
+
SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS |
414
+
SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE |
415
+
SENSOR_SET_WATER_BLOCK |
416
+
SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 |
417
+
SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3,
418
+
.mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0,
419
+
.family = family_amd_500_series,
420
+
};
421
+
422
+
#define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \
423
+
{ \
424
+
.matches = { \
425
+
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \
426
+
"ASUSTeK COMPUTER INC."), \
427
+
DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
428
+
}, \
429
+
.driver_data = (void *)board_info, \
430
+
}
431
+
432
+
static const struct dmi_system_id dmi_table[] = {
433
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO",
434
+
&board_info_prime_x470_pro),
435
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO",
436
+
&board_info_prime_x570_pro),
437
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI",
438
+
&board_info_pro_art_x570_creator_wifi),
439
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE",
440
+
&board_info_pro_ws_x570_ace),
441
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO",
442
+
&board_info_crosshair_viii_dark_hero),
443
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA",
444
+
&board_info_crosshair_viii_hero),
445
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO",
446
+
&board_info_crosshair_viii_hero),
447
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)",
448
+
&board_info_crosshair_viii_hero),
449
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO",
450
+
&board_info_maximus_xi_hero),
451
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)",
452
+
&board_info_maximus_xi_hero),
453
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT",
454
+
&board_info_crosshair_viii_impact),
455
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING",
456
+
&board_info_strix_b550_e_gaming),
457
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING",
458
+
&board_info_strix_b550_i_gaming),
459
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING",
460
+
&board_info_strix_x570_e_gaming),
461
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II",
462
+
&board_info_strix_x570_e_gaming_wifi_ii),
463
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING",
464
+
&board_info_strix_x570_f_gaming),
465
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING",
466
+
&board_info_strix_x570_i_gaming),
467
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4",
468
+
&board_info_strix_z690_a_gaming_wifi_d4),
469
+
DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME",
470
+
&board_info_zenith_ii_extreme),
471
+
{},
428
472
};
429
473
430
474
struct ec_sensor {
···
577
537
return -ENOENT;
578
538
}
579
539
580
-
static int __init bank_compare(const void *a, const void *b)
540
+
static int bank_compare(const void *a, const void *b)
581
541
{
582
542
return *((const s8 *)a) - *((const s8 *)b);
583
543
}
584
544
585
-
static void __init setup_sensor_data(struct ec_sensors_data *ec)
545
+
static void setup_sensor_data(struct ec_sensors_data *ec)
586
546
{
587
547
struct ec_sensor *s = ec->sensors;
588
548
bool bank_found;
···
614
574
sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
615
575
}
616
576
617
-
static void __init fill_ec_registers(struct ec_sensors_data *ec)
577
+
static void fill_ec_registers(struct ec_sensors_data *ec)
618
578
{
619
579
const struct ec_sensor_info *si;
620
580
unsigned int i, j, register_idx = 0;
···
629
589
}
630
590
}
631
591
632
-
static int __init setup_lock_data(struct device *dev)
592
+
static int setup_lock_data(struct device *dev)
633
593
{
634
594
const char *mutex_path;
635
595
int status;
···
852
812
return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
853
813
}
854
814
855
-
static int __init
815
+
static int
856
816
asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
857
817
struct device *dev, int num,
858
818
enum hwmon_sensor_types type, u32 config)
···
881
841
.ops = &asus_ec_hwmon_ops,
882
842
};
883
843
884
-
static const struct ec_board_info * __init get_board_info(void)
844
+
static const struct ec_board_info *get_board_info(void)
885
845
{
886
-
const char *dmi_board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
887
-
const char *dmi_board_name = dmi_get_system_info(DMI_BOARD_NAME);
888
-
const struct ec_board_info *board;
846
+
const struct dmi_system_id *dmi_entry;
889
847
890
-
if (!dmi_board_vendor || !dmi_board_name ||
891
-
strcasecmp(dmi_board_vendor, "ASUSTeK COMPUTER INC."))
892
-
return NULL;
893
-
894
-
for (board = board_info; board->sensors; board++) {
895
-
if (match_string(board->board_names,
896
-
MAX_IDENTICAL_BOARD_VARIATIONS,
897
-
dmi_board_name) >= 0)
898
-
return board;
899
-
}
900
-
901
-
return NULL;
848
+
dmi_entry = dmi_first_match(dmi_table);
849
+
return dmi_entry ? dmi_entry->driver_data : NULL;
902
850
}
903
851
904
-
static int __init asus_ec_probe(struct platform_device *pdev)
852
+
static int asus_ec_probe(struct platform_device *pdev)
905
853
{
906
854
const struct hwmon_channel_info **ptr_asus_ec_ci;
907
855
int nr_count[hwmon_max] = { 0 }, nr_types = 0;
···
998
970
return PTR_ERR_OR_ZERO(hwdev);
999
971
}
1000
972
1001
-
1002
-
static const struct acpi_device_id acpi_ec_ids[] = {
1003
-
/* Embedded Controller Device */
1004
-
{ "PNP0C09", 0 },
1005
-
{}
1006
-
};
973
+
MODULE_DEVICE_TABLE(dmi, dmi_table);
1007
974
1008
975
static struct platform_driver asus_ec_sensors_platform_driver = {
1009
976
.driver = {
1010
977
.name = "asus-ec-sensors",
1011
-
.acpi_match_table = acpi_ec_ids,
1012
978
},
979
+
.probe = asus_ec_probe,
1013
980
};
1014
981
1015
-
MODULE_DEVICE_TABLE(acpi, acpi_ec_ids);
1016
-
/*
1017
-
* we use module_platform_driver_probe() rather than module_platform_driver()
1018
-
* because the probe function (and its dependants) are marked with __init, which
1019
-
* means we can't put it into the .probe member of the platform_driver struct
1020
-
* above, and we can't mark the asus_ec_sensors_platform_driver object as __init
1021
-
* because the object is referenced from the module exit code.
1022
-
*/
1023
-
module_platform_driver_probe(asus_ec_sensors_platform_driver, asus_ec_probe);
982
+
static struct platform_device *asus_ec_sensors_platform_device;
983
+
984
+
static int __init asus_ec_init(void)
985
+
{
986
+
asus_ec_sensors_platform_device =
987
+
platform_create_bundle(&asus_ec_sensors_platform_driver,
988
+
asus_ec_probe, NULL, 0, NULL, 0);
989
+
990
+
if (IS_ERR(asus_ec_sensors_platform_device))
991
+
return PTR_ERR(asus_ec_sensors_platform_device);
992
+
993
+
return 0;
994
+
}
995
+
996
+
static void __exit asus_ec_exit(void)
997
+
{
998
+
platform_device_unregister(asus_ec_sensors_platform_device);
999
+
platform_driver_unregister(&asus_ec_sensors_platform_driver);
1000
+
}
1001
+
1002
+
module_init(asus_ec_init);
1003
+
module_exit(asus_ec_exit);
1024
1004
1025
1005
module_param_named(mutex_path, mutex_path_override, charp, 0);
1026
1006
MODULE_PARM_DESC(mutex_path,
+50
-22
drivers/hwmon/mr75203.c
+50
-22
drivers/hwmon/mr75203.c
···
68
68
69
69
/* VM Individual Macro Register */
70
70
#define VM_COM_REG_SIZE 0x200
71
-
#define VM_SDIF_DONE(n) (VM_COM_REG_SIZE + 0x34 + 0x200 * (n))
72
-
#define VM_SDIF_DATA(n) (VM_COM_REG_SIZE + 0x40 + 0x200 * (n))
71
+
#define VM_SDIF_DONE(vm) (VM_COM_REG_SIZE + 0x34 + 0x200 * (vm))
72
+
#define VM_SDIF_DATA(vm, ch) \
73
+
(VM_COM_REG_SIZE + 0x40 + 0x200 * (vm) + 0x4 * (ch))
73
74
74
75
/* SDA Slave Register */
75
76
#define IP_CTRL 0x00
···
116
115
u32 t_num;
117
116
u32 p_num;
118
117
u32 v_num;
118
+
u32 c_num;
119
119
u32 ip_freq;
120
120
u8 *vm_idx;
121
121
};
···
180
178
{
181
179
struct pvt_device *pvt = dev_get_drvdata(dev);
182
180
struct regmap *v_map = pvt->v_map;
181
+
u8 vm_idx, ch_idx;
183
182
u32 n, stat;
184
-
u8 vm_idx;
185
183
int ret;
186
184
187
-
if (channel >= pvt->v_num)
185
+
if (channel >= pvt->v_num * pvt->c_num)
188
186
return -EINVAL;
189
187
190
-
vm_idx = pvt->vm_idx[channel];
188
+
vm_idx = pvt->vm_idx[channel / pvt->c_num];
189
+
ch_idx = channel % pvt->c_num;
191
190
192
191
switch (attr) {
193
192
case hwmon_in_input:
···
199
196
if (ret)
200
197
return ret;
201
198
202
-
ret = regmap_read(v_map, VM_SDIF_DATA(vm_idx), &n);
199
+
ret = regmap_read(v_map, VM_SDIF_DATA(vm_idx, ch_idx), &n);
203
200
if(ret < 0)
204
201
return ret;
205
202
206
203
n &= SAMPLE_DATA_MSK;
207
-
/* Convert the N bitstream count into voltage */
208
-
*val = (PVT_N_CONST * n - PVT_R_CONST) >> PVT_CONV_BITS;
204
+
/*
205
+
* Convert the N bitstream count into voltage.
206
+
* To support negative voltage calculation for 64bit machines
207
+
* n must be cast to long, since n and *val differ both in
208
+
* signedness and in size.
209
+
* Division is used instead of right shift, because for signed
210
+
* numbers, the sign bit is used to fill the vacated bit
211
+
* positions, and if the number is negative, 1 is used.
212
+
* BIT(x) may not be used instead of (1 << x) because it's
213
+
* unsigned.
214
+
*/
215
+
*val = (PVT_N_CONST * (long)n - PVT_R_CONST) / (1 << PVT_CONV_BITS);
209
216
210
217
return 0;
211
218
default:
···
388
375
if (ret)
389
376
return ret;
390
377
378
+
val = (BIT(pvt->c_num) - 1) | VM_CH_INIT |
379
+
IP_POLL << SDIF_ADDR_SFT | SDIF_WRN_W | SDIF_PROG;
380
+
ret = regmap_write(v_map, SDIF_W, val);
381
+
if (ret < 0)
382
+
return ret;
383
+
384
+
ret = regmap_read_poll_timeout(v_map, SDIF_STAT,
385
+
val, !(val & SDIF_BUSY),
386
+
PVT_POLL_DELAY_US,
387
+
PVT_POLL_TIMEOUT_US);
388
+
if (ret)
389
+
return ret;
390
+
391
391
val = CFG1_VOL_MEAS_MODE | CFG1_PARALLEL_OUT |
392
392
CFG1_14_BIT | IP_CFG << SDIF_ADDR_SFT |
393
393
SDIF_WRN_W | SDIF_PROG;
···
515
489
516
490
static int mr75203_probe(struct platform_device *pdev)
517
491
{
492
+
u32 ts_num, vm_num, pd_num, ch_num, val, index, i;
518
493
const struct hwmon_channel_info **pvt_info;
519
-
u32 ts_num, vm_num, pd_num, val, index, i;
520
494
struct device *dev = &pdev->dev;
521
495
u32 *temp_config, *in_config;
522
496
struct device *hwmon_dev;
···
557
531
ts_num = (val & TS_NUM_MSK) >> TS_NUM_SFT;
558
532
pd_num = (val & PD_NUM_MSK) >> PD_NUM_SFT;
559
533
vm_num = (val & VM_NUM_MSK) >> VM_NUM_SFT;
534
+
ch_num = (val & CH_NUM_MSK) >> CH_NUM_SFT;
560
535
pvt->t_num = ts_num;
561
536
pvt->p_num = pd_num;
562
537
pvt->v_num = vm_num;
538
+
pvt->c_num = ch_num;
563
539
val = 0;
564
540
if (ts_num)
565
541
val++;
···
598
570
}
599
571
600
572
if (vm_num) {
601
-
u32 num = vm_num;
573
+
u32 total_ch;
602
574
603
575
ret = pvt_get_regmap(pdev, "vm", pvt);
604
576
if (ret)
···
612
584
ret = device_property_read_u8_array(dev, "intel,vm-map",
613
585
pvt->vm_idx, vm_num);
614
586
if (ret) {
615
-
num = 0;
587
+
/*
588
+
* Incase intel,vm-map property is not defined, we
589
+
* assume incremental channel numbers.
590
+
*/
591
+
for (i = 0; i < vm_num; i++)
592
+
pvt->vm_idx[i] = i;
616
593
} else {
617
594
for (i = 0; i < vm_num; i++)
618
595
if (pvt->vm_idx[i] >= vm_num ||
619
596
pvt->vm_idx[i] == 0xff) {
620
-
num = i;
597
+
pvt->v_num = i;
598
+
vm_num = i;
621
599
break;
622
600
}
623
601
}
624
602
625
-
/*
626
-
* Incase intel,vm-map property is not defined, we assume
627
-
* incremental channel numbers.
628
-
*/
629
-
for (i = num; i < vm_num; i++)
630
-
pvt->vm_idx[i] = i;
631
-
632
-
in_config = devm_kcalloc(dev, num + 1,
603
+
total_ch = ch_num * vm_num;
604
+
in_config = devm_kcalloc(dev, total_ch + 1,
633
605
sizeof(*in_config), GFP_KERNEL);
634
606
if (!in_config)
635
607
return -ENOMEM;
636
608
637
-
memset32(in_config, HWMON_I_INPUT, num);
638
-
in_config[num] = 0;
609
+
memset32(in_config, HWMON_I_INPUT, total_ch);
610
+
in_config[total_ch] = 0;
639
611
pvt_in.config = in_config;
640
612
641
613
pvt_info[index++] = &pvt_in;
+6
-4
drivers/hwmon/tps23861.c
+6
-4
drivers/hwmon/tps23861.c
···
493
493
494
494
static int tps23861_port_resistance(struct tps23861_data *data, int port)
495
495
{
496
-
u16 regval;
496
+
unsigned int raw_val;
497
+
__le16 regval;
497
498
498
499
regmap_bulk_read(data->regmap,
499
500
PORT_1_RESISTANCE_LSB + PORT_N_RESISTANCE_LSB_OFFSET * (port - 1),
500
501
®val,
501
502
2);
502
503
503
-
switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, regval)) {
504
+
raw_val = le16_to_cpu(regval);
505
+
switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, raw_val)) {
504
506
case PORT_RESISTANCE_RSN_OTHER:
505
-
return (FIELD_GET(PORT_RESISTANCE_MASK, regval) * RESISTANCE_LSB) / 10000;
507
+
return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB) / 10000;
506
508
case PORT_RESISTANCE_RSN_LOW:
507
-
return (FIELD_GET(PORT_RESISTANCE_MASK, regval) * RESISTANCE_LSB_LOW) / 10000;
509
+
return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB_LOW) / 10000;
508
510
case PORT_RESISTANCE_RSN_SHORT:
509
511
case PORT_RESISTANCE_RSN_OPEN:
510
512
default: