tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

riscv: asm: use .insn for making custom instructions

The assembler has .insn for building custom instructions
now, so change the .4byte to .insn. This ensures the output
is marked as an instruction and not as data which may
confuse both debuggers and anything else that relies on
this sort of marking.

Add an ASM_INSN_I() wrapper in asm.h to allow the selecting
of how this is output so older assemblers are still good.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Link: https://lore.kernel.org/r/20251024171640.65232-1-ben.dooks@codethink.co.uk
Signed-off-by: Paul Walmsley <pjw@kernel.org>

authored by

Ben Dooks and committed by
Paul Walmsley 44aa25c0 5fada160

+13 -7
+6
arch/riscv/include/asm/asm.h
··· 12 12 #define __ASM_STR(x) #x 13 13 #endif 14 14 15 + #ifdef CONFIG_AS_HAS_INSN 16 + #define ASM_INSN_I(__x) ".insn " __x 17 + #else 18 + #define ASM_INSN_I(__x) ".4byte " __x 19 + #endif 20 + 15 21 #if __riscv_xlen == 64 16 22 #define __REG_SEL(a, b) __ASM_STR(a) 17 23 #elif __riscv_xlen == 32
+4 -4
arch/riscv/include/asm/insn-def.h
··· 256 256 INSN_S(OPCODE_OP_IMM, FUNC3(6), __RS2(3), \ 257 257 SIMM12((offset) & 0xfe0), RS1(base)) 258 258 259 - #define RISCV_PAUSE ".4byte 0x100000f" 260 - #define ZAWRS_WRS_NTO ".4byte 0x00d00073" 261 - #define ZAWRS_WRS_STO ".4byte 0x01d00073" 262 - #define RISCV_NOP4 ".4byte 0x00000013" 259 + #define RISCV_PAUSE ASM_INSN_I("0x100000f") 260 + #define ZAWRS_WRS_NTO ASM_INSN_I("0x00d00073") 261 + #define ZAWRS_WRS_STO ASM_INSN_I("0x01d00073") 262 + #define RISCV_NOP4 ASM_INSN_I("0x00000013") 263 263 264 264 #define RISCV_INSN_NOP4 _AC(0x00000013, U) 265 265
+3 -3
arch/riscv/include/asm/vendor_extensions/mips.h
··· 30 30 * allowing any subsequent instructions to fetch. 31 31 */ 32 32 33 - #define MIPS_PAUSE ".4byte 0x00501013\n\t" 34 - #define MIPS_EHB ".4byte 0x00301013\n\t" 35 - #define MIPS_IHB ".4byte 0x00101013\n\t" 33 + #define MIPS_PAUSE ASM_INSN_I("0x00501013\n\t") 34 + #define MIPS_EHB ASM_INSN_I("0x00301013\n\t") 35 + #define MIPS_IHB ASM_INSN_I("0x00101013\n\t") 36 36 37 37 #endif // _ASM_RISCV_VENDOR_EXTENSIONS_MIPS_H