Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
PCIe: ASPM: Break out of endless loop waiting for PCI config bits to switch
PCI: stop leaking 'slot_name' in pci_create_slot
+27
-3
+26
-3
drivers/pci/pcie/aspm.c
+26
-3
drivers/pci/pcie/aspm.c
···
16
16
#include <linux/pm.h>
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17
#include <linux/init.h>
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18
#include <linux/slab.h>
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+
#include <linux/jiffies.h>
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#include <linux/pci-aspm.h>
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#include "../pci.h"
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22
···
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*/
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static void pcie_aspm_configure_common_clock(struct pci_dev *pdev)
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{
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-
int pos, child_pos;
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+
int pos, child_pos, i = 0;
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u16 reg16 = 0;
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struct pci_dev *child_dev;
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int same_clock = 1;
169
-
168
+
unsigned long start_jiffies;
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+
u16 child_regs[8], parent_reg;
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/*
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* all functions of a slot should have the same Slot Clock
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* Configuration, so just check one function
···
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191
child_pos = pci_find_capability(child_dev, PCI_CAP_ID_EXP);
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pci_read_config_word(child_dev, child_pos + PCI_EXP_LNKCTL,
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®16);
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+
child_regs[i] = reg16;
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if (same_clock)
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reg16 |= PCI_EXP_LNKCTL_CCC;
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else
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reg16 &= ~PCI_EXP_LNKCTL_CCC;
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pci_write_config_word(child_dev, child_pos + PCI_EXP_LNKCTL,
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reg16);
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+
i++;
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}
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/* Configure upstream component */
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pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16);
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+
parent_reg = reg16;
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207
if (same_clock)
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reg16 |= PCI_EXP_LNKCTL_CCC;
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209
else
···
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pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
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213
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/* Wait for link training end */
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-
while (1) {
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+
/* break out after waiting for 1 second */
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+
start_jiffies = jiffies;
217
+
while ((jiffies - start_jiffies) < HZ) {
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pci_read_config_word(pdev, pos + PCI_EXP_LNKSTA, ®16);
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if (!(reg16 & PCI_EXP_LNKSTA_LT))
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220
break;
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221
cpu_relax();
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+
}
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+
/* training failed -> recover */
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+
if ((jiffies - start_jiffies) >= HZ) {
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+
dev_printk (KERN_ERR, &pdev->dev, "ASPM: Could not configure"
226
+
" common clock\n");
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+
i = 0;
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+
list_for_each_entry(child_dev, &pdev->subordinate->devices,
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+
bus_list) {
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+
child_pos = pci_find_capability(child_dev,
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+
PCI_CAP_ID_EXP);
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+
pci_write_config_word(child_dev,
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+
child_pos + PCI_EXP_LNKCTL,
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+
child_regs[i]);
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+
i++;
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+
}
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+
pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, parent_reg);
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}
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}
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