Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

-40

arch/mips/alchemy/devboards/db1200/setup.c

··· 60 60 wmb(); 61 61 } 62 62 63 - /* use the hexleds to count the number of times the cpu has entered 64 - * wait, the dots to indicate whether the CPU is currently idle or 65 - * active (dots off = sleeping, dots on = working) for cases where 66 - * the number doesn't change for a long(er) period of time. 67 - */ 68 - static void db1200_wait(void) 69 - { 70 - __asm__(" .set push \n" 71 - " .set mips3 \n" 72 - " .set noreorder \n" 73 - " cache 0x14, 0(%0) \n" 74 - " cache 0x14, 32(%0) \n" 75 - " cache 0x14, 64(%0) \n" 76 - /* dots off: we're about to call wait */ 77 - " lui $26, 0xb980 \n" 78 - " ori $27, $0, 3 \n" 79 - " sb $27, 0x18($26) \n" 80 - " sync \n" 81 - " nop \n" 82 - " wait \n" 83 - " nop \n" 84 - " nop \n" 85 - " nop \n" 86 - " nop \n" 87 - " nop \n" 88 - /* dots on: there's work to do, increment cntr */ 89 - " lui $26, 0xb980 \n" 90 - " sb $0, 0x18($26) \n" 91 - " lui $26, 0xb9c0 \n" 92 - " lb $27, 0($26) \n" 93 - " addiu $27, $27, 1 \n" 94 - " sb $27, 0($26) \n" 95 - " sync \n" 96 - " .set pop \n" 97 - : : "r" (db1200_wait)); 98 - } 99 - 100 63 static int __init db1200_arch_init(void) 101 64 { 102 65 /* GPIO7 is low-level triggered CPLD cascade */ ··· 72 109 */ 73 110 irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN; 74 111 irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN; 75 - 76 - if (cpu_wait) 77 - cpu_wait = db1200_wait; 78 112 79 113 return 0; 80 114 }

+2 -1

arch/mips/ar7/platform.c

··· 168 168 .on = vlynq_on, 169 169 .off = vlynq_off, 170 170 }, 171 - .reset_bit = 26, 171 + .reset_bit = 16, 172 172 .gpio_bit = 19, 173 173 }; 174 174 ··· 600 600 } 601 601 602 602 if (ar7_has_high_cpmac()) { 603 + res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); 603 604 if (!res) { 604 605 cpmac_get_mac(1, cpmac_high_data.dev_addr); 605 606

+147 -84

arch/mips/bcm63xx/boards/board_bcm963xx.c

··· 18 18 #include <asm/addrspace.h> 19 19 #include <bcm63xx_board.h> 20 20 #include <bcm63xx_cpu.h> 21 + #include <bcm63xx_dev_uart.h> 21 22 #include <bcm63xx_regs.h> 22 23 #include <bcm63xx_io.h> 23 24 #include <bcm63xx_dev_pci.h> ··· 41 40 .name = "96338GW", 42 41 .expected_cpu_id = 0x6338, 43 42 43 + .has_uart0 = 1, 44 44 .has_enet0 = 1, 45 45 .enet0 = { 46 46 .force_speed_100 = 1, ··· 84 82 .name = "96338W", 85 83 .expected_cpu_id = 0x6338, 86 84 85 + .has_uart0 = 1, 87 86 .has_enet0 = 1, 88 87 .enet0 = { 89 88 .force_speed_100 = 1, ··· 129 126 static struct board_info __initdata board_96345gw2 = { 130 127 .name = "96345GW2", 131 128 .expected_cpu_id = 0x6345, 129 + 130 + .has_uart0 = 1, 132 131 }; 133 132 #endif 134 133 ··· 142 137 .name = "96348R", 143 138 .expected_cpu_id = 0x6348, 144 139 140 + .has_uart0 = 1, 145 141 .has_enet0 = 1, 146 142 .has_pci = 1, 147 143 ··· 186 180 .name = "96348GW-10", 187 181 .expected_cpu_id = 0x6348, 188 182 183 + .has_uart0 = 1, 189 184 .has_enet0 = 1, 190 185 .has_enet1 = 1, 191 186 .has_pci = 1, ··· 246 239 .name = "96348GW-11", 247 240 .expected_cpu_id = 0x6348, 248 241 242 + .has_uart0 = 1, 249 243 .has_enet0 = 1, 250 244 .has_enet1 = 1, 251 245 .has_pci = 1, ··· 300 292 .name = "96348GW", 301 293 .expected_cpu_id = 0x6348, 302 294 295 + .has_uart0 = 1, 303 296 .has_enet0 = 1, 304 297 .has_enet1 = 1, 305 298 .has_pci = 1, ··· 358 349 .name = "F@ST2404", 359 350 .expected_cpu_id = 0x6348, 360 351 361 - .has_enet0 = 1, 362 - .has_enet1 = 1, 363 - .has_pci = 1, 352 + .has_uart0 = 1, 353 + .has_enet0 = 1, 354 + .has_enet1 = 1, 355 + .has_pci = 1, 364 356 365 357 .enet0 = { 366 358 .has_phy = 1, ··· 378 368 .has_ehci0 = 1, 379 369 }; 380 370 371 + static struct board_info __initdata board_rta1025w_16 = { 372 + .name = "RTA1025W_16", 373 + .expected_cpu_id = 0x6348, 374 + 375 + .has_enet0 = 1, 376 + .has_enet1 = 1, 377 + .has_pci = 1, 378 + 379 + .enet0 = { 380 + .has_phy = 1, 381 + .use_internal_phy = 1, 382 + }, 383 + .enet1 = { 384 + .force_speed_100 = 1, 385 + .force_duplex_full = 1, 386 + }, 387 + }; 388 + 389 + 381 390 static struct board_info __initdata board_DV201AMR = { 382 391 .name = "DV201AMR", 383 392 .expected_cpu_id = 0x6348, 384 393 394 + .has_uart0 = 1, 385 395 .has_pci = 1, 386 396 .has_ohci0 = 1, 387 397 ··· 421 391 .name = "96348GW-A", 422 392 .expected_cpu_id = 0x6348, 423 393 394 + .has_uart0 = 1, 424 395 .has_enet0 = 1, 425 396 .has_enet1 = 1, 426 397 .has_pci = 1, ··· 447 416 .name = "96358VW", 448 417 .expected_cpu_id = 0x6358, 449 418 419 + .has_uart0 = 1, 450 420 .has_enet0 = 1, 451 421 .has_enet1 = 1, 452 422 .has_pci = 1, ··· 499 467 .name = "96358VW2", 500 468 .expected_cpu_id = 0x6358, 501 469 470 + .has_uart0 = 1, 502 471 .has_enet0 = 1, 503 472 .has_enet1 = 1, 504 473 .has_pci = 1, ··· 547 514 .name = "AGPF-S0", 548 515 .expected_cpu_id = 0x6358, 549 516 517 + .has_uart0 = 1, 550 518 .has_enet0 = 1, 551 519 .has_enet1 = 1, 552 520 .has_pci = 1, ··· 564 530 565 531 .has_ohci0 = 1, 566 532 .has_ehci0 = 1, 533 + }; 534 + 535 + static struct board_info __initdata board_DWVS0 = { 536 + .name = "DWV-S0", 537 + .expected_cpu_id = 0x6358, 538 + 539 + .has_enet0 = 1, 540 + .has_enet1 = 1, 541 + .has_pci = 1, 542 + 543 + .enet0 = { 544 + .has_phy = 1, 545 + .use_internal_phy = 1, 546 + }, 547 + 548 + .enet1 = { 549 + .force_speed_100 = 1, 550 + .force_duplex_full = 1, 551 + }, 552 + 553 + .has_ohci0 = 1, 567 554 }; 568 555 #endif 569 556 ··· 607 552 &board_FAST2404, 608 553 &board_DV201AMR, 609 554 &board_96348gw_a, 555 + &board_rta1025w_16, 610 556 #endif 611 557 612 558 #ifdef CONFIG_BCM63XX_CPU_6358 613 559 &board_96358vw, 614 560 &board_96358vw2, 615 561 &board_AGPFS0, 562 + &board_DWVS0, 616 563 #endif 617 564 }; 565 + 566 + /* 567 + * Register a sane SPROMv2 to make the on-board 568 + * bcm4318 WLAN work 569 + */ 570 + #ifdef CONFIG_SSB_PCIHOST 571 + static struct ssb_sprom bcm63xx_sprom = { 572 + .revision = 0x02, 573 + .board_rev = 0x17, 574 + .country_code = 0x0, 575 + .ant_available_bg = 0x3, 576 + .pa0b0 = 0x15ae, 577 + .pa0b1 = 0xfa85, 578 + .pa0b2 = 0xfe8d, 579 + .pa1b0 = 0xffff, 580 + .pa1b1 = 0xffff, 581 + .pa1b2 = 0xffff, 582 + .gpio0 = 0xff, 583 + .gpio1 = 0xff, 584 + .gpio2 = 0xff, 585 + .gpio3 = 0xff, 586 + .maxpwr_bg = 0x004c, 587 + .itssi_bg = 0x00, 588 + .boardflags_lo = 0x2848, 589 + .boardflags_hi = 0x0000, 590 + }; 591 + #endif 592 + 593 + /* 594 + * return board name for /proc/cpuinfo 595 + */ 596 + const char *board_get_name(void) 597 + { 598 + return board.name; 599 + } 600 + 601 + /* 602 + * register & return a new board mac address 603 + */ 604 + static int board_get_mac_address(u8 *mac) 605 + { 606 + u8 *p; 607 + int count; 608 + 609 + if (mac_addr_used >= nvram.mac_addr_count) { 610 + printk(KERN_ERR PFX "not enough mac address\n"); 611 + return -ENODEV; 612 + } 613 + 614 + memcpy(mac, nvram.mac_addr_base, ETH_ALEN); 615 + p = mac + ETH_ALEN - 1; 616 + count = mac_addr_used; 617 + 618 + while (count--) { 619 + do { 620 + (*p)++; 621 + if (*p != 0) 622 + break; 623 + p--; 624 + } while (p != mac); 625 + } 626 + 627 + if (p == mac) { 628 + printk(KERN_ERR PFX "unable to fetch mac address\n"); 629 + return -ENODEV; 630 + } 631 + 632 + mac_addr_used++; 633 + return 0; 634 + } 618 635 619 636 /* 620 637 * early init callback, read nvram data from flash and checksum it ··· 786 659 } 787 660 788 661 bcm_gpio_writel(val, GPIO_MODE_REG); 662 + 663 + /* Generate MAC address for WLAN and 664 + * register our SPROM */ 665 + #ifdef CONFIG_SSB_PCIHOST 666 + if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { 667 + memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); 668 + memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); 669 + if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) 670 + printk(KERN_ERR "failed to register fallback SPROM\n"); 671 + } 672 + #endif 789 673 } 790 674 791 675 /* ··· 812 674 /* make sure we're running on expected cpu */ 813 675 if (bcm63xx_get_cpu_id() != board.expected_cpu_id) 814 676 panic("unexpected CPU for bcm963xx board"); 815 - } 816 - 817 - /* 818 - * return board name for /proc/cpuinfo 819 - */ 820 - const char *board_get_name(void) 821 - { 822 - return board.name; 823 - } 824 - 825 - /* 826 - * register & return a new board mac address 827 - */ 828 - static int board_get_mac_address(u8 *mac) 829 - { 830 - u8 *p; 831 - int count; 832 - 833 - if (mac_addr_used >= nvram.mac_addr_count) { 834 - printk(KERN_ERR PFX "not enough mac address\n"); 835 - return -ENODEV; 836 - } 837 - 838 - memcpy(mac, nvram.mac_addr_base, ETH_ALEN); 839 - p = mac + ETH_ALEN - 1; 840 - count = mac_addr_used; 841 - 842 - while (count--) { 843 - do { 844 - (*p)++; 845 - if (*p != 0) 846 - break; 847 - p--; 848 - } while (p != mac); 849 - } 850 - 851 - if (p == mac) { 852 - printk(KERN_ERR PFX "unable to fetch mac address\n"); 853 - return -ENODEV; 854 - } 855 - 856 - mac_addr_used++; 857 - return 0; 858 677 } 859 678 860 679 static struct mtd_partition mtd_partitions[] = { ··· 845 750 }, 846 751 }; 847 752 848 - /* 849 - * Register a sane SPROMv2 to make the on-board 850 - * bcm4318 WLAN work 851 - */ 852 - #ifdef CONFIG_SSB_PCIHOST 853 - static struct ssb_sprom bcm63xx_sprom = { 854 - .revision = 0x02, 855 - .board_rev = 0x17, 856 - .country_code = 0x0, 857 - .ant_available_bg = 0x3, 858 - .pa0b0 = 0x15ae, 859 - .pa0b1 = 0xfa85, 860 - .pa0b2 = 0xfe8d, 861 - .pa1b0 = 0xffff, 862 - .pa1b1 = 0xffff, 863 - .pa1b2 = 0xffff, 864 - .gpio0 = 0xff, 865 - .gpio1 = 0xff, 866 - .gpio2 = 0xff, 867 - .gpio3 = 0xff, 868 - .maxpwr_bg = 0x004c, 869 - .itssi_bg = 0x00, 870 - .boardflags_lo = 0x2848, 871 - .boardflags_hi = 0x0000, 872 - }; 873 - #endif 874 - 875 753 static struct gpio_led_platform_data bcm63xx_led_data; 876 754 877 755 static struct platform_device bcm63xx_gpio_leds = { ··· 860 792 { 861 793 u32 val; 862 794 795 + if (board.has_uart0) 796 + bcm63xx_uart_register(0); 797 + 798 + if (board.has_uart1) 799 + bcm63xx_uart_register(1); 800 + 863 801 if (board.has_pccard) 864 802 bcm63xx_pcmcia_register(); 865 803 ··· 879 805 880 806 if (board.has_dsp) 881 807 bcm63xx_dsp_register(&board.dsp); 882 - 883 - /* Generate MAC address for WLAN and 884 - * register our SPROM */ 885 - #ifdef CONFIG_SSB_PCIHOST 886 - if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { 887 - memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); 888 - memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); 889 - if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) 890 - printk(KERN_ERR "failed to register fallback SPROM\n"); 891 - } 892 - #endif 893 808 894 809 /* read base address of boot chip select (0) */ 895 810 if (BCMCPU_IS_6345())

+5

arch/mips/bcm63xx/cpu.c

··· 36 36 [RSET_TIMER] = BCM_6338_TIMER_BASE, 37 37 [RSET_WDT] = BCM_6338_WDT_BASE, 38 38 [RSET_UART0] = BCM_6338_UART0_BASE, 39 + [RSET_UART1] = BCM_6338_UART1_BASE, 39 40 [RSET_GPIO] = BCM_6338_GPIO_BASE, 40 41 [RSET_SPI] = BCM_6338_SPI_BASE, 41 42 [RSET_OHCI0] = BCM_6338_OHCI0_BASE, ··· 73 72 [RSET_TIMER] = BCM_6345_TIMER_BASE, 74 73 [RSET_WDT] = BCM_6345_WDT_BASE, 75 74 [RSET_UART0] = BCM_6345_UART0_BASE, 75 + [RSET_UART1] = BCM_6345_UART1_BASE, 76 76 [RSET_GPIO] = BCM_6345_GPIO_BASE, 77 77 [RSET_SPI] = BCM_6345_SPI_BASE, 78 78 [RSET_UDC0] = BCM_6345_UDC0_BASE, ··· 111 109 [RSET_TIMER] = BCM_6348_TIMER_BASE, 112 110 [RSET_WDT] = BCM_6348_WDT_BASE, 113 111 [RSET_UART0] = BCM_6348_UART0_BASE, 112 + [RSET_UART1] = BCM_6348_UART1_BASE, 114 113 [RSET_GPIO] = BCM_6348_GPIO_BASE, 115 114 [RSET_SPI] = BCM_6348_SPI_BASE, 116 115 [RSET_OHCI0] = BCM_6348_OHCI0_BASE, ··· 153 150 [RSET_TIMER] = BCM_6358_TIMER_BASE, 154 151 [RSET_WDT] = BCM_6358_WDT_BASE, 155 152 [RSET_UART0] = BCM_6358_UART0_BASE, 153 + [RSET_UART1] = BCM_6358_UART1_BASE, 156 154 [RSET_GPIO] = BCM_6358_GPIO_BASE, 157 155 [RSET_SPI] = BCM_6358_SPI_BASE, 158 156 [RSET_OHCI0] = BCM_6358_OHCI0_BASE, ··· 174 170 static const int bcm96358_irqs[] = { 175 171 [IRQ_TIMER] = BCM_6358_TIMER_IRQ, 176 172 [IRQ_UART0] = BCM_6358_UART0_IRQ, 173 + [IRQ_UART1] = BCM_6358_UART1_IRQ, 177 174 [IRQ_DSL] = BCM_6358_DSL_IRQ, 178 175 [IRQ_ENET0] = BCM_6358_ENET0_IRQ, 179 176 [IRQ_ENET1] = BCM_6358_ENET1_IRQ,

+50 -16

arch/mips/bcm63xx/dev-uart.c

··· 11 11 #include <linux/platform_device.h> 12 12 #include <bcm63xx_cpu.h> 13 13 14 - static struct resource uart_resources[] = { 14 + static struct resource uart0_resources[] = { 15 15 { 16 - .start = -1, /* filled at runtime */ 17 - .end = -1, /* filled at runtime */ 16 + /* start & end filled at runtime */ 18 17 .flags = IORESOURCE_MEM, 19 18 }, 20 19 { 21 - .start = -1, /* filled at runtime */ 20 + /* start filled at runtime */ 22 21 .flags = IORESOURCE_IRQ, 23 22 }, 24 23 }; 25 24 26 - static struct platform_device bcm63xx_uart_device = { 27 - .name = "bcm63xx_uart", 28 - .id = 0, 29 - .num_resources = ARRAY_SIZE(uart_resources), 30 - .resource = uart_resources, 25 + static struct resource uart1_resources[] = { 26 + { 27 + /* start & end filled at runtime */ 28 + .flags = IORESOURCE_MEM, 29 + }, 30 + { 31 + /* start filled at runtime */ 32 + .flags = IORESOURCE_IRQ, 33 + }, 31 34 }; 32 35 33 - int __init bcm63xx_uart_register(void) 36 + static struct platform_device bcm63xx_uart_devices[] = { 37 + { 38 + .name = "bcm63xx_uart", 39 + .id = 0, 40 + .num_resources = ARRAY_SIZE(uart0_resources), 41 + .resource = uart0_resources, 42 + }, 43 + 44 + { 45 + .name = "bcm63xx_uart", 46 + .id = 1, 47 + .num_resources = ARRAY_SIZE(uart1_resources), 48 + .resource = uart1_resources, 49 + } 50 + }; 51 + 52 + int __init bcm63xx_uart_register(unsigned int id) 34 53 { 35 - uart_resources[0].start = bcm63xx_regset_address(RSET_UART0); 36 - uart_resources[0].end = uart_resources[0].start; 37 - uart_resources[0].end += RSET_UART_SIZE - 1; 38 - uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); 39 - return platform_device_register(&bcm63xx_uart_device); 54 + if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) 55 + return -ENODEV; 56 + 57 + if (id == 1 && !BCMCPU_IS_6358()) 58 + return -ENODEV; 59 + 60 + if (id == 0) { 61 + uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0); 62 + uart0_resources[0].end = uart0_resources[0].start + 63 + RSET_UART_SIZE - 1; 64 + uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); 65 + } 66 + 67 + if (id == 1) { 68 + uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1); 69 + uart1_resources[0].end = uart1_resources[0].start + 70 + RSET_UART_SIZE - 1; 71 + uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1); 72 + } 73 + 74 + return platform_device_register(&bcm63xx_uart_devices[id]); 40 75 } 41 - arch_initcall(bcm63xx_uart_register);

+2 -2

arch/mips/bcm63xx/gpio.c

··· 125 125 126 126 int __init bcm63xx_gpio_init(void) 127 127 { 128 + gpio_out_low = bcm_gpio_readl(GPIO_DATA_LO_REG); 129 + gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG); 128 130 bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); 129 131 pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); 130 132 131 133 return gpiochip_add(&bcm63xx_gpio_chip); 132 134 } 133 - 134 - arch_initcall(bcm63xx_gpio_init);

+1 -81

arch/mips/cavium-octeon/setup.c

··· 45 45 extern void pci_console_init(const char *arg); 46 46 #endif 47 47 48 - #ifdef CONFIG_CAVIUM_RESERVE32 49 - extern uint64_t octeon_reserve32_memory; 50 - #endif 51 48 static unsigned long long MAX_MEMORY = 512ull << 20; 52 49 53 50 struct octeon_boot_descriptor *octeon_boot_desc_ptr; ··· 183 186 write_octeon_c0_dcacheerr(0); 184 187 } 185 188 186 - #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB 187 - /** 188 - * Called on every core to setup the wired tlb entry needed 189 - * if CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB is set. 190 - * 191 - */ 192 - static void octeon_hal_setup_per_cpu_reserved32(void *unused) 193 - { 194 - /* 195 - * The config has selected to wire the reserve32 memory for all 196 - * userspace applications. We need to put a wired TLB entry in for each 197 - * 512MB of reserve32 memory. We only handle double 256MB pages here, 198 - * so reserve32 must be multiple of 512MB. 199 - */ 200 - uint32_t size = CONFIG_CAVIUM_RESERVE32; 201 - uint32_t entrylo0 = 202 - 0x7 | ((octeon_reserve32_memory & ((1ul << 40) - 1)) >> 6); 203 - uint32_t entrylo1 = entrylo0 + (256 << 14); 204 - uint32_t entryhi = (0x80000000UL - (CONFIG_CAVIUM_RESERVE32 << 20)); 205 - while (size >= 512) { 206 - #if 0 207 - pr_info("CPU%d: Adding double wired TLB entry for 0x%lx\n", 208 - smp_processor_id(), entryhi); 209 - #endif 210 - add_wired_entry(entrylo0, entrylo1, entryhi, PM_256M); 211 - entrylo0 += 512 << 14; 212 - entrylo1 += 512 << 14; 213 - entryhi += 512 << 20; 214 - size -= 512; 215 - } 216 - } 217 - #endif /* CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB */ 218 - 219 - /** 220 - * Called to release the named block which was used to made sure 221 - * that nobody used the memory for something else during 222 - * init. Now we'll free it so userspace apps can use this 223 - * memory region with bootmem_alloc. 224 - * 225 - * This function is called only once from prom_free_prom_memory(). 226 - */ 227 - void octeon_hal_setup_reserved32(void) 228 - { 229 - #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB 230 - on_each_cpu(octeon_hal_setup_per_cpu_reserved32, NULL, 0, 1); 231 - #endif 232 - } 233 - 234 189 /** 235 190 * Reboot Octeon 236 191 * ··· 242 293 243 294 octeon_kill_core(NULL); 244 295 } 245 - 246 - #if 0 247 - /** 248 - * Platform time init specifics. 249 - * Returns 250 - */ 251 - void __init plat_time_init(void) 252 - { 253 - /* Nothing special here, but we are required to have one */ 254 - } 255 - 256 - #endif 257 296 258 297 /** 259 298 * Handle all the error condition interrupts that might occur. ··· 439 502 * memory when it is getting memory from the 440 503 * bootloader. Later, after the memory allocations are 441 504 * complete, the reserve32 will be freed. 442 - */ 443 - #ifdef CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB 444 - if (CONFIG_CAVIUM_RESERVE32 & 0x1ff) 445 - pr_err("CAVIUM_RESERVE32 isn't a multiple of 512MB. " 446 - "This is required if CAVIUM_RESERVE32_USE_WIRED_TLB " 447 - "is set\n"); 448 - else 449 - addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20, 450 - 0, 0, 512 << 20, 451 - "CAVIUM_RESERVE32", 0); 452 - #else 453 - /* 505 + * 454 506 * Allocate memory for RESERVED32 aligned on 2MB boundary. This 455 507 * is in case we later use hugetlb entries with it. 456 508 */ 457 509 addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20, 458 510 0, 0, 2 << 20, 459 511 "CAVIUM_RESERVE32", 0); 460 - #endif 461 512 if (addr < 0) 462 513 pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n"); 463 514 else ··· 742 817 panic("Unable to request_irq(OCTEON_IRQ_RML)\n"); 743 818 } 744 819 #endif 745 - 746 - /* This call is here so that it is performed after any TLB 747 - initializations. It needs to be after these in case the 748 - CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB option is set */ 749 - octeon_hal_setup_reserved32(); 750 820 }

-8

arch/mips/cavium-octeon/smp.c

··· 279 279 uint32_t avail_coremask; 280 280 struct cvmx_bootmem_named_block_desc *block_desc; 281 281 282 - #ifdef CONFIG_CAVIUM_OCTEON_WATCHDOG 283 - /* Disable the watchdog */ 284 - cvmx_ciu_wdogx_t ciu_wdog; 285 - ciu_wdog.u64 = cvmx_read_csr(CVMX_CIU_WDOGX(cpu)); 286 - ciu_wdog.s.mode = 0; 287 - cvmx_write_csr(CVMX_CIU_WDOGX(cpu), ciu_wdog.u64); 288 - #endif 289 - 290 282 while (per_cpu(cpu_state, cpu) != CPU_DEAD) 291 283 cpu_relax(); 292 284

+506 -206

arch/mips/configs/bigsur_defconfig

··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.26-rc8 4 - # Wed Jul 2 17:02:55 2008 3 + # Linux kernel version: 2.6.34-rc3 4 + # Sat Apr 3 16:32:11 2010 5 5 # 6 6 CONFIG_MIPS=y 7 7 ··· 9 9 # Machine selection 10 10 # 11 11 # CONFIG_MACH_ALCHEMY is not set 12 + # CONFIG_AR7 is not set 12 13 # CONFIG_BCM47XX is not set 14 + # CONFIG_BCM63XX is not set 13 15 # CONFIG_MIPS_COBALT is not set 14 16 # CONFIG_MACH_DECSTATION is not set 15 17 # CONFIG_MACH_JAZZ is not set 16 18 # CONFIG_LASAT is not set 17 - # CONFIG_LEMOTE_FULONG is not set 19 + # CONFIG_MACH_LOONGSON is not set 18 20 # CONFIG_MIPS_MALTA is not set 19 21 # CONFIG_MIPS_SIM is not set 20 - # CONFIG_MARKEINS is not set 22 + # CONFIG_NEC_MARKEINS is not set 21 23 # CONFIG_MACH_VR41XX is not set 24 + # CONFIG_NXP_STB220 is not set 25 + # CONFIG_NXP_STB225 is not set 22 26 # CONFIG_PNX8550_JBS is not set 23 27 # CONFIG_PNX8550_STB810 is not set 24 28 # CONFIG_PMC_MSP is not set 25 29 # CONFIG_PMC_YOSEMITE is not set 30 + # CONFIG_POWERTV is not set 26 31 # CONFIG_SGI_IP22 is not set 27 32 # CONFIG_SGI_IP27 is not set 28 33 # CONFIG_SGI_IP28 is not set ··· 41 36 # CONFIG_SIBYTE_SENTOSA is not set 42 37 CONFIG_SIBYTE_BIGSUR=y 43 38 # CONFIG_SNI_RM is not set 44 - # CONFIG_TOSHIBA_JMR3927 is not set 45 - # CONFIG_TOSHIBA_RBTX4927 is not set 46 - # CONFIG_TOSHIBA_RBTX4938 is not set 39 + # CONFIG_MACH_TX39XX is not set 40 + # CONFIG_MACH_TX49XX is not set 41 + # CONFIG_MIKROTIK_RB532 is not set 47 42 # CONFIG_WR_PPMC is not set 43 + # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set 44 + # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set 45 + # CONFIG_ALCHEMY_GPIO_INDIRECT is not set 48 46 CONFIG_SIBYTE_BCM1x80=y 49 47 CONFIG_SIBYTE_SB1xxx_SOC=y 50 48 # CONFIG_CPU_SB1_PASS_1 is not set ··· 56 48 # CONFIG_CPU_SB1_PASS_4 is not set 57 49 # CONFIG_CPU_SB1_PASS_2_112x is not set 58 50 # CONFIG_CPU_SB1_PASS_3 is not set 59 - # CONFIG_SIMULATION is not set 60 51 # CONFIG_SB1_CEX_ALWAYS_FATAL is not set 61 52 # CONFIG_SB1_CERR_STALL is not set 62 - CONFIG_SIBYTE_CFE=y 63 53 # CONFIG_SIBYTE_CFE_CONSOLE is not set 64 54 # CONFIG_SIBYTE_BUS_WATCHER is not set 65 55 # CONFIG_SIBYTE_TBPROF is not set 66 56 CONFIG_SIBYTE_HAS_ZBUS_PROFILING=y 57 + CONFIG_LOONGSON_UART_BASE=y 67 58 CONFIG_RWSEM_GENERIC_SPINLOCK=y 68 59 # CONFIG_ARCH_HAS_ILOG2_U32 is not set 69 60 # CONFIG_ARCH_HAS_ILOG2_U64 is not set ··· 73 66 CONFIG_GENERIC_CLOCKEVENTS=y 74 67 CONFIG_GENERIC_TIME=y 75 68 CONFIG_GENERIC_CMOS_UPDATE=y 76 - CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 77 - # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 69 + CONFIG_SCHED_OMIT_FRAME_POINTER=y 70 + CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 78 71 CONFIG_CEVT_BCM1480=y 79 72 CONFIG_CSRC_BCM1480=y 80 73 CONFIG_CFE=y 81 74 CONFIG_DMA_COHERENT=y 82 - CONFIG_EARLY_PRINTK=y 83 75 CONFIG_SYS_HAS_EARLY_PRINTK=y 84 - # CONFIG_HOTPLUG_CPU is not set 85 76 # CONFIG_NO_IOPORT is not set 86 77 CONFIG_CPU_BIG_ENDIAN=y 87 78 # CONFIG_CPU_LITTLE_ENDIAN is not set ··· 93 88 # 94 89 # CPU selection 95 90 # 96 - # CONFIG_CPU_LOONGSON2 is not set 91 + # CONFIG_CPU_LOONGSON2E is not set 92 + # CONFIG_CPU_LOONGSON2F is not set 97 93 # CONFIG_CPU_MIPS32_R1 is not set 98 94 # CONFIG_CPU_MIPS32_R2 is not set 99 95 # CONFIG_CPU_MIPS64_R1 is not set ··· 107 101 # CONFIG_CPU_TX49XX is not set 108 102 # CONFIG_CPU_R5000 is not set 109 103 # CONFIG_CPU_R5432 is not set 104 + # CONFIG_CPU_R5500 is not set 110 105 # CONFIG_CPU_R6000 is not set 111 106 # CONFIG_CPU_NEVADA is not set 112 107 # CONFIG_CPU_R8000 is not set ··· 115 108 # CONFIG_CPU_RM7000 is not set 116 109 # CONFIG_CPU_RM9000 is not set 117 110 CONFIG_CPU_SB1=y 111 + # CONFIG_CPU_CAVIUM_OCTEON is not set 118 112 CONFIG_SYS_HAS_CPU_SB1=y 119 113 CONFIG_WEAK_ORDERING=y 120 114 CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y ··· 131 123 CONFIG_PAGE_SIZE_4KB=y 132 124 # CONFIG_PAGE_SIZE_8KB is not set 133 125 # CONFIG_PAGE_SIZE_16KB is not set 126 + # CONFIG_PAGE_SIZE_32KB is not set 134 127 # CONFIG_PAGE_SIZE_64KB is not set 135 128 # CONFIG_SIBYTE_DMA_PAGEOPS is not set 136 129 CONFIG_MIPS_MT_DISABLED=y 137 130 # CONFIG_MIPS_MT_SMP is not set 138 131 # CONFIG_MIPS_MT_SMTC is not set 132 + # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set 139 133 CONFIG_CPU_HAS_SYNC=y 140 134 CONFIG_GENERIC_HARDIRQS=y 141 135 CONFIG_GENERIC_IRQ_PROBE=y ··· 152 142 # CONFIG_SPARSEMEM_MANUAL is not set 153 143 CONFIG_FLATMEM=y 154 144 CONFIG_FLAT_NODE_MEM_MAP=y 155 - # CONFIG_SPARSEMEM_STATIC is not set 156 - # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 157 145 CONFIG_PAGEFLAGS_EXTENDED=y 158 146 CONFIG_SPLIT_PTLOCK_CPUS=4 159 - CONFIG_RESOURCES_64BIT=y 147 + CONFIG_PHYS_ADDR_T_64BIT=y 160 148 CONFIG_ZONE_DMA_FLAG=0 161 149 CONFIG_VIRT_TO_BUS=y 150 + # CONFIG_KSM is not set 151 + CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 162 152 CONFIG_SMP=y 163 153 CONFIG_SYS_SUPPORTS_SMP=y 164 154 CONFIG_NR_CPUS_DEFAULT_4=y 165 155 CONFIG_NR_CPUS=4 166 - # CONFIG_MIPS_CMP is not set 167 156 CONFIG_TICK_ONESHOT=y 168 157 CONFIG_NO_HZ=y 169 158 CONFIG_HIGH_RES_TIMERS=y ··· 184 175 CONFIG_LOCKDEP_SUPPORT=y 185 176 CONFIG_STACKTRACE_SUPPORT=y 186 177 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 178 + CONFIG_CONSTRUCTORS=y 187 179 188 180 # 189 181 # General setup ··· 198 188 CONFIG_SYSVIPC=y 199 189 CONFIG_SYSVIPC_SYSCTL=y 200 190 CONFIG_POSIX_MQUEUE=y 191 + CONFIG_POSIX_MQUEUE_SYSCTL=y 201 192 CONFIG_BSD_PROCESS_ACCT=y 202 193 CONFIG_BSD_PROCESS_ACCT_V3=y 203 194 CONFIG_TASKSTATS=y ··· 206 195 CONFIG_TASK_XACCT=y 207 196 CONFIG_TASK_IO_ACCOUNTING=y 208 197 CONFIG_AUDIT=y 198 + 199 + # 200 + # RCU Subsystem 201 + # 202 + CONFIG_TREE_RCU=y 203 + # CONFIG_TREE_PREEMPT_RCU is not set 204 + # CONFIG_TINY_RCU is not set 205 + # CONFIG_RCU_TRACE is not set 206 + CONFIG_RCU_FANOUT=64 207 + # CONFIG_RCU_FANOUT_EXACT is not set 208 + # CONFIG_RCU_FAST_NO_HZ is not set 209 + # CONFIG_TREE_RCU_TRACE is not set 209 210 CONFIG_IKCONFIG=y 210 211 CONFIG_IKCONFIG_PROC=y 211 212 CONFIG_LOG_BUF_SHIFT=16 212 213 # CONFIG_CGROUPS is not set 213 - CONFIG_GROUP_SCHED=y 214 - CONFIG_FAIR_GROUP_SCHED=y 215 - # CONFIG_RT_GROUP_SCHED is not set 216 - CONFIG_USER_SCHED=y 217 - # CONFIG_CGROUP_SCHED is not set 218 - CONFIG_SYSFS_DEPRECATED=y 219 - CONFIG_SYSFS_DEPRECATED_V2=y 214 + # CONFIG_SYSFS_DEPRECATED_V2 is not set 220 215 CONFIG_RELAY=y 221 - # CONFIG_NAMESPACES is not set 216 + CONFIG_NAMESPACES=y 217 + CONFIG_UTS_NS=y 218 + CONFIG_IPC_NS=y 219 + CONFIG_USER_NS=y 220 + CONFIG_PID_NS=y 221 + CONFIG_NET_NS=y 222 222 CONFIG_BLK_DEV_INITRD=y 223 223 CONFIG_INITRAMFS_SOURCE="" 224 + CONFIG_RD_GZIP=y 225 + # CONFIG_RD_BZIP2 is not set 226 + # CONFIG_RD_LZMA is not set 227 + # CONFIG_RD_LZO is not set 224 228 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 225 229 CONFIG_SYSCTL=y 230 + CONFIG_ANON_INODES=y 226 231 CONFIG_EMBEDDED=y 227 232 # CONFIG_SYSCTL_SYSCALL is not set 228 233 CONFIG_KALLSYMS=y ··· 249 222 CONFIG_BUG=y 250 223 CONFIG_ELF_CORE=y 251 224 # CONFIG_PCSPKR_PLATFORM is not set 252 - CONFIG_COMPAT_BRK=y 253 225 CONFIG_BASE_FULL=y 254 226 CONFIG_FUTEX=y 255 - CONFIG_ANON_INODES=y 256 227 CONFIG_EPOLL=y 257 228 CONFIG_SIGNALFD=y 258 229 CONFIG_TIMERFD=y 259 230 CONFIG_EVENTFD=y 260 231 CONFIG_SHMEM=y 232 + CONFIG_AIO=y 233 + 234 + # 235 + # Kernel Performance Events And Counters 236 + # 261 237 CONFIG_VM_EVENT_COUNTERS=y 238 + CONFIG_PCI_QUIRKS=y 239 + CONFIG_COMPAT_BRK=y 262 240 CONFIG_SLAB=y 263 241 # CONFIG_SLUB is not set 264 242 # CONFIG_SLOB is not set 265 243 # CONFIG_PROFILING is not set 266 - # CONFIG_MARKERS is not set 267 244 CONFIG_HAVE_OPROFILE=y 268 - # CONFIG_HAVE_KPROBES is not set 269 - # CONFIG_HAVE_KRETPROBES is not set 270 - # CONFIG_HAVE_DMA_ATTRS is not set 271 - CONFIG_PROC_PAGE_MONITOR=y 245 + CONFIG_HAVE_SYSCALL_WRAPPERS=y 246 + CONFIG_USE_GENERIC_SMP_HELPERS=y 247 + 248 + # 249 + # GCOV-based kernel profiling 250 + # 251 + # CONFIG_SLOW_WORK is not set 252 + CONFIG_HAVE_GENERIC_DMA_COHERENT=y 272 253 CONFIG_SLABINFO=y 273 254 CONFIG_RT_MUTEXES=y 274 - # CONFIG_TINY_SHMEM is not set 275 255 CONFIG_BASE_SMALL=0 276 256 CONFIG_MODULES=y 277 257 # CONFIG_MODULE_FORCE_LOAD is not set ··· 286 252 # CONFIG_MODULE_FORCE_UNLOAD is not set 287 253 CONFIG_MODVERSIONS=y 288 254 CONFIG_MODULE_SRCVERSION_ALL=y 289 - CONFIG_KMOD=y 290 255 CONFIG_STOP_MACHINE=y 291 256 CONFIG_BLOCK=y 292 - # CONFIG_BLK_DEV_IO_TRACE is not set 293 257 # CONFIG_BLK_DEV_BSG is not set 258 + # CONFIG_BLK_DEV_INTEGRITY is not set 294 259 CONFIG_BLOCK_COMPAT=y 295 260 296 261 # 297 262 # IO Schedulers 298 263 # 299 264 CONFIG_IOSCHED_NOOP=y 300 - CONFIG_IOSCHED_AS=y 301 265 CONFIG_IOSCHED_DEADLINE=y 302 266 CONFIG_IOSCHED_CFQ=y 303 - CONFIG_DEFAULT_AS=y 304 267 # CONFIG_DEFAULT_DEADLINE is not set 305 - # CONFIG_DEFAULT_CFQ is not set 268 + CONFIG_DEFAULT_CFQ=y 306 269 # CONFIG_DEFAULT_NOOP is not set 307 - CONFIG_DEFAULT_IOSCHED="anticipatory" 308 - CONFIG_CLASSIC_RCU=y 270 + CONFIG_DEFAULT_IOSCHED="cfq" 271 + # CONFIG_INLINE_SPIN_TRYLOCK is not set 272 + # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set 273 + # CONFIG_INLINE_SPIN_LOCK is not set 274 + # CONFIG_INLINE_SPIN_LOCK_BH is not set 275 + # CONFIG_INLINE_SPIN_LOCK_IRQ is not set 276 + # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set 277 + CONFIG_INLINE_SPIN_UNLOCK=y 278 + # CONFIG_INLINE_SPIN_UNLOCK_BH is not set 279 + CONFIG_INLINE_SPIN_UNLOCK_IRQ=y 280 + # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set 281 + # CONFIG_INLINE_READ_TRYLOCK is not set 282 + # CONFIG_INLINE_READ_LOCK is not set 283 + # CONFIG_INLINE_READ_LOCK_BH is not set 284 + # CONFIG_INLINE_READ_LOCK_IRQ is not set 285 + # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set 286 + CONFIG_INLINE_READ_UNLOCK=y 287 + # CONFIG_INLINE_READ_UNLOCK_BH is not set 288 + CONFIG_INLINE_READ_UNLOCK_IRQ=y 289 + # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set 290 + # CONFIG_INLINE_WRITE_TRYLOCK is not set 291 + # CONFIG_INLINE_WRITE_LOCK is not set 292 + # CONFIG_INLINE_WRITE_LOCK_BH is not set 293 + # CONFIG_INLINE_WRITE_LOCK_IRQ is not set 294 + # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set 295 + CONFIG_INLINE_WRITE_UNLOCK=y 296 + # CONFIG_INLINE_WRITE_UNLOCK_BH is not set 297 + CONFIG_INLINE_WRITE_UNLOCK_IRQ=y 298 + # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set 299 + CONFIG_MUTEX_SPIN_ON_OWNER=y 300 + # CONFIG_FREEZER is not set 309 301 310 302 # 311 303 # Bus options (PCI, PCMCIA, EISA, ISA, TC) ··· 340 280 CONFIG_PCI=y 341 281 CONFIG_PCI_DOMAINS=y 342 282 # CONFIG_ARCH_SUPPORTS_MSI is not set 343 - CONFIG_PCI_LEGACY=y 344 283 CONFIG_PCI_DEBUG=y 284 + # CONFIG_PCI_STUB is not set 285 + # CONFIG_PCI_IOV is not set 345 286 CONFIG_MMU=y 346 287 CONFIG_ZONE_DMA32=y 347 288 # CONFIG_PCCARD is not set ··· 352 291 # Executable file formats 353 292 # 354 293 CONFIG_BINFMT_ELF=y 294 + # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set 295 + # CONFIG_HAVE_AOUT is not set 355 296 # CONFIG_BINFMT_MISC is not set 356 297 CONFIG_MIPS32_COMPAT=y 357 298 CONFIG_COMPAT=y ··· 367 304 # 368 305 CONFIG_PM=y 369 306 # CONFIG_PM_DEBUG is not set 370 - 371 - # 372 - # Networking 373 - # 307 + # CONFIG_PM_RUNTIME is not set 374 308 CONFIG_NET=y 375 309 376 310 # 377 311 # Networking options 378 312 # 379 313 CONFIG_PACKET=y 380 - CONFIG_PACKET_MMAP=y 381 314 CONFIG_UNIX=y 382 315 CONFIG_XFRM=y 383 316 CONFIG_XFRM_USER=m 384 317 # CONFIG_XFRM_SUB_POLICY is not set 385 318 CONFIG_XFRM_MIGRATE=y 386 319 # CONFIG_XFRM_STATISTICS is not set 320 + CONFIG_XFRM_IPCOMP=m 387 321 CONFIG_NET_KEY=y 388 322 CONFIG_NET_KEY_MIGRATE=y 389 323 CONFIG_INET=y ··· 413 353 CONFIG_TCP_CONG_CUBIC=y 414 354 CONFIG_DEFAULT_TCP_CONG="cubic" 415 355 CONFIG_TCP_MD5SIG=y 356 + CONFIG_IPV6=m 357 + CONFIG_IPV6_PRIVACY=y 358 + CONFIG_IPV6_ROUTER_PREF=y 359 + CONFIG_IPV6_ROUTE_INFO=y 360 + CONFIG_IPV6_OPTIMISTIC_DAD=y 361 + CONFIG_INET6_AH=m 362 + CONFIG_INET6_ESP=m 363 + CONFIG_INET6_IPCOMP=m 364 + CONFIG_IPV6_MIP6=m 365 + CONFIG_INET6_XFRM_TUNNEL=m 366 + CONFIG_INET6_TUNNEL=m 367 + CONFIG_INET6_XFRM_MODE_TRANSPORT=m 368 + CONFIG_INET6_XFRM_MODE_TUNNEL=m 369 + CONFIG_INET6_XFRM_MODE_BEET=m 370 + CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m 371 + CONFIG_IPV6_SIT=m 372 + CONFIG_IPV6_SIT_6RD=y 373 + CONFIG_IPV6_NDISC_NODETYPE=y 374 + CONFIG_IPV6_TUNNEL=m 375 + CONFIG_IPV6_MULTIPLE_TABLES=y 376 + CONFIG_IPV6_SUBTREES=y 377 + # CONFIG_IPV6_MROUTE is not set 378 + CONFIG_NETLABEL=y 379 + CONFIG_NETWORK_SECMARK=y 380 + CONFIG_NETFILTER=y 381 + # CONFIG_NETFILTER_DEBUG is not set 382 + # CONFIG_NETFILTER_ADVANCED is not set 383 + 384 + # 385 + # Core Netfilter Configuration 386 + # 387 + CONFIG_NETFILTER_NETLINK=m 388 + CONFIG_NETFILTER_NETLINK_LOG=m 389 + CONFIG_NF_CONNTRACK=m 390 + CONFIG_NF_CONNTRACK_SECMARK=y 391 + CONFIG_NF_CONNTRACK_FTP=m 392 + CONFIG_NF_CONNTRACK_IRC=m 393 + CONFIG_NF_CONNTRACK_SIP=m 394 + CONFIG_NF_CT_NETLINK=m 395 + CONFIG_NETFILTER_XTABLES=m 396 + CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m 397 + CONFIG_NETFILTER_XT_TARGET_MARK=m 398 + CONFIG_NETFILTER_XT_TARGET_NFLOG=m 399 + CONFIG_NETFILTER_XT_TARGET_SECMARK=m 400 + CONFIG_NETFILTER_XT_TARGET_TCPMSS=m 401 + CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m 402 + CONFIG_NETFILTER_XT_MATCH_MARK=m 403 + CONFIG_NETFILTER_XT_MATCH_POLICY=m 404 + CONFIG_NETFILTER_XT_MATCH_STATE=m 416 405 CONFIG_IP_VS=m 406 + CONFIG_IP_VS_IPV6=y 417 407 # CONFIG_IP_VS_DEBUG is not set 418 408 CONFIG_IP_VS_TAB_BITS=12 419 409 ··· 472 362 # 473 363 CONFIG_IP_VS_PROTO_TCP=y 474 364 CONFIG_IP_VS_PROTO_UDP=y 365 + CONFIG_IP_VS_PROTO_AH_ESP=y 475 366 CONFIG_IP_VS_PROTO_ESP=y 476 367 CONFIG_IP_VS_PROTO_AH=y 368 + CONFIG_IP_VS_PROTO_SCTP=y 477 369 478 370 # 479 371 # IPVS scheduler ··· 495 383 # IPVS application helper 496 384 # 497 385 CONFIG_IP_VS_FTP=m 498 - CONFIG_IPV6=m 499 - CONFIG_IPV6_PRIVACY=y 500 - CONFIG_IPV6_ROUTER_PREF=y 501 - CONFIG_IPV6_ROUTE_INFO=y 502 - CONFIG_IPV6_OPTIMISTIC_DAD=y 503 - CONFIG_INET6_AH=m 504 - CONFIG_INET6_ESP=m 505 - CONFIG_INET6_IPCOMP=m 506 - CONFIG_IPV6_MIP6=m 507 - CONFIG_INET6_XFRM_TUNNEL=m 508 - CONFIG_INET6_TUNNEL=m 509 - CONFIG_INET6_XFRM_MODE_TRANSPORT=m 510 - CONFIG_INET6_XFRM_MODE_TUNNEL=m 511 - CONFIG_INET6_XFRM_MODE_BEET=m 512 - CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m 513 - CONFIG_IPV6_SIT=m 514 - CONFIG_IPV6_NDISC_NODETYPE=y 515 - CONFIG_IPV6_TUNNEL=m 516 - CONFIG_IPV6_MULTIPLE_TABLES=y 517 - CONFIG_IPV6_SUBTREES=y 518 - # CONFIG_IPV6_MROUTE is not set 519 - CONFIG_NETWORK_SECMARK=y 520 - CONFIG_NETFILTER=y 521 - # CONFIG_NETFILTER_DEBUG is not set 522 - # CONFIG_NETFILTER_ADVANCED is not set 523 - 524 - # 525 - # Core Netfilter Configuration 526 - # 527 - CONFIG_NETFILTER_NETLINK=m 528 - CONFIG_NETFILTER_NETLINK_LOG=m 529 - CONFIG_NF_CONNTRACK=m 530 - CONFIG_NF_CONNTRACK_SECMARK=y 531 - CONFIG_NF_CONNTRACK_FTP=m 532 - CONFIG_NF_CONNTRACK_IRC=m 533 - CONFIG_NF_CONNTRACK_SIP=m 534 - CONFIG_NF_CT_NETLINK=m 535 - CONFIG_NETFILTER_XTABLES=m 536 - CONFIG_NETFILTER_XT_TARGET_MARK=m 537 - CONFIG_NETFILTER_XT_TARGET_NFLOG=m 538 - CONFIG_NETFILTER_XT_TARGET_SECMARK=m 539 - CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m 540 - CONFIG_NETFILTER_XT_TARGET_TCPMSS=m 541 - CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m 542 - CONFIG_NETFILTER_XT_MATCH_MARK=m 543 - CONFIG_NETFILTER_XT_MATCH_POLICY=m 544 - CONFIG_NETFILTER_XT_MATCH_STATE=m 545 386 546 387 # 547 388 # IP: Netfilter Configuration 548 389 # 390 + CONFIG_NF_DEFRAG_IPV4=m 549 391 CONFIG_NF_CONNTRACK_IPV4=m 550 392 CONFIG_NF_CONNTRACK_PROC_COMPAT=y 551 393 CONFIG_IP_NF_IPTABLES=m ··· 525 459 CONFIG_NF_CONNTRACK_IPV6=m 526 460 CONFIG_IP6_NF_IPTABLES=m 527 461 CONFIG_IP6_NF_MATCH_IPV6HEADER=m 528 - CONFIG_IP6_NF_FILTER=m 529 462 CONFIG_IP6_NF_TARGET_LOG=m 463 + CONFIG_IP6_NF_FILTER=m 530 464 CONFIG_IP6_NF_TARGET_REJECT=m 531 465 CONFIG_IP6_NF_MANGLE=m 532 - # CONFIG_IP_DCCP is not set 466 + CONFIG_IP_DCCP=m 467 + CONFIG_INET_DCCP_DIAG=m 468 + 469 + # 470 + # DCCP CCIDs Configuration (EXPERIMENTAL) 471 + # 472 + # CONFIG_IP_DCCP_CCID2_DEBUG is not set 473 + CONFIG_IP_DCCP_CCID3=y 474 + # CONFIG_IP_DCCP_CCID3_DEBUG is not set 475 + CONFIG_IP_DCCP_CCID3_RTO=100 476 + CONFIG_IP_DCCP_TFRC_LIB=y 477 + 478 + # 479 + # DCCP Kernel Hacking 480 + # 481 + # CONFIG_IP_DCCP_DEBUG is not set 533 482 CONFIG_IP_SCTP=m 534 483 # CONFIG_SCTP_DBG_MSG is not set 535 484 # CONFIG_SCTP_DBG_OBJCNT is not set 536 485 # CONFIG_SCTP_HMAC_NONE is not set 537 - # CONFIG_SCTP_HMAC_SHA1 is not set 538 - CONFIG_SCTP_HMAC_MD5=y 486 + CONFIG_SCTP_HMAC_SHA1=y 487 + # CONFIG_SCTP_HMAC_MD5 is not set 488 + # CONFIG_RDS is not set 539 489 # CONFIG_TIPC is not set 540 490 # CONFIG_ATM is not set 541 - # CONFIG_BRIDGE is not set 542 - # CONFIG_VLAN_8021Q is not set 491 + CONFIG_STP=m 492 + CONFIG_GARP=m 493 + CONFIG_BRIDGE=m 494 + CONFIG_BRIDGE_IGMP_SNOOPING=y 495 + # CONFIG_NET_DSA is not set 496 + CONFIG_VLAN_8021Q=m 497 + CONFIG_VLAN_8021Q_GVRP=y 543 498 # CONFIG_DECNET is not set 499 + CONFIG_LLC=m 544 500 # CONFIG_LLC2 is not set 545 501 # CONFIG_IPX is not set 546 502 # CONFIG_ATALK is not set ··· 570 482 # CONFIG_LAPB is not set 571 483 # CONFIG_ECONET is not set 572 484 # CONFIG_WAN_ROUTER is not set 485 + # CONFIG_PHONET is not set 486 + # CONFIG_IEEE802154 is not set 573 487 # CONFIG_NET_SCHED is not set 488 + # CONFIG_DCB is not set 574 489 575 490 # 576 491 # Network testing 577 492 # 578 493 # CONFIG_NET_PKTGEN is not set 579 - # CONFIG_HAMRADIO is not set 494 + CONFIG_HAMRADIO=y 495 + 496 + # 497 + # Packet Radio protocols 498 + # 499 + CONFIG_AX25=m 500 + CONFIG_AX25_DAMA_SLAVE=y 501 + CONFIG_NETROM=m 502 + CONFIG_ROSE=m 503 + 504 + # 505 + # AX.25 network device drivers 506 + # 507 + CONFIG_MKISS=m 508 + CONFIG_6PACK=m 509 + CONFIG_BPQETHER=m 510 + CONFIG_BAYCOM_SER_FDX=m 511 + CONFIG_BAYCOM_SER_HDX=m 512 + CONFIG_YAM=m 580 513 # CONFIG_CAN is not set 581 514 # CONFIG_IRDA is not set 582 515 # CONFIG_BT is not set 583 516 # CONFIG_AF_RXRPC is not set 584 517 CONFIG_FIB_RULES=y 518 + CONFIG_WIRELESS=y 519 + # CONFIG_CFG80211 is not set 520 + # CONFIG_LIB80211 is not set 585 521 586 522 # 587 - # Wireless 523 + # CFG80211 needs to be enabled for MAC80211 588 524 # 589 - # CONFIG_CFG80211 is not set 590 - # CONFIG_WIRELESS_EXT is not set 591 - # CONFIG_MAC80211 is not set 592 - # CONFIG_IEEE80211 is not set 525 + # CONFIG_WIMAX is not set 593 526 # CONFIG_RFKILL is not set 594 527 # CONFIG_NET_9P is not set 595 528 ··· 622 513 # Generic Driver Options 623 514 # 624 515 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 516 + # CONFIG_DEVTMPFS is not set 625 517 CONFIG_STANDALONE=y 626 518 CONFIG_PREVENT_FIRMWARE_BUILD=y 627 519 CONFIG_FW_LOADER=m 520 + CONFIG_FIRMWARE_IN_KERNEL=y 521 + CONFIG_EXTRA_FIRMWARE="" 628 522 # CONFIG_DEBUG_DRIVER is not set 629 523 # CONFIG_DEBUG_DEVRES is not set 630 524 # CONFIG_SYS_HYPERVISOR is not set ··· 642 530 # CONFIG_BLK_DEV_COW_COMMON is not set 643 531 CONFIG_BLK_DEV_LOOP=m 644 532 CONFIG_BLK_DEV_CRYPTOLOOP=m 533 + 534 + # 535 + # DRBD disabled because PROC_FS, INET or CONNECTOR not selected 536 + # 645 537 CONFIG_BLK_DEV_NBD=m 646 538 # CONFIG_BLK_DEV_SX8 is not set 647 539 # CONFIG_BLK_DEV_RAM is not set 648 540 # CONFIG_CDROM_PKTCDVD is not set 649 541 # CONFIG_ATA_OVER_ETH is not set 542 + # CONFIG_BLK_DEV_HD is not set 650 543 CONFIG_MISC_DEVICES=y 544 + # CONFIG_AD525X_DPOT is not set 651 545 # CONFIG_PHANTOM is not set 652 - # CONFIG_EEPROM_93CX6 is not set 653 546 CONFIG_SGI_IOC4=m 654 547 # CONFIG_TIFM_CORE is not set 548 + # CONFIG_ICS932S401 is not set 655 549 # CONFIG_ENCLOSURE_SERVICES is not set 550 + # CONFIG_HP_ILO is not set 551 + # CONFIG_ISL29003 is not set 552 + # CONFIG_SENSORS_TSL2550 is not set 553 + # CONFIG_DS1682 is not set 554 + # CONFIG_C2PORT is not set 555 + 556 + # 557 + # EEPROM support 558 + # 559 + # CONFIG_EEPROM_AT24 is not set 560 + CONFIG_EEPROM_LEGACY=y 561 + CONFIG_EEPROM_MAX6875=y 562 + # CONFIG_EEPROM_93CX6 is not set 563 + # CONFIG_CB710_CORE is not set 656 564 CONFIG_HAVE_IDE=y 657 565 CONFIG_IDE=y 658 - CONFIG_IDE_MAX_HWIFS=4 659 - CONFIG_BLK_DEV_IDE=y 660 566 661 567 # 662 568 # Please see Documentation/ide/ide.txt for help/info on IDE drives 663 569 # 570 + CONFIG_IDE_XFER_MODE=y 571 + CONFIG_IDE_TIMINGS=y 572 + CONFIG_IDE_ATAPI=y 664 573 # CONFIG_BLK_DEV_IDE_SATA is not set 665 - CONFIG_BLK_DEV_IDEDISK=y 666 - # CONFIG_IDEDISK_MULTI_MODE is not set 574 + CONFIG_IDE_GD=y 575 + CONFIG_IDE_GD_ATA=y 576 + # CONFIG_IDE_GD_ATAPI is not set 667 577 CONFIG_BLK_DEV_IDECD=y 668 578 CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y 669 579 CONFIG_BLK_DEV_IDETAPE=y 670 - CONFIG_BLK_DEV_IDEFLOPPY=y 671 - # CONFIG_BLK_DEV_IDESCSI is not set 672 580 # CONFIG_IDE_TASK_IOCTL is not set 673 581 CONFIG_IDE_PROC_FS=y 674 582 ··· 713 581 # CONFIG_BLK_DEV_AMD74XX is not set 714 582 CONFIG_BLK_DEV_CMD64X=y 715 583 # CONFIG_BLK_DEV_TRIFLEX is not set 716 - # CONFIG_BLK_DEV_CY82C693 is not set 717 584 # CONFIG_BLK_DEV_CS5520 is not set 718 585 # CONFIG_BLK_DEV_CS5530 is not set 719 - # CONFIG_BLK_DEV_HPT34X is not set 720 586 # CONFIG_BLK_DEV_HPT366 is not set 721 587 # CONFIG_BLK_DEV_JMICRON is not set 722 588 # CONFIG_BLK_DEV_SC1200 is not set 723 589 # CONFIG_BLK_DEV_PIIX is not set 590 + # CONFIG_BLK_DEV_IT8172 is not set 724 591 CONFIG_BLK_DEV_IT8213=m 725 592 # CONFIG_BLK_DEV_IT821X is not set 726 593 # CONFIG_BLK_DEV_NS87415 is not set ··· 731 600 # CONFIG_BLK_DEV_TRM290 is not set 732 601 # CONFIG_BLK_DEV_VIA82CXXX is not set 733 602 CONFIG_BLK_DEV_TC86C001=m 734 - # CONFIG_BLK_DEV_IDE_SWARM is not set 735 603 CONFIG_BLK_DEV_IDEDMA=y 736 - # CONFIG_BLK_DEV_HD_ONLY is not set 737 - # CONFIG_BLK_DEV_HD is not set 738 604 739 605 # 740 606 # SCSI device support 741 607 # 608 + CONFIG_SCSI_MOD=y 742 609 # CONFIG_RAID_ATTRS is not set 743 610 CONFIG_SCSI=y 744 611 CONFIG_SCSI_DMA=y ··· 754 625 CONFIG_BLK_DEV_SR_VENDOR=y 755 626 CONFIG_CHR_DEV_SG=m 756 627 CONFIG_CHR_DEV_SCH=m 757 - 758 - # 759 - # Some SCSI devices (e.g. CD jukebox) support multiple LUNs 760 - # 761 628 # CONFIG_SCSI_MULTI_LUN is not set 762 629 # CONFIG_SCSI_CONSTANTS is not set 763 630 # CONFIG_SCSI_LOGGING is not set ··· 770 645 # CONFIG_SCSI_SRP_ATTRS is not set 771 646 CONFIG_SCSI_LOWLEVEL=y 772 647 # CONFIG_ISCSI_TCP is not set 648 + # CONFIG_SCSI_CXGB3_ISCSI is not set 649 + # CONFIG_SCSI_BNX2_ISCSI is not set 650 + # CONFIG_BE2ISCSI is not set 773 651 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set 652 + # CONFIG_SCSI_HPSA is not set 774 653 # CONFIG_SCSI_3W_9XXX is not set 654 + # CONFIG_SCSI_3W_SAS is not set 775 655 # CONFIG_SCSI_ACARD is not set 776 656 # CONFIG_SCSI_AACRAID is not set 777 657 # CONFIG_SCSI_AIC7XXX is not set 778 658 # CONFIG_SCSI_AIC7XXX_OLD is not set 779 659 # CONFIG_SCSI_AIC79XX is not set 780 660 # CONFIG_SCSI_AIC94XX is not set 661 + # CONFIG_SCSI_MVSAS is not set 781 662 # CONFIG_SCSI_DPT_I2O is not set 782 663 # CONFIG_SCSI_ADVANSYS is not set 783 664 # CONFIG_SCSI_ARCMSR is not set 784 665 # CONFIG_MEGARAID_NEWGEN is not set 785 666 # CONFIG_MEGARAID_LEGACY is not set 786 667 # CONFIG_MEGARAID_SAS is not set 668 + # CONFIG_SCSI_MPT2SAS is not set 787 669 # CONFIG_SCSI_HPTIOP is not set 670 + # CONFIG_LIBFC is not set 671 + # CONFIG_LIBFCOE is not set 672 + # CONFIG_FCOE is not set 788 673 # CONFIG_SCSI_DMX3191D is not set 789 674 # CONFIG_SCSI_FUTURE_DOMAIN is not set 790 675 # CONFIG_SCSI_IPS is not set 791 676 # CONFIG_SCSI_INITIO is not set 792 677 # CONFIG_SCSI_INIA100 is not set 793 - # CONFIG_SCSI_MVSAS is not set 794 678 # CONFIG_SCSI_STEX is not set 795 679 # CONFIG_SCSI_SYM53C8XX_2 is not set 796 680 # CONFIG_SCSI_IPR is not set ··· 810 676 # CONFIG_SCSI_DC395x is not set 811 677 # CONFIG_SCSI_DC390T is not set 812 678 # CONFIG_SCSI_DEBUG is not set 679 + # CONFIG_SCSI_PMCRAID is not set 680 + # CONFIG_SCSI_PM8001 is not set 813 681 # CONFIG_SCSI_SRP is not set 682 + # CONFIG_SCSI_BFA_FC is not set 683 + # CONFIG_SCSI_DH is not set 684 + # CONFIG_SCSI_OSD_INITIATOR is not set 814 685 CONFIG_ATA=y 815 686 # CONFIG_ATA_NONSTANDARD is not set 687 + CONFIG_ATA_VERBOSE_ERROR=y 816 688 CONFIG_SATA_PMP=y 817 689 # CONFIG_SATA_AHCI is not set 818 690 CONFIG_SATA_SIL24=y ··· 840 700 # CONFIG_PATA_ALI is not set 841 701 # CONFIG_PATA_AMD is not set 842 702 # CONFIG_PATA_ARTOP is not set 703 + # CONFIG_PATA_ATP867X is not set 843 704 # CONFIG_PATA_ATIIXP is not set 844 705 # CONFIG_PATA_CMD640_PCI is not set 845 706 # CONFIG_PATA_CMD64X is not set ··· 856 715 # CONFIG_PATA_IT821X is not set 857 716 # CONFIG_PATA_IT8213 is not set 858 717 # CONFIG_PATA_JMICRON is not set 718 + # CONFIG_PATA_LEGACY is not set 859 719 # CONFIG_PATA_TRIFLEX is not set 860 720 # CONFIG_PATA_MARVELL is not set 861 721 # CONFIG_PATA_MPIIX is not set ··· 867 725 # CONFIG_PATA_NS87415 is not set 868 726 # CONFIG_PATA_OPTI is not set 869 727 # CONFIG_PATA_OPTIDMA is not set 728 + # CONFIG_PATA_PDC2027X is not set 870 729 # CONFIG_PATA_PDC_OLD is not set 871 730 # CONFIG_PATA_RADISYS is not set 731 + # CONFIG_PATA_RDC is not set 872 732 # CONFIG_PATA_RZ1000 is not set 873 733 # CONFIG_PATA_SC1200 is not set 874 734 # CONFIG_PATA_SERVERWORKS is not set 875 - # CONFIG_PATA_PDC2027X is not set 876 735 CONFIG_PATA_SIL680=y 877 736 # CONFIG_PATA_SIS is not set 737 + # CONFIG_PATA_TOSHIBA is not set 878 738 # CONFIG_PATA_VIA is not set 879 739 # CONFIG_PATA_WINBOND is not set 880 740 # CONFIG_PATA_PLATFORM is not set ··· 889 745 # 890 746 891 747 # 892 - # Enable only one of the two stacks, unless you know what you are doing 748 + # You can enable one or both FireWire driver stacks. 749 + # 750 + 751 + # 752 + # The newer stack is recommended. 893 753 # 894 754 # CONFIG_FIREWIRE is not set 895 755 # CONFIG_IEEE1394 is not set 896 756 # CONFIG_I2O is not set 897 757 CONFIG_NETDEVICES=y 898 - # CONFIG_NETDEVICES_MULTIQUEUE is not set 899 758 # CONFIG_DUMMY is not set 900 759 # CONFIG_BONDING is not set 901 760 # CONFIG_MACVLAN is not set ··· 921 774 # CONFIG_BROADCOM_PHY is not set 922 775 # CONFIG_ICPLUS_PHY is not set 923 776 # CONFIG_REALTEK_PHY is not set 777 + # CONFIG_NATIONAL_PHY is not set 778 + # CONFIG_STE10XP is not set 779 + # CONFIG_LSI_ET1011C_PHY is not set 924 780 # CONFIG_FIXED_PHY is not set 925 781 # CONFIG_MDIO_BITBANG is not set 926 782 CONFIG_NET_ETHERNET=y ··· 933 783 # CONFIG_SUNGEM is not set 934 784 # CONFIG_CASSINI is not set 935 785 # CONFIG_NET_VENDOR_3COM is not set 786 + # CONFIG_SMC91X is not set 936 787 # CONFIG_DM9000 is not set 788 + # CONFIG_ETHOC is not set 789 + # CONFIG_SMSC911X is not set 790 + # CONFIG_DNET is not set 937 791 # CONFIG_NET_TULIP is not set 938 792 # CONFIG_HP100 is not set 939 793 # CONFIG_IBM_NEW_EMAC_ZMII is not set 940 794 # CONFIG_IBM_NEW_EMAC_RGMII is not set 941 795 # CONFIG_IBM_NEW_EMAC_TAH is not set 942 796 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set 797 + # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set 798 + # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set 799 + # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set 943 800 # CONFIG_NET_PCI is not set 944 801 # CONFIG_B44 is not set 802 + # CONFIG_KS8842 is not set 803 + # CONFIG_KS8851_MLL is not set 804 + # CONFIG_ATL2 is not set 945 805 CONFIG_NETDEV_1000=y 946 806 # CONFIG_ACENIC is not set 947 807 # CONFIG_DL2K is not set 948 808 # CONFIG_E1000 is not set 949 809 # CONFIG_E1000E is not set 950 - # CONFIG_E1000E_ENABLED is not set 951 810 # CONFIG_IP1000 is not set 952 811 # CONFIG_IGB is not set 812 + # CONFIG_IGBVF is not set 953 813 # CONFIG_NS83820 is not set 954 814 # CONFIG_HAMACHI is not set 955 815 # CONFIG_YELLOWFIN is not set ··· 971 811 # CONFIG_VIA_VELOCITY is not set 972 812 # CONFIG_TIGON3 is not set 973 813 # CONFIG_BNX2 is not set 814 + # CONFIG_CNIC is not set 974 815 # CONFIG_QLA3XXX is not set 975 816 # CONFIG_ATL1 is not set 817 + # CONFIG_ATL1E is not set 818 + # CONFIG_ATL1C is not set 819 + # CONFIG_JME is not set 976 820 CONFIG_NETDEV_10000=y 821 + CONFIG_MDIO=m 977 822 # CONFIG_CHELSIO_T1 is not set 823 + CONFIG_CHELSIO_T3_DEPENDS=y 978 824 CONFIG_CHELSIO_T3=m 825 + # CONFIG_ENIC is not set 979 826 # CONFIG_IXGBE is not set 980 827 # CONFIG_IXGB is not set 981 828 # CONFIG_S2IO is not set 829 + # CONFIG_VXGE is not set 982 830 # CONFIG_MYRI10GE is not set 983 831 CONFIG_NETXEN_NIC=m 984 832 # CONFIG_NIU is not set 833 + # CONFIG_MLX4_EN is not set 985 834 # CONFIG_MLX4_CORE is not set 986 835 # CONFIG_TEHUTI is not set 987 836 # CONFIG_BNX2X is not set 837 + # CONFIG_QLCNIC is not set 838 + # CONFIG_QLGE is not set 988 839 # CONFIG_SFC is not set 840 + # CONFIG_BE2NET is not set 989 841 # CONFIG_TR is not set 842 + CONFIG_WLAN=y 843 + # CONFIG_ATMEL is not set 844 + # CONFIG_PRISM54 is not set 845 + # CONFIG_HOSTAP is not set 990 846 991 847 # 992 - # Wireless LAN 848 + # Enable WiMAX (Networking options) to see the WiMAX drivers 993 849 # 994 - # CONFIG_WLAN_PRE80211 is not set 995 - # CONFIG_WLAN_80211 is not set 996 - # CONFIG_IWLWIFI_LEDS is not set 997 850 # CONFIG_WAN is not set 998 851 # CONFIG_FDDI is not set 999 852 # CONFIG_HIPPI is not set ··· 1029 856 # CONFIG_NETCONSOLE is not set 1030 857 # CONFIG_NETPOLL is not set 1031 858 # CONFIG_NET_POLL_CONTROLLER is not set 859 + # CONFIG_VMXNET3 is not set 1032 860 # CONFIG_ISDN is not set 1033 861 # CONFIG_PHONE is not set 1034 862 ··· 1047 873 # CONFIG_SERIO_PCIPS2 is not set 1048 874 # CONFIG_SERIO_LIBPS2 is not set 1049 875 CONFIG_SERIO_RAW=m 876 + # CONFIG_SERIO_ALTERA_PS2 is not set 1050 877 # CONFIG_GAMEPORT is not set 1051 878 1052 879 # ··· 1068 893 # CONFIG_N_HDLC is not set 1069 894 # CONFIG_RISCOM8 is not set 1070 895 # CONFIG_SPECIALIX is not set 1071 - # CONFIG_SX is not set 1072 - # CONFIG_RIO is not set 1073 896 # CONFIG_STALDRV is not set 1074 897 # CONFIG_NOZOMI is not set 1075 898 ··· 1084 911 CONFIG_SERIAL_CORE=y 1085 912 CONFIG_SERIAL_CORE_CONSOLE=y 1086 913 # CONFIG_SERIAL_JSM is not set 914 + # CONFIG_SERIAL_TIMBERDALE is not set 1087 915 CONFIG_UNIX98_PTYS=y 916 + # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 1088 917 CONFIG_LEGACY_PTYS=y 1089 918 CONFIG_LEGACY_PTY_COUNT=256 1090 919 # CONFIG_IPMI_HANDLER is not set ··· 1098 923 CONFIG_DEVPORT=y 1099 924 CONFIG_I2C=y 1100 925 CONFIG_I2C_BOARDINFO=y 926 + CONFIG_I2C_COMPAT=y 1101 927 CONFIG_I2C_CHARDEV=y 928 + CONFIG_I2C_HELPER_AUTO=y 1102 929 1103 930 # 1104 931 # I2C Hardware Bus support 932 + # 933 + 934 + # 935 + # PC SMBus host controller drivers 1105 936 # 1106 937 # CONFIG_I2C_ALI1535 is not set 1107 938 # CONFIG_I2C_ALI1563 is not set ··· 1115 934 # CONFIG_I2C_AMD756 is not set 1116 935 # CONFIG_I2C_AMD8111 is not set 1117 936 # CONFIG_I2C_I801 is not set 1118 - # CONFIG_I2C_I810 is not set 937 + # CONFIG_I2C_ISCH is not set 1119 938 # CONFIG_I2C_PIIX4 is not set 1120 939 # CONFIG_I2C_NFORCE2 is not set 1121 - # CONFIG_I2C_OCORES is not set 1122 - # CONFIG_I2C_PARPORT_LIGHT is not set 1123 - # CONFIG_I2C_PROSAVAGE is not set 1124 - # CONFIG_I2C_SAVAGE4 is not set 1125 - CONFIG_I2C_SIBYTE=y 1126 - # CONFIG_I2C_SIMTEC is not set 1127 940 # CONFIG_I2C_SIS5595 is not set 1128 941 # CONFIG_I2C_SIS630 is not set 1129 942 # CONFIG_I2C_SIS96X is not set 1130 - # CONFIG_I2C_TAOS_EVM is not set 1131 - # CONFIG_I2C_STUB is not set 1132 943 # CONFIG_I2C_VIA is not set 1133 944 # CONFIG_I2C_VIAPRO is not set 1134 - # CONFIG_I2C_VOODOO3 is not set 1135 - # CONFIG_I2C_PCA_PLATFORM is not set 1136 945 1137 946 # 1138 - # Miscellaneous I2C Chip support 947 + # I2C system bus drivers (mostly embedded / system-on-chip) 1139 948 # 1140 - # CONFIG_DS1682 is not set 1141 - CONFIG_EEPROM_LEGACY=y 1142 - CONFIG_SENSORS_PCF8574=y 1143 - # CONFIG_PCF8575 is not set 1144 - CONFIG_SENSORS_PCF8591=y 1145 - CONFIG_EEPROM_MAX6875=y 1146 - # CONFIG_SENSORS_TSL2550 is not set 949 + # CONFIG_I2C_OCORES is not set 950 + # CONFIG_I2C_SIMTEC is not set 951 + # CONFIG_I2C_XILINX is not set 952 + 953 + # 954 + # External I2C/SMBus adapter drivers 955 + # 956 + # CONFIG_I2C_PARPORT_LIGHT is not set 957 + # CONFIG_I2C_TAOS_EVM is not set 958 + 959 + # 960 + # Other I2C/SMBus bus drivers 961 + # 962 + # CONFIG_I2C_PCA_PLATFORM is not set 963 + CONFIG_I2C_SIBYTE=y 964 + # CONFIG_I2C_STUB is not set 1147 965 CONFIG_I2C_DEBUG_CORE=y 1148 966 CONFIG_I2C_DEBUG_ALGO=y 1149 967 CONFIG_I2C_DEBUG_BUS=y 1150 - CONFIG_I2C_DEBUG_CHIP=y 1151 968 # CONFIG_SPI is not set 969 + 970 + # 971 + # PPS support 972 + # 973 + # CONFIG_PPS is not set 1152 974 # CONFIG_W1 is not set 1153 975 # CONFIG_POWER_SUPPLY is not set 1154 976 # CONFIG_HWMON is not set 1155 977 # CONFIG_THERMAL is not set 1156 - # CONFIG_THERMAL_HWMON is not set 1157 978 # CONFIG_WATCHDOG is not set 979 + CONFIG_SSB_POSSIBLE=y 1158 980 1159 981 # 1160 982 # Sonics Silicon Backplane 1161 983 # 1162 - CONFIG_SSB_POSSIBLE=y 1163 984 # CONFIG_SSB is not set 1164 985 1165 986 # 1166 987 # Multifunction device drivers 1167 988 # 989 + # CONFIG_MFD_CORE is not set 990 + # CONFIG_MFD_88PM860X is not set 1168 991 # CONFIG_MFD_SM501 is not set 1169 992 # CONFIG_HTC_PASIC3 is not set 1170 - 1171 - # 1172 - # Multimedia devices 1173 - # 1174 - 1175 - # 1176 - # Multimedia core support 1177 - # 1178 - # CONFIG_VIDEO_DEV is not set 1179 - # CONFIG_DVB_CORE is not set 1180 - # CONFIG_VIDEO_MEDIA is not set 1181 - 1182 - # 1183 - # Multimedia drivers 1184 - # 1185 - # CONFIG_DAB is not set 993 + # CONFIG_TWL4030_CORE is not set 994 + # CONFIG_MFD_TMIO is not set 995 + # CONFIG_PMIC_DA903X is not set 996 + # CONFIG_PMIC_ADP5520 is not set 997 + # CONFIG_MFD_MAX8925 is not set 998 + # CONFIG_MFD_WM8400 is not set 999 + # CONFIG_MFD_WM831X is not set 1000 + # CONFIG_MFD_WM8350_I2C is not set 1001 + # CONFIG_MFD_WM8994 is not set 1002 + # CONFIG_MFD_PCF50633 is not set 1003 + # CONFIG_AB3100_CORE is not set 1004 + # CONFIG_LPC_SCH is not set 1005 + # CONFIG_REGULATOR is not set 1006 + # CONFIG_MEDIA_SUPPORT is not set 1186 1007 1187 1008 # 1188 1009 # Graphics support 1189 1010 # 1011 + CONFIG_VGA_ARB=y 1012 + CONFIG_VGA_ARB_MAX_GPUS=16 1190 1013 # CONFIG_DRM is not set 1191 1014 # CONFIG_VGASTATE is not set 1192 1015 # CONFIG_VIDEO_OUTPUT_CONTROL is not set ··· 1201 1016 # Display device support 1202 1017 # 1203 1018 # CONFIG_DISPLAY_SUPPORT is not set 1204 - 1205 - # 1206 - # Sound 1207 - # 1208 1019 # CONFIG_SOUND is not set 1209 1020 CONFIG_USB_SUPPORT=y 1210 1021 CONFIG_USB_ARCH_HAS_HCD=y ··· 1211 1030 # CONFIG_USB_OTG_BLACKLIST_HUB is not set 1212 1031 1213 1032 # 1214 - # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1033 + # Enable Host or Gadget support to see Inventra options 1034 + # 1035 + 1036 + # 1037 + # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may 1215 1038 # 1216 1039 # CONFIG_USB_GADGET is not set 1040 + 1041 + # 1042 + # OTG and related infrastructure 1043 + # 1044 + # CONFIG_UWB is not set 1217 1045 # CONFIG_MMC is not set 1218 1046 # CONFIG_MEMSTICK is not set 1219 1047 # CONFIG_NEW_LEDS is not set ··· 1230 1040 # CONFIG_INFINIBAND is not set 1231 1041 CONFIG_RTC_LIB=y 1232 1042 # CONFIG_RTC_CLASS is not set 1043 + # CONFIG_DMADEVICES is not set 1044 + # CONFIG_AUXDISPLAY is not set 1233 1045 # CONFIG_UIO is not set 1046 + 1047 + # 1048 + # TI VLYNQ 1049 + # 1050 + # CONFIG_STAGING is not set 1234 1051 1235 1052 # 1236 1053 # File systems 1237 1054 # 1238 1055 CONFIG_EXT2_FS=m 1239 1056 CONFIG_EXT2_FS_XATTR=y 1240 - # CONFIG_EXT2_FS_POSIX_ACL is not set 1241 - # CONFIG_EXT2_FS_SECURITY is not set 1242 - # CONFIG_EXT2_FS_XIP is not set 1243 - CONFIG_EXT3_FS=y 1057 + CONFIG_EXT2_FS_POSIX_ACL=y 1058 + CONFIG_EXT2_FS_SECURITY=y 1059 + CONFIG_EXT2_FS_XIP=y 1060 + CONFIG_EXT3_FS=m 1061 + CONFIG_EXT3_DEFAULTS_TO_ORDERED=y 1244 1062 CONFIG_EXT3_FS_XATTR=y 1245 - # CONFIG_EXT3_FS_POSIX_ACL is not set 1246 - # CONFIG_EXT3_FS_SECURITY is not set 1247 - # CONFIG_EXT4DEV_FS is not set 1248 - CONFIG_JBD=y 1063 + CONFIG_EXT3_FS_POSIX_ACL=y 1064 + CONFIG_EXT3_FS_SECURITY=y 1065 + CONFIG_EXT4_FS=y 1066 + CONFIG_EXT4_FS_XATTR=y 1067 + CONFIG_EXT4_FS_POSIX_ACL=y 1068 + CONFIG_EXT4_FS_SECURITY=y 1069 + # CONFIG_EXT4_DEBUG is not set 1070 + CONFIG_FS_XIP=y 1071 + CONFIG_JBD=m 1072 + CONFIG_JBD2=y 1249 1073 CONFIG_FS_MBCACHE=y 1250 1074 # CONFIG_REISERFS_FS is not set 1251 1075 # CONFIG_JFS_FS is not set 1252 - # CONFIG_FS_POSIX_ACL is not set 1076 + CONFIG_FS_POSIX_ACL=y 1253 1077 # CONFIG_XFS_FS is not set 1254 1078 # CONFIG_GFS2_FS is not set 1255 1079 # CONFIG_OCFS2_FS is not set 1080 + # CONFIG_BTRFS_FS is not set 1081 + # CONFIG_NILFS2_FS is not set 1082 + CONFIG_FILE_LOCKING=y 1083 + CONFIG_FSNOTIFY=y 1256 1084 CONFIG_DNOTIFY=y 1257 1085 CONFIG_INOTIFY=y 1258 1086 CONFIG_INOTIFY_USER=y 1259 1087 CONFIG_QUOTA=y 1260 1088 CONFIG_QUOTA_NETLINK_INTERFACE=y 1261 1089 # CONFIG_PRINT_QUOTA_WARNING is not set 1090 + CONFIG_QUOTA_TREE=m 1262 1091 # CONFIG_QFMT_V1 is not set 1263 1092 CONFIG_QFMT_V2=m 1264 1093 CONFIG_QUOTACTL=y 1265 1094 CONFIG_AUTOFS_FS=m 1266 1095 CONFIG_AUTOFS4_FS=m 1267 1096 CONFIG_FUSE_FS=m 1097 + # CONFIG_CUSE is not set 1098 + 1099 + # 1100 + # Caches 1101 + # 1102 + # CONFIG_FSCACHE is not set 1268 1103 1269 1104 # 1270 1105 # CD-ROM/DVD Filesystems ··· 1318 1103 CONFIG_PROC_FS=y 1319 1104 CONFIG_PROC_KCORE=y 1320 1105 CONFIG_PROC_SYSCTL=y 1106 + CONFIG_PROC_PAGE_MONITOR=y 1321 1107 CONFIG_SYSFS=y 1322 1108 CONFIG_TMPFS=y 1323 1109 # CONFIG_TMPFS_POSIX_ACL is not set 1324 1110 # CONFIG_HUGETLB_PAGE is not set 1325 1111 CONFIG_CONFIGFS_FS=m 1326 - 1327 - # 1328 - # Miscellaneous filesystems 1329 - # 1112 + CONFIG_MISC_FILESYSTEMS=y 1330 1113 # CONFIG_ADFS_FS is not set 1331 1114 # CONFIG_AFFS_FS is not set 1332 1115 # CONFIG_ECRYPT_FS is not set ··· 1333 1120 # CONFIG_BEFS_FS is not set 1334 1121 # CONFIG_BFS_FS is not set 1335 1122 # CONFIG_EFS_FS is not set 1123 + # CONFIG_LOGFS is not set 1336 1124 # CONFIG_CRAMFS is not set 1125 + # CONFIG_SQUASHFS is not set 1337 1126 # CONFIG_VXFS_FS is not set 1338 1127 # CONFIG_MINIX_FS is not set 1128 + # CONFIG_OMFS_FS is not set 1339 1129 # CONFIG_HPFS_FS is not set 1340 1130 # CONFIG_QNX4FS_FS is not set 1341 1131 # CONFIG_ROMFS_FS is not set ··· 1349 1133 CONFIG_NFS_V3=y 1350 1134 # CONFIG_NFS_V3_ACL is not set 1351 1135 # CONFIG_NFS_V4 is not set 1352 - # CONFIG_NFSD is not set 1353 1136 CONFIG_ROOT_NFS=y 1137 + # CONFIG_NFSD is not set 1354 1138 CONFIG_LOCKD=y 1355 1139 CONFIG_LOCKD_V4=y 1356 1140 CONFIG_NFS_COMMON=y 1357 1141 CONFIG_SUNRPC=y 1358 - # CONFIG_SUNRPC_BIND34 is not set 1359 - # CONFIG_RPCSEC_GSS_KRB5 is not set 1360 - # CONFIG_RPCSEC_GSS_SPKM3 is not set 1142 + CONFIG_SUNRPC_GSS=m 1143 + CONFIG_RPCSEC_GSS_KRB5=m 1144 + CONFIG_RPCSEC_GSS_SPKM3=m 1361 1145 # CONFIG_SMB_FS is not set 1146 + # CONFIG_CEPH_FS is not set 1362 1147 # CONFIG_CIFS is not set 1363 1148 # CONFIG_NCP_FS is not set 1364 1149 # CONFIG_CODA_FS is not set ··· 1422 1205 CONFIG_ENABLE_MUST_CHECK=y 1423 1206 CONFIG_FRAME_WARN=2048 1424 1207 CONFIG_MAGIC_SYSRQ=y 1208 + # CONFIG_STRIP_ASM_SYMS is not set 1425 1209 # CONFIG_UNUSED_SYMBOLS is not set 1426 1210 # CONFIG_DEBUG_FS is not set 1427 1211 # CONFIG_HEADERS_CHECK is not set 1428 1212 CONFIG_DEBUG_KERNEL=y 1429 1213 # CONFIG_DEBUG_SHIRQ is not set 1430 1214 CONFIG_DETECT_SOFTLOCKUP=y 1215 + # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set 1216 + CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 1217 + CONFIG_DETECT_HUNG_TASK=y 1218 + # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set 1219 + CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 1431 1220 CONFIG_SCHED_DEBUG=y 1432 1221 # CONFIG_SCHEDSTATS is not set 1433 1222 # CONFIG_TIMER_STATS is not set ··· 1442 1219 # CONFIG_DEBUG_RT_MUTEXES is not set 1443 1220 # CONFIG_RT_MUTEX_TESTER is not set 1444 1221 # CONFIG_DEBUG_SPINLOCK is not set 1445 - CONFIG_DEBUG_MUTEXES=y 1222 + # CONFIG_DEBUG_MUTEXES is not set 1446 1223 # CONFIG_DEBUG_LOCK_ALLOC is not set 1447 1224 # CONFIG_PROVE_LOCKING is not set 1448 1225 # CONFIG_LOCK_STAT is not set 1449 - # CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1226 + CONFIG_DEBUG_SPINLOCK_SLEEP=y 1450 1227 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1451 1228 # CONFIG_DEBUG_KOBJECT is not set 1452 1229 # CONFIG_DEBUG_INFO is not set 1453 1230 # CONFIG_DEBUG_VM is not set 1454 1231 # CONFIG_DEBUG_WRITECOUNT is not set 1455 - # CONFIG_DEBUG_LIST is not set 1232 + CONFIG_DEBUG_MEMORY_INIT=y 1233 + CONFIG_DEBUG_LIST=y 1456 1234 # CONFIG_DEBUG_SG is not set 1235 + # CONFIG_DEBUG_NOTIFIERS is not set 1236 + # CONFIG_DEBUG_CREDENTIALS is not set 1457 1237 # CONFIG_BOOT_PRINTK_DELAY is not set 1458 1238 # CONFIG_RCU_TORTURE_TEST is not set 1239 + CONFIG_RCU_CPU_STALL_DETECTOR=y 1459 1240 # CONFIG_BACKTRACE_SELF_TEST is not set 1241 + # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set 1242 + # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set 1460 1243 # CONFIG_FAULT_INJECTION is not set 1244 + # CONFIG_SYSCTL_SYSCALL_CHECK is not set 1245 + # CONFIG_PAGE_POISONING is not set 1246 + CONFIG_HAVE_FUNCTION_TRACER=y 1247 + CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 1248 + CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 1249 + CONFIG_HAVE_DYNAMIC_FTRACE=y 1250 + CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1251 + CONFIG_TRACING_SUPPORT=y 1252 + CONFIG_FTRACE=y 1253 + # CONFIG_FUNCTION_TRACER is not set 1254 + # CONFIG_IRQSOFF_TRACER is not set 1255 + # CONFIG_SCHED_TRACER is not set 1256 + # CONFIG_ENABLE_DEFAULT_TRACERS is not set 1257 + # CONFIG_BOOT_TRACER is not set 1258 + CONFIG_BRANCH_PROFILE_NONE=y 1259 + # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set 1260 + # CONFIG_PROFILE_ALL_BRANCHES is not set 1261 + # CONFIG_STACK_TRACER is not set 1262 + # CONFIG_KMEMTRACE is not set 1263 + # CONFIG_WORKQUEUE_TRACER is not set 1264 + # CONFIG_BLK_DEV_IO_TRACE is not set 1461 1265 # CONFIG_SAMPLES is not set 1266 + CONFIG_HAVE_ARCH_KGDB=y 1267 + # CONFIG_KGDB is not set 1268 + CONFIG_EARLY_PRINTK=y 1462 1269 # CONFIG_CMDLINE_BOOL is not set 1463 1270 # CONFIG_DEBUG_STACK_USAGE is not set 1464 1271 # CONFIG_SB1XXX_CORELIS is not set ··· 1499 1246 # 1500 1247 CONFIG_KEYS=y 1501 1248 CONFIG_KEYS_DEBUG_PROC_KEYS=y 1502 - # CONFIG_SECURITY is not set 1503 - # CONFIG_SECURITY_FILE_CAPABILITIES is not set 1249 + CONFIG_SECURITY=y 1250 + # CONFIG_SECURITYFS is not set 1251 + CONFIG_SECURITY_NETWORK=y 1252 + CONFIG_SECURITY_NETWORK_XFRM=y 1253 + # CONFIG_SECURITY_PATH is not set 1254 + CONFIG_LSM_MMAP_MIN_ADDR=65536 1255 + CONFIG_SECURITY_SELINUX=y 1256 + CONFIG_SECURITY_SELINUX_BOOTPARAM=y 1257 + CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 1258 + CONFIG_SECURITY_SELINUX_DISABLE=y 1259 + CONFIG_SECURITY_SELINUX_DEVELOP=y 1260 + CONFIG_SECURITY_SELINUX_AVC_STATS=y 1261 + CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 1262 + # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set 1263 + # CONFIG_SECURITY_SMACK is not set 1264 + # CONFIG_SECURITY_TOMOYO is not set 1265 + # CONFIG_DEFAULT_SECURITY_SELINUX is not set 1266 + # CONFIG_DEFAULT_SECURITY_SMACK is not set 1267 + # CONFIG_DEFAULT_SECURITY_TOMOYO is not set 1268 + CONFIG_DEFAULT_SECURITY_DAC=y 1269 + CONFIG_DEFAULT_SECURITY="" 1504 1270 CONFIG_CRYPTO=y 1505 1271 1506 1272 # 1507 1273 # Crypto core or helper 1508 1274 # 1275 + # CONFIG_CRYPTO_FIPS is not set 1509 1276 CONFIG_CRYPTO_ALGAPI=y 1277 + CONFIG_CRYPTO_ALGAPI2=y 1510 1278 CONFIG_CRYPTO_AEAD=m 1279 + CONFIG_CRYPTO_AEAD2=y 1511 1280 CONFIG_CRYPTO_BLKCIPHER=y 1281 + CONFIG_CRYPTO_BLKCIPHER2=y 1512 1282 CONFIG_CRYPTO_HASH=y 1283 + CONFIG_CRYPTO_HASH2=y 1284 + CONFIG_CRYPTO_RNG=m 1285 + CONFIG_CRYPTO_RNG2=y 1286 + CONFIG_CRYPTO_PCOMP=y 1513 1287 CONFIG_CRYPTO_MANAGER=y 1288 + CONFIG_CRYPTO_MANAGER2=y 1514 1289 CONFIG_CRYPTO_GF128MUL=m 1515 1290 CONFIG_CRYPTO_NULL=y 1291 + # CONFIG_CRYPTO_PCRYPT is not set 1292 + CONFIG_CRYPTO_WORKQUEUE=y 1516 1293 # CONFIG_CRYPTO_CRYPTD is not set 1517 1294 CONFIG_CRYPTO_AUTHENC=m 1518 1295 # CONFIG_CRYPTO_TEST is not set ··· 1559 1276 # 1560 1277 CONFIG_CRYPTO_CBC=m 1561 1278 CONFIG_CRYPTO_CTR=m 1562 - # CONFIG_CRYPTO_CTS is not set 1279 + CONFIG_CRYPTO_CTS=m 1563 1280 CONFIG_CRYPTO_ECB=m 1564 1281 CONFIG_CRYPTO_LRW=m 1565 1282 CONFIG_CRYPTO_PCBC=m ··· 1570 1287 # 1571 1288 CONFIG_CRYPTO_HMAC=y 1572 1289 CONFIG_CRYPTO_XCBC=m 1290 + CONFIG_CRYPTO_VMAC=m 1573 1291 1574 1292 # 1575 1293 # Digest 1576 1294 # 1577 - # CONFIG_CRYPTO_CRC32C is not set 1295 + CONFIG_CRYPTO_CRC32C=m 1296 + CONFIG_CRYPTO_GHASH=m 1578 1297 CONFIG_CRYPTO_MD4=m 1579 1298 CONFIG_CRYPTO_MD5=y 1580 1299 CONFIG_CRYPTO_MICHAEL_MIC=m 1300 + CONFIG_CRYPTO_RMD128=m 1301 + CONFIG_CRYPTO_RMD160=m 1302 + CONFIG_CRYPTO_RMD256=m 1303 + CONFIG_CRYPTO_RMD320=m 1581 1304 CONFIG_CRYPTO_SHA1=m 1582 1305 CONFIG_CRYPTO_SHA256=m 1583 1306 CONFIG_CRYPTO_SHA512=m ··· 1614 1325 # Compression 1615 1326 # 1616 1327 CONFIG_CRYPTO_DEFLATE=m 1617 - # CONFIG_CRYPTO_LZO is not set 1328 + CONFIG_CRYPTO_ZLIB=m 1329 + CONFIG_CRYPTO_LZO=m 1330 + 1331 + # 1332 + # Random Number Generation 1333 + # 1334 + CONFIG_CRYPTO_ANSI_CPRNG=m 1618 1335 CONFIG_CRYPTO_HW=y 1619 1336 # CONFIG_CRYPTO_DEV_HIFN_795X is not set 1337 + # CONFIG_BINARY_PRINTF is not set 1620 1338 1621 1339 # 1622 1340 # Library routines 1623 1341 # 1624 1342 CONFIG_BITREVERSE=y 1625 - # CONFIG_GENERIC_FIND_FIRST_BIT is not set 1343 + CONFIG_GENERIC_FIND_LAST_BIT=y 1626 1344 CONFIG_CRC_CCITT=m 1627 - # CONFIG_CRC16 is not set 1345 + CONFIG_CRC16=y 1346 + CONFIG_CRC_T10DIF=m 1628 1347 CONFIG_CRC_ITU_T=m 1629 1348 CONFIG_CRC32=y 1630 - # CONFIG_CRC7 is not set 1349 + CONFIG_CRC7=m 1631 1350 CONFIG_LIBCRC32C=m 1632 1351 CONFIG_AUDIT_GENERIC=y 1633 - CONFIG_ZLIB_INFLATE=m 1352 + CONFIG_ZLIB_INFLATE=y 1634 1353 CONFIG_ZLIB_DEFLATE=m 1635 - CONFIG_PLIST=y 1354 + CONFIG_LZO_COMPRESS=m 1355 + CONFIG_LZO_DECOMPRESS=m 1356 + CONFIG_DECOMPRESS_GZIP=y 1636 1357 CONFIG_HAS_IOMEM=y 1637 1358 CONFIG_HAS_IOPORT=y 1638 1359 CONFIG_HAS_DMA=y 1360 + CONFIG_NLATTR=y

+4 -2

arch/mips/include/asm/abi.h

··· 13 13 #include <asm/siginfo.h> 14 14 15 15 struct mips_abi { 16 - int (* const setup_frame)(struct k_sigaction * ka, 16 + int (* const setup_frame)(void *sig_return, struct k_sigaction *ka, 17 17 struct pt_regs *regs, int signr, 18 18 sigset_t *set); 19 - int (* const setup_rt_frame)(struct k_sigaction * ka, 19 + const unsigned long signal_return_offset; 20 + int (* const setup_rt_frame)(void *sig_return, struct k_sigaction *ka, 20 21 struct pt_regs *regs, int signr, 21 22 sigset_t *set, siginfo_t *info); 23 + const unsigned long rt_signal_return_offset; 22 24 const unsigned long restart; 23 25 }; 24 26

+5

arch/mips/include/asm/elf.h

··· 310 310 311 311 #endif /* CONFIG_64BIT */ 312 312 313 + struct pt_regs; 313 314 struct task_struct; 314 315 315 316 extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); ··· 368 367 #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) 369 368 #endif 370 369 370 + #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 371 + struct linux_binprm; 372 + extern int arch_setup_additional_pages(struct linux_binprm *bprm, 373 + int uses_interp); 371 374 #endif /* _ASM_ELF_H */

+5 -1

arch/mips/include/asm/fpu_emulator.h

··· 41 41 DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); 42 42 43 43 #define MIPS_FPU_EMU_INC_STATS(M) \ 44 - cpu_local_wrap(__local_inc(&__get_cpu_var(fpuemustats).M)) 44 + do { \ 45 + preempt_disable(); \ 46 + __local_inc(&__get_cpu_var(fpuemustats).M); \ 47 + preempt_enable(); \ 48 + } while (0) 45 49 46 50 #else 47 51 #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)

+15

arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h

··· 85 85 RSET_TIMER, 86 86 RSET_WDT, 87 87 RSET_UART0, 88 + RSET_UART1, 88 89 RSET_GPIO, 89 90 RSET_SPI, 90 91 RSET_UDC0, ··· 124 123 #define BCM_6338_TIMER_BASE (0xfffe0200) 125 124 #define BCM_6338_WDT_BASE (0xfffe021c) 126 125 #define BCM_6338_UART0_BASE (0xfffe0300) 126 + #define BCM_6338_UART1_BASE (0xdeadbeef) 127 127 #define BCM_6338_GPIO_BASE (0xfffe0400) 128 128 #define BCM_6338_SPI_BASE (0xfffe0c00) 129 129 #define BCM_6338_UDC0_BASE (0xdeadbeef) ··· 155 153 #define BCM_6345_TIMER_BASE (0xfffe0200) 156 154 #define BCM_6345_WDT_BASE (0xfffe021c) 157 155 #define BCM_6345_UART0_BASE (0xfffe0300) 156 + #define BCM_6345_UART1_BASE (0xdeadbeef) 158 157 #define BCM_6345_GPIO_BASE (0xfffe0400) 159 158 #define BCM_6345_SPI_BASE (0xdeadbeef) 160 159 #define BCM_6345_UDC0_BASE (0xdeadbeef) ··· 185 182 #define BCM_6348_TIMER_BASE (0xfffe0200) 186 183 #define BCM_6348_WDT_BASE (0xfffe021c) 187 184 #define BCM_6348_UART0_BASE (0xfffe0300) 185 + #define BCM_6348_UART1_BASE (0xdeadbeef) 188 186 #define BCM_6348_GPIO_BASE (0xfffe0400) 189 187 #define BCM_6348_SPI_BASE (0xfffe0c00) 190 188 #define BCM_6348_UDC0_BASE (0xfffe1000) ··· 212 208 #define BCM_6358_TIMER_BASE (0xfffe0040) 213 209 #define BCM_6358_WDT_BASE (0xfffe005c) 214 210 #define BCM_6358_UART0_BASE (0xfffe0100) 211 + #define BCM_6358_UART1_BASE (0xfffe0120) 215 212 #define BCM_6358_GPIO_BASE (0xfffe0080) 216 213 #define BCM_6358_SPI_BASE (0xdeadbeef) 217 214 #define BCM_6358_UDC0_BASE (0xfffe0800) ··· 251 246 return BCM_6338_WDT_BASE; 252 247 case RSET_UART0: 253 248 return BCM_6338_UART0_BASE; 249 + case RSET_UART1: 250 + return BCM_6338_UART1_BASE; 254 251 case RSET_GPIO: 255 252 return BCM_6338_GPIO_BASE; 256 253 case RSET_SPI: ··· 299 292 return BCM_6345_WDT_BASE; 300 293 case RSET_UART0: 301 294 return BCM_6345_UART0_BASE; 295 + case RSET_UART1: 296 + return BCM_6345_UART1_BASE; 302 297 case RSET_GPIO: 303 298 return BCM_6345_GPIO_BASE; 304 299 case RSET_SPI: ··· 347 338 return BCM_6348_WDT_BASE; 348 339 case RSET_UART0: 349 340 return BCM_6348_UART0_BASE; 341 + case RSET_UART1: 342 + return BCM_6348_UART1_BASE; 350 343 case RSET_GPIO: 351 344 return BCM_6348_GPIO_BASE; 352 345 case RSET_SPI: ··· 395 384 return BCM_6358_WDT_BASE; 396 385 case RSET_UART0: 397 386 return BCM_6358_UART0_BASE; 387 + case RSET_UART1: 388 + return BCM_6358_UART1_BASE; 398 389 case RSET_GPIO: 399 390 return BCM_6358_GPIO_BASE; 400 391 case RSET_SPI: ··· 442 429 enum bcm63xx_irq { 443 430 IRQ_TIMER = 0, 444 431 IRQ_UART0, 432 + IRQ_UART1, 445 433 IRQ_DSL, 446 434 IRQ_ENET0, 447 435 IRQ_ENET1, ··· 524 510 */ 525 511 #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) 526 512 #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) 513 + #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3) 527 514 #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) 528 515 #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) 529 516 #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)

+6

arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h

··· 1 + #ifndef BCM63XX_DEV_UART_H_ 2 + #define BCM63XX_DEV_UART_H_ 3 + 4 + int bcm63xx_uart_register(unsigned int id); 5 + 6 + #endif /* BCM63XX_DEV_UART_H_ */

+4

arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h

··· 10 10 switch (bcm63xx_get_cpu_id()) { 11 11 case BCM6358_CPU_ID: 12 12 return 40; 13 + case BCM6338_CPU_ID: 14 + return 8; 15 + case BCM6345_CPU_ID: 16 + return 16; 13 17 case BCM6348_CPU_ID: 14 18 default: 15 19 return 37;

+2

arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h

··· 45 45 unsigned int has_ohci0:1; 46 46 unsigned int has_ehci0:1; 47 47 unsigned int has_dsp:1; 48 + unsigned int has_uart0:1; 49 + unsigned int has_uart1:1; 48 50 49 51 /* ethernet config */ 50 52 struct bcm63xx_enet_platform_data enet0;

+1 -1

arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h

··· 24 24 #define cpu_has_smartmips 0 25 25 #define cpu_has_vtag_icache 0 26 26 27 - #if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345)) 27 + #if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCM63XX_CPU_6348) || defined(CONFIG_BCM63XX_CPU_6345) || defined(CONFIG_BCM63XX_CPU_6338)) 28 28 #define cpu_has_dc_aliases 0 29 29 #endif 30 30

+5 -1

arch/mips/include/asm/mach-sibyte/war.h

··· 16 16 #if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \ 17 17 defined(CONFIG_SB1_PASS_2_WORKAROUNDS) 18 18 19 - #define BCM1250_M3_WAR 1 19 + #ifndef __ASSEMBLY__ 20 + extern int sb1250_m3_workaround_needed(void); 21 + #endif 22 + 23 + #define BCM1250_M3_WAR sb1250_m3_workaround_needed() 20 24 #define SIBYTE_1956_WAR 1 21 25 22 26 #else

+4 -1

arch/mips/include/asm/mmu.h

··· 1 1 #ifndef __ASM_MMU_H 2 2 #define __ASM_MMU_H 3 3 4 - typedef unsigned long mm_context_t[NR_CPUS]; 4 + typedef struct { 5 + unsigned long asid[NR_CPUS]; 6 + void *vdso; 7 + } mm_context_t; 5 8 6 9 #endif /* __ASM_MMU_H */

+1 -1

arch/mips/include/asm/mmu_context.h

··· 104 104 105 105 #endif 106 106 107 - #define cpu_context(cpu, mm) ((mm)->context[cpu]) 107 + #define cpu_context(cpu, mm) ((mm)->context.asid[cpu]) 108 108 #define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & ASID_MASK) 109 109 #define asid_cache(cpu) (cpu_data[cpu].asid_cache) 110 110

+4 -2

arch/mips/include/asm/page.h

··· 188 188 #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 189 189 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 190 190 191 - #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) 192 - #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) 191 + #define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \ 192 + PHYS_OFFSET) 193 + #define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \ 194 + PHYS_OFFSET) 193 195 194 196 #include <asm-generic/memory_model.h> 195 197 #include <asm-generic/getorder.h>

+9 -2

arch/mips/include/asm/processor.h

··· 33 33 34 34 extern unsigned int vced_count, vcei_count; 35 35 36 + /* 37 + * A special page (the vdso) is mapped into all processes at the very 38 + * top of the virtual memory space. 39 + */ 40 + #define SPECIAL_PAGES_SIZE PAGE_SIZE 41 + 36 42 #ifdef CONFIG_32BIT 37 43 /* 38 44 * User space process size: 2GB. This is hardcoded into a few places, 39 45 * so don't change it unless you know what you are doing. 40 46 */ 41 47 #define TASK_SIZE 0x7fff8000UL 42 - #define STACK_TOP TASK_SIZE 48 + #define STACK_TOP ((TASK_SIZE & PAGE_MASK) - SPECIAL_PAGES_SIZE) 43 49 44 50 /* 45 51 * This decides where the kernel will search for a free chunk of vm ··· 65 59 #define TASK_SIZE32 0x7fff8000UL 66 60 #define TASK_SIZE 0x10000000000UL 67 61 #define STACK_TOP \ 68 - (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE) 62 + (((test_thread_flag(TIF_32BIT_ADDR) ? \ 63 + TASK_SIZE32 : TASK_SIZE) & PAGE_MASK) - SPECIAL_PAGES_SIZE) 69 64 70 65 /* 71 66 * This decides where the kernel will search for a free chunk of vm

+19

arch/mips/include/asm/stackframe.h

··· 121 121 .endm 122 122 #else 123 123 .macro get_saved_sp /* Uniprocessor variation */ 124 + #ifdef CONFIG_CPU_LOONGSON2F 125 + /* 126 + * Clear BTB (branch target buffer), forbid RAS (return address 127 + * stack) to workaround the Out-of-order Issue in Loongson2F 128 + * via its diagnostic register. 129 + */ 130 + move k0, ra 131 + jal 1f 132 + nop 133 + 1: jal 1f 134 + nop 135 + 1: jal 1f 136 + nop 137 + 1: jal 1f 138 + nop 139 + 1: move ra, k0 140 + li k0, 3 141 + mtc0 k0, $22 142 + #endif /* CONFIG_CPU_LOONGSON2F */ 124 143 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) 125 144 lui k1, %hi(kernelsp) 126 145 #else

+2

arch/mips/include/asm/uasm.h

··· 84 84 Ip_u1u2u3(_mfc0); 85 85 Ip_u1u2u3(_mtc0); 86 86 Ip_u2u1u3(_ori); 87 + Ip_u3u1u2(_or); 87 88 Ip_u2s3u1(_pref); 88 89 Ip_0(_rfe); 89 90 Ip_u2s3u1(_sc); ··· 103 102 Ip_u3u1u2(_xor); 104 103 Ip_u2u1u3(_xori); 105 104 Ip_u2u1msbu3(_dins); 105 + Ip_u1(_syscall); 106 106 107 107 /* Handle labels. */ 108 108 struct uasm_label {

+29

arch/mips/include/asm/vdso.h

··· 1 + /* 2 + * This file is subject to the terms and conditions of the GNU General Public 3 + * License. See the file "COPYING" in the main directory of this archive 4 + * for more details. 5 + * 6 + * Copyright (C) 2009 Cavium Networks 7 + */ 8 + 9 + #ifndef __ASM_VDSO_H 10 + #define __ASM_VDSO_H 11 + 12 + #include <linux/types.h> 13 + 14 + 15 + #ifdef CONFIG_32BIT 16 + struct mips_vdso { 17 + u32 signal_trampoline[2]; 18 + u32 rt_signal_trampoline[2]; 19 + }; 20 + #else /* !CONFIG_32BIT */ 21 + struct mips_vdso { 22 + u32 o32_signal_trampoline[2]; 23 + u32 o32_rt_signal_trampoline[2]; 24 + u32 rt_signal_trampoline[2]; 25 + u32 n32_rt_signal_trampoline[2]; 26 + }; 27 + #endif /* CONFIG_32BIT */ 28 + 29 + #endif /* __ASM_VDSO_H */

+1 -1

arch/mips/kernel/Makefile

··· 6 6 7 7 obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ 8 8 ptrace.o reset.o setup.o signal.o syscall.o \ 9 - time.o topology.o traps.o unaligned.o watch.o 9 + time.o topology.o traps.o unaligned.o watch.o vdso.o 10 10 11 11 ifdef CONFIG_FUNCTION_TRACER 12 12 CFLAGS_REMOVE_ftrace.o = -pg

+4

arch/mips/kernel/cpufreq/loongson2_clock.c

··· 164 164 spin_unlock_irqrestore(&loongson2_wait_lock, flags); 165 165 } 166 166 EXPORT_SYMBOL_GPL(loongson2_cpu_wait); 167 + 168 + MODULE_AUTHOR("Yanhua <yanh@lemote.com>"); 169 + MODULE_DESCRIPTION("cpufreq driver for Loongson 2F"); 170 + MODULE_LICENSE("GPL");

+6 -1

arch/mips/kernel/process.c

··· 63 63 64 64 smtc_idle_loop_hook(); 65 65 #endif 66 - if (cpu_wait) 66 + 67 + if (cpu_wait) { 68 + /* Don't trace irqs off for idle */ 69 + stop_critical_timings(); 67 70 (*cpu_wait)(); 71 + start_critical_timings(); 72 + } 68 73 } 69 74 #ifdef CONFIG_HOTPLUG_CPU 70 75 if (!cpu_online(cpu) && !cpu_isset(cpu, cpu_callin_map) &&

-5

arch/mips/kernel/signal-common.h

··· 26 26 */ 27 27 extern void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, 28 28 size_t frame_size); 29 - /* 30 - * install trampoline code to get back from the sig handler 31 - */ 32 - extern int install_sigtramp(unsigned int __user *tramp, unsigned int syscall); 33 - 34 29 /* Check and clear pending FPU exceptions in saved CSR */ 35 30 extern int fpcsr_pending(unsigned int __user *fpcsr); 36 31

+19 -67

arch/mips/kernel/signal.c

··· 32 32 #include <asm/ucontext.h> 33 33 #include <asm/cpu-features.h> 34 34 #include <asm/war.h> 35 + #include <asm/vdso.h> 35 36 36 37 #include "signal-common.h" 37 38 ··· 45 44 extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc); 46 45 extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc); 47 46 48 - /* 49 - * Horribly complicated - with the bloody RM9000 workarounds enabled 50 - * the signal trampolines is moving to the end of the structure so we can 51 - * increase the alignment without breaking software compatibility. 52 - */ 53 - #if ICACHE_REFILLS_WORKAROUND_WAR == 0 54 - 55 47 struct sigframe { 56 48 u32 sf_ass[4]; /* argument save space for o32 */ 57 - u32 sf_code[2]; /* signal trampoline */ 49 + u32 sf_pad[2]; /* Was: signal trampoline */ 58 50 struct sigcontext sf_sc; 59 51 sigset_t sf_mask; 60 52 }; 61 53 62 54 struct rt_sigframe { 63 55 u32 rs_ass[4]; /* argument save space for o32 */ 64 - u32 rs_code[2]; /* signal trampoline */ 56 + u32 rs_pad[2]; /* Was: signal trampoline */ 65 57 struct siginfo rs_info; 66 58 struct ucontext rs_uc; 67 59 }; 68 - 69 - #else 70 - 71 - struct sigframe { 72 - u32 sf_ass[4]; /* argument save space for o32 */ 73 - u32 sf_pad[2]; 74 - struct sigcontext sf_sc; /* hw context */ 75 - sigset_t sf_mask; 76 - u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */ 77 - }; 78 - 79 - struct rt_sigframe { 80 - u32 rs_ass[4]; /* argument save space for o32 */ 81 - u32 rs_pad[2]; 82 - struct siginfo rs_info; 83 - struct ucontext rs_uc; 84 - u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */ 85 - }; 86 - 87 - #endif 88 60 89 61 /* 90 62 * Helper routines ··· 238 264 sp = current->sas_ss_sp + current->sas_ss_size; 239 265 240 266 return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? ~(cpu_icache_line_size()-1) : ALMASK)); 241 - } 242 - 243 - int install_sigtramp(unsigned int __user *tramp, unsigned int syscall) 244 - { 245 - int err; 246 - 247 - /* 248 - * Set up the return code ... 249 - * 250 - * li v0, __NR__foo_sigreturn 251 - * syscall 252 - */ 253 - 254 - err = __put_user(0x24020000 + syscall, tramp + 0); 255 - err |= __put_user(0x0000000c , tramp + 1); 256 - if (ICACHE_REFILLS_WORKAROUND_WAR) { 257 - err |= __put_user(0, tramp + 2); 258 - err |= __put_user(0, tramp + 3); 259 - err |= __put_user(0, tramp + 4); 260 - err |= __put_user(0, tramp + 5); 261 - err |= __put_user(0, tramp + 6); 262 - err |= __put_user(0, tramp + 7); 263 - } 264 - flush_cache_sigtramp((unsigned long) tramp); 265 - 266 - return err; 267 267 } 268 268 269 269 /* ··· 432 484 } 433 485 434 486 #ifdef CONFIG_TRAD_SIGNALS 435 - static int setup_frame(struct k_sigaction * ka, struct pt_regs *regs, 436 - int signr, sigset_t *set) 487 + static int setup_frame(void *sig_return, struct k_sigaction *ka, 488 + struct pt_regs *regs, int signr, sigset_t *set) 437 489 { 438 490 struct sigframe __user *frame; 439 491 int err = 0; ··· 441 493 frame = get_sigframe(ka, regs, sizeof(*frame)); 442 494 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 443 495 goto give_sigsegv; 444 - 445 - err |= install_sigtramp(frame->sf_code, __NR_sigreturn); 446 496 447 497 err |= setup_sigcontext(regs, &frame->sf_sc); 448 498 err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set)); ··· 461 515 regs->regs[ 5] = 0; 462 516 regs->regs[ 6] = (unsigned long) &frame->sf_sc; 463 517 regs->regs[29] = (unsigned long) frame; 464 - regs->regs[31] = (unsigned long) frame->sf_code; 518 + regs->regs[31] = (unsigned long) sig_return; 465 519 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 466 520 467 521 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", ··· 475 529 } 476 530 #endif 477 531 478 - static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs, 479 - int signr, sigset_t *set, siginfo_t *info) 532 + static int setup_rt_frame(void *sig_return, struct k_sigaction *ka, 533 + struct pt_regs *regs, int signr, sigset_t *set, 534 + siginfo_t *info) 480 535 { 481 536 struct rt_sigframe __user *frame; 482 537 int err = 0; ··· 485 538 frame = get_sigframe(ka, regs, sizeof(*frame)); 486 539 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 487 540 goto give_sigsegv; 488 - 489 - err |= install_sigtramp(frame->rs_code, __NR_rt_sigreturn); 490 541 491 542 /* Create siginfo. */ 492 543 err |= copy_siginfo_to_user(&frame->rs_info, info); ··· 518 573 regs->regs[ 5] = (unsigned long) &frame->rs_info; 519 574 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 520 575 regs->regs[29] = (unsigned long) frame; 521 - regs->regs[31] = (unsigned long) frame->rs_code; 576 + regs->regs[31] = (unsigned long) sig_return; 522 577 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 523 578 524 579 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", ··· 535 590 struct mips_abi mips_abi = { 536 591 #ifdef CONFIG_TRAD_SIGNALS 537 592 .setup_frame = setup_frame, 593 + .signal_return_offset = offsetof(struct mips_vdso, signal_trampoline), 538 594 #endif 539 595 .setup_rt_frame = setup_rt_frame, 596 + .rt_signal_return_offset = 597 + offsetof(struct mips_vdso, rt_signal_trampoline), 540 598 .restart = __NR_restart_syscall 541 599 }; 542 600 ··· 547 599 struct k_sigaction *ka, sigset_t *oldset, struct pt_regs *regs) 548 600 { 549 601 int ret; 602 + struct mips_abi *abi = current->thread.abi; 603 + void *vdso = current->mm->context.vdso; 550 604 551 605 switch(regs->regs[0]) { 552 606 case ERESTART_RESTARTBLOCK: ··· 569 619 regs->regs[0] = 0; /* Don't deal with this again. */ 570 620 571 621 if (sig_uses_siginfo(ka)) 572 - ret = current->thread.abi->setup_rt_frame(ka, regs, sig, oldset, info); 622 + ret = abi->setup_rt_frame(vdso + abi->rt_signal_return_offset, 623 + ka, regs, sig, oldset, info); 573 624 else 574 - ret = current->thread.abi->setup_frame(ka, regs, sig, oldset); 625 + ret = abi->setup_frame(vdso + abi->signal_return_offset, 626 + ka, regs, sig, oldset); 575 627 576 628 spin_lock_irq(&current->sighand->siglock); 577 629 sigorsets(&current->blocked, &current->blocked, &ka->sa.sa_mask);

+14 -41

arch/mips/kernel/signal32.c

··· 32 32 #include <asm/system.h> 33 33 #include <asm/fpu.h> 34 34 #include <asm/war.h> 35 + #include <asm/vdso.h> 35 36 36 37 #include "signal-common.h" 37 38 ··· 48 47 /* 49 48 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 50 49 */ 51 - #define __NR_O32_sigreturn 4119 52 - #define __NR_O32_rt_sigreturn 4193 53 50 #define __NR_O32_restart_syscall 4253 54 51 55 52 /* 32-bit compatibility types */ ··· 76 77 compat_sigset_t uc_sigmask; /* mask last for extensibility */ 77 78 }; 78 79 79 - /* 80 - * Horribly complicated - with the bloody RM9000 workarounds enabled 81 - * the signal trampolines is moving to the end of the structure so we can 82 - * increase the alignment without breaking software compatibility. 83 - */ 84 - #if ICACHE_REFILLS_WORKAROUND_WAR == 0 85 - 86 80 struct sigframe32 { 87 81 u32 sf_ass[4]; /* argument save space for o32 */ 88 - u32 sf_code[2]; /* signal trampoline */ 82 + u32 sf_pad[2]; /* Was: signal trampoline */ 89 83 struct sigcontext32 sf_sc; 90 84 compat_sigset_t sf_mask; 91 85 }; 92 86 93 87 struct rt_sigframe32 { 94 88 u32 rs_ass[4]; /* argument save space for o32 */ 95 - u32 rs_code[2]; /* signal trampoline */ 89 + u32 rs_pad[2]; /* Was: signal trampoline */ 96 90 compat_siginfo_t rs_info; 97 91 struct ucontext32 rs_uc; 98 92 }; 99 - 100 - #else /* ICACHE_REFILLS_WORKAROUND_WAR */ 101 - 102 - struct sigframe32 { 103 - u32 sf_ass[4]; /* argument save space for o32 */ 104 - u32 sf_pad[2]; 105 - struct sigcontext32 sf_sc; /* hw context */ 106 - compat_sigset_t sf_mask; 107 - u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */ 108 - }; 109 - 110 - struct rt_sigframe32 { 111 - u32 rs_ass[4]; /* argument save space for o32 */ 112 - u32 rs_pad[2]; 113 - compat_siginfo_t rs_info; 114 - struct ucontext32 rs_uc; 115 - u32 rs_code[8] __attribute__((aligned(32))); /* signal trampoline */ 116 - }; 117 - 118 - #endif /* !ICACHE_REFILLS_WORKAROUND_WAR */ 119 93 120 94 /* 121 95 * sigcontext handlers ··· 570 598 force_sig(SIGSEGV, current); 571 599 } 572 600 573 - static int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 574 - int signr, sigset_t *set) 601 + static int setup_frame_32(void *sig_return, struct k_sigaction *ka, 602 + struct pt_regs *regs, int signr, sigset_t *set) 575 603 { 576 604 struct sigframe32 __user *frame; 577 605 int err = 0; ··· 579 607 frame = get_sigframe(ka, regs, sizeof(*frame)); 580 608 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 581 609 goto give_sigsegv; 582 - 583 - err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn); 584 610 585 611 err |= setup_sigcontext32(regs, &frame->sf_sc); 586 612 err |= __copy_conv_sigset_to_user(&frame->sf_mask, set); ··· 600 630 regs->regs[ 5] = 0; 601 631 regs->regs[ 6] = (unsigned long) &frame->sf_sc; 602 632 regs->regs[29] = (unsigned long) frame; 603 - regs->regs[31] = (unsigned long) frame->sf_code; 633 + regs->regs[31] = (unsigned long) sig_return; 604 634 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 605 635 606 636 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", ··· 614 644 return -EFAULT; 615 645 } 616 646 617 - static int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 618 - int signr, sigset_t *set, siginfo_t *info) 647 + static int setup_rt_frame_32(void *sig_return, struct k_sigaction *ka, 648 + struct pt_regs *regs, int signr, sigset_t *set, 649 + siginfo_t *info) 619 650 { 620 651 struct rt_sigframe32 __user *frame; 621 652 int err = 0; ··· 625 654 frame = get_sigframe(ka, regs, sizeof(*frame)); 626 655 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 627 656 goto give_sigsegv; 628 - 629 - err |= install_sigtramp(frame->rs_code, __NR_O32_rt_sigreturn); 630 657 631 658 /* Convert (siginfo_t -> compat_siginfo_t) and copy to user. */ 632 659 err |= copy_siginfo_to_user32(&frame->rs_info, info); ··· 659 690 regs->regs[ 5] = (unsigned long) &frame->rs_info; 660 691 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 661 692 regs->regs[29] = (unsigned long) frame; 662 - regs->regs[31] = (unsigned long) frame->rs_code; 693 + regs->regs[31] = (unsigned long) sig_return; 663 694 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 664 695 665 696 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", ··· 678 709 */ 679 710 struct mips_abi mips_abi_32 = { 680 711 .setup_frame = setup_frame_32, 712 + .signal_return_offset = 713 + offsetof(struct mips_vdso, o32_signal_trampoline), 681 714 .setup_rt_frame = setup_rt_frame_32, 715 + .rt_signal_return_offset = 716 + offsetof(struct mips_vdso, o32_rt_signal_trampoline), 682 717 .restart = __NR_O32_restart_syscall 683 718 }; 684 719

+6 -20

arch/mips/kernel/signal_n32.c

··· 39 39 #include <asm/fpu.h> 40 40 #include <asm/cpu-features.h> 41 41 #include <asm/war.h> 42 + #include <asm/vdso.h> 42 43 43 44 #include "signal-common.h" 44 45 45 46 /* 46 47 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 47 48 */ 48 - #define __NR_N32_rt_sigreturn 6211 49 49 #define __NR_N32_restart_syscall 6214 50 50 51 51 extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *); ··· 67 67 compat_sigset_t uc_sigmask; /* mask last for extensibility */ 68 68 }; 69 69 70 - #if ICACHE_REFILLS_WORKAROUND_WAR == 0 71 - 72 70 struct rt_sigframe_n32 { 73 71 u32 rs_ass[4]; /* argument save space for o32 */ 74 - u32 rs_code[2]; /* signal trampoline */ 72 + u32 rs_pad[2]; /* Was: signal trampoline */ 75 73 struct compat_siginfo rs_info; 76 74 struct ucontextn32 rs_uc; 77 75 }; 78 - 79 - #else /* ICACHE_REFILLS_WORKAROUND_WAR */ 80 - 81 - struct rt_sigframe_n32 { 82 - u32 rs_ass[4]; /* argument save space for o32 */ 83 - u32 rs_pad[2]; 84 - struct compat_siginfo rs_info; 85 - struct ucontextn32 rs_uc; 86 - u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */ 87 - }; 88 - 89 - #endif /* !ICACHE_REFILLS_WORKAROUND_WAR */ 90 76 91 77 extern void sigset_from_compat(sigset_t *set, compat_sigset_t *compat); 92 78 ··· 159 173 force_sig(SIGSEGV, current); 160 174 } 161 175 162 - static int setup_rt_frame_n32(struct k_sigaction * ka, 176 + static int setup_rt_frame_n32(void *sig_return, struct k_sigaction *ka, 163 177 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info) 164 178 { 165 179 struct rt_sigframe_n32 __user *frame; ··· 169 183 frame = get_sigframe(ka, regs, sizeof(*frame)); 170 184 if (!access_ok(VERIFY_WRITE, frame, sizeof (*frame))) 171 185 goto give_sigsegv; 172 - 173 - install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn); 174 186 175 187 /* Create siginfo. */ 176 188 err |= copy_siginfo_to_user32(&frame->rs_info, info); ··· 203 219 regs->regs[ 5] = (unsigned long) &frame->rs_info; 204 220 regs->regs[ 6] = (unsigned long) &frame->rs_uc; 205 221 regs->regs[29] = (unsigned long) frame; 206 - regs->regs[31] = (unsigned long) frame->rs_code; 222 + regs->regs[31] = (unsigned long) sig_return; 207 223 regs->cp0_epc = regs->regs[25] = (unsigned long) ka->sa.sa_handler; 208 224 209 225 DEBUGP("SIG deliver (%s:%d): sp=0x%p pc=0x%lx ra=0x%lx\n", ··· 219 235 220 236 struct mips_abi mips_abi_n32 = { 221 237 .setup_rt_frame = setup_rt_frame_n32, 238 + .rt_signal_return_offset = 239 + offsetof(struct mips_vdso, n32_rt_signal_trampoline), 222 240 .restart = __NR_N32_restart_syscall 223 241 };

+1 -1

arch/mips/kernel/smtc.c

··· 182 182 {0, 0, 0, 0, 0, 0, 0, 1} 183 183 }; 184 184 int tcnoprog[NR_CPUS]; 185 - static atomic_t idle_hook_initialized = {0}; 185 + static atomic_t idle_hook_initialized = ATOMIC_INIT(0); 186 186 static int clock_hang_reported[NR_CPUS]; 187 187 188 188 #endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */

+5 -1

arch/mips/kernel/syscall.c

··· 79 79 int do_color_align; 80 80 unsigned long task_size; 81 81 82 - task_size = STACK_TOP; 82 + #ifdef CONFIG_32BIT 83 + task_size = TASK_SIZE; 84 + #else /* Must be CONFIG_64BIT*/ 85 + task_size = test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE; 86 + #endif 83 87 84 88 if (len > task_size) 85 89 return -ENOMEM;

+1 -1

arch/mips/kernel/traps.c

··· 1599 1599 ebase = (unsigned long) 1600 1600 __alloc_bootmem(size, 1 << fls(size), 0); 1601 1601 } else { 1602 - ebase = CAC_BASE; 1602 + ebase = CKSEG0; 1603 1603 if (cpu_has_mips_r2) 1604 1604 ebase += (read_c0_ebase() & 0x3ffff000); 1605 1605 }

+112

arch/mips/kernel/vdso.c

··· 1 + /* 2 + * This file is subject to the terms and conditions of the GNU General Public 3 + * License. See the file "COPYING" in the main directory of this archive 4 + * for more details. 5 + * 6 + * Copyright (C) 2009, 2010 Cavium Networks, Inc. 7 + */ 8 + 9 + 10 + #include <linux/kernel.h> 11 + #include <linux/err.h> 12 + #include <linux/sched.h> 13 + #include <linux/mm.h> 14 + #include <linux/init.h> 15 + #include <linux/binfmts.h> 16 + #include <linux/elf.h> 17 + #include <linux/vmalloc.h> 18 + #include <linux/unistd.h> 19 + 20 + #include <asm/vdso.h> 21 + #include <asm/uasm.h> 22 + 23 + /* 24 + * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 25 + */ 26 + #define __NR_O32_sigreturn 4119 27 + #define __NR_O32_rt_sigreturn 4193 28 + #define __NR_N32_rt_sigreturn 6211 29 + 30 + static struct page *vdso_page; 31 + 32 + static void __init install_trampoline(u32 *tramp, unsigned int sigreturn) 33 + { 34 + uasm_i_addiu(&tramp, 2, 0, sigreturn); /* li v0, sigreturn */ 35 + uasm_i_syscall(&tramp, 0); 36 + } 37 + 38 + static int __init init_vdso(void) 39 + { 40 + struct mips_vdso *vdso; 41 + 42 + vdso_page = alloc_page(GFP_KERNEL); 43 + if (!vdso_page) 44 + panic("Cannot allocate vdso"); 45 + 46 + vdso = vmap(&vdso_page, 1, 0, PAGE_KERNEL); 47 + if (!vdso) 48 + panic("Cannot map vdso"); 49 + clear_page(vdso); 50 + 51 + install_trampoline(vdso->rt_signal_trampoline, __NR_rt_sigreturn); 52 + #ifdef CONFIG_32BIT 53 + install_trampoline(vdso->signal_trampoline, __NR_sigreturn); 54 + #else 55 + install_trampoline(vdso->n32_rt_signal_trampoline, 56 + __NR_N32_rt_sigreturn); 57 + install_trampoline(vdso->o32_signal_trampoline, __NR_O32_sigreturn); 58 + install_trampoline(vdso->o32_rt_signal_trampoline, 59 + __NR_O32_rt_sigreturn); 60 + #endif 61 + 62 + vunmap(vdso); 63 + 64 + pr_notice("init_vdso successfull\n"); 65 + 66 + return 0; 67 + } 68 + device_initcall(init_vdso); 69 + 70 + static unsigned long vdso_addr(unsigned long start) 71 + { 72 + return STACK_TOP; 73 + } 74 + 75 + int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) 76 + { 77 + int ret; 78 + unsigned long addr; 79 + struct mm_struct *mm = current->mm; 80 + 81 + down_write(&mm->mmap_sem); 82 + 83 + addr = vdso_addr(mm->start_stack); 84 + 85 + addr = get_unmapped_area(NULL, addr, PAGE_SIZE, 0, 0); 86 + if (IS_ERR_VALUE(addr)) { 87 + ret = addr; 88 + goto up_fail; 89 + } 90 + 91 + ret = install_special_mapping(mm, addr, PAGE_SIZE, 92 + VM_READ|VM_EXEC| 93 + VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC| 94 + VM_ALWAYSDUMP, 95 + &vdso_page); 96 + 97 + if (ret) 98 + goto up_fail; 99 + 100 + mm->context.vdso = (void *)addr; 101 + 102 + up_fail: 103 + up_write(&mm->mmap_sem); 104 + return ret; 105 + } 106 + 107 + const char *arch_vma_name(struct vm_area_struct *vma) 108 + { 109 + if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso) 110 + return "[vdso]"; 111 + return NULL; 112 + }

+2 -2

arch/mips/lib/delay.c

··· 41 41 42 42 void __udelay(unsigned long us) 43 43 { 44 - unsigned int lpj = current_cpu_data.udelay_val; 44 + unsigned int lpj = raw_current_cpu_data.udelay_val; 45 45 46 46 __delay((us * 0x000010c7ull * HZ * lpj) >> 32); 47 47 } ··· 49 49 50 50 void __ndelay(unsigned long ns) 51 51 { 52 - unsigned int lpj = current_cpu_data.udelay_val; 52 + unsigned int lpj = raw_current_cpu_data.udelay_val; 53 53 54 54 __delay((ns * 0x00000005ull * HZ * lpj) >> 32); 55 55 }

+1 -2

arch/mips/lib/libgcc.h

··· 17 17 #error I feel sick. 18 18 #endif 19 19 20 - typedef union 21 - { 20 + typedef union { 22 21 struct DWstruct s; 23 22 long long ll; 24 23 } DWunion;

+1 -1

arch/mips/mm/cache.c

··· 133 133 } 134 134 135 135 unsigned long _page_cachable_default; 136 - EXPORT_SYMBOL_GPL(_page_cachable_default); 136 + EXPORT_SYMBOL(_page_cachable_default); 137 137 138 138 static inline void setup_protection_map(void) 139 139 {

+16 -6

arch/mips/mm/tlbex.c

··· 788 788 * create the plain linear handler 789 789 */ 790 790 if (bcm1250_m3_war()) { 791 - UASM_i_MFC0(&p, K0, C0_BADVADDR); 792 - UASM_i_MFC0(&p, K1, C0_ENTRYHI); 791 + unsigned int segbits = 44; 792 + 793 + uasm_i_dmfc0(&p, K0, C0_BADVADDR); 794 + uasm_i_dmfc0(&p, K1, C0_ENTRYHI); 793 795 uasm_i_xor(&p, K0, K0, K1); 794 - UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 796 + uasm_i_dsrl32(&p, K1, K0, 62 - 32); 797 + uasm_i_dsrl(&p, K0, K0, 12 + 1); 798 + uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32); 799 + uasm_i_or(&p, K0, K0, K1); 795 800 uasm_il_bnez(&p, &r, K0, label_leave); 796 801 /* No need for uasm_i_nop */ 797 802 } ··· 1317 1312 memset(relocs, 0, sizeof(relocs)); 1318 1313 1319 1314 if (bcm1250_m3_war()) { 1320 - UASM_i_MFC0(&p, K0, C0_BADVADDR); 1321 - UASM_i_MFC0(&p, K1, C0_ENTRYHI); 1315 + unsigned int segbits = 44; 1316 + 1317 + uasm_i_dmfc0(&p, K0, C0_BADVADDR); 1318 + uasm_i_dmfc0(&p, K1, C0_ENTRYHI); 1322 1319 uasm_i_xor(&p, K0, K0, K1); 1323 - UASM_i_SRL(&p, K0, K0, PAGE_SHIFT + 1); 1320 + uasm_i_dsrl32(&p, K1, K0, 62 - 32); 1321 + uasm_i_dsrl(&p, K0, K0, 12 + 1); 1322 + uasm_i_dsll32(&p, K0, K0, 64 + 12 + 1 - segbits - 32); 1323 + uasm_i_or(&p, K0, K0, K1); 1324 1324 uasm_il_bnez(&p, &r, K0, label_leave); 1325 1325 /* No need for uasm_i_nop */ 1326 1326 }

+20 -3

arch/mips/mm/uasm.c

··· 31 31 BIMM = 0x040, 32 32 JIMM = 0x080, 33 33 FUNC = 0x100, 34 - SET = 0x200 34 + SET = 0x200, 35 + SCIMM = 0x400 35 36 }; 36 37 37 38 #define OP_MASK 0x3f ··· 53 52 #define FUNC_SH 0 54 53 #define SET_MASK 0x7 55 54 #define SET_SH 0 55 + #define SCIMM_MASK 0xfffff 56 + #define SCIMM_SH 6 56 57 57 58 enum opcode { 58 59 insn_invalid, ··· 64 61 insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, 65 62 insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, 66 63 insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, 67 - insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, 64 + insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, 68 65 insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, 69 66 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, 70 - insn_dins 67 + insn_dins, insn_syscall 71 68 }; 72 69 73 70 struct insn { ··· 120 117 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 121 118 { insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET}, 122 119 { insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET}, 120 + { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, 123 121 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 124 122 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 125 123 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, ··· 140 136 { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, 141 137 { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 142 138 { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, 139 + { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM}, 143 140 { insn_invalid, 0, 0 } 144 141 }; 145 142 ··· 213 208 return (arg >> 2) & JIMM_MASK; 214 209 } 215 210 211 + static inline __cpuinit u32 build_scimm(u32 arg) 212 + { 213 + if (arg & ~SCIMM_MASK) 214 + printk(KERN_WARNING "Micro-assembler field overflow\n"); 215 + 216 + return (arg & SCIMM_MASK) << SCIMM_SH; 217 + } 218 + 216 219 static inline __cpuinit u32 build_func(u32 arg) 217 220 { 218 221 if (arg & ~FUNC_MASK) ··· 279 266 op |= build_func(va_arg(ap, u32)); 280 267 if (ip->fields & SET) 281 268 op |= build_set(va_arg(ap, u32)); 269 + if (ip->fields & SCIMM) 270 + op |= build_scimm(va_arg(ap, u32)); 282 271 va_end(ap); 283 272 284 273 **buf = op; ··· 388 373 I_u1u2u3(_mfc0) 389 374 I_u1u2u3(_mtc0) 390 375 I_u2u1u3(_ori) 376 + I_u3u1u2(_or) 391 377 I_u2s3u1(_pref) 392 378 I_0(_rfe) 393 379 I_u2s3u1(_sc) ··· 407 391 I_u3u1u2(_xor) 408 392 I_u2u1u3(_xori) 409 393 I_u2u1msbu3(_dins); 394 + I_u1(_syscall); 410 395 411 396 /* Handle labels. */ 412 397 void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid)

+10

arch/mips/pci/ops-loongson2.c

··· 180 180 }; 181 181 182 182 #ifdef CONFIG_CS5536 183 + DEFINE_RAW_SPINLOCK(msr_lock); 184 + 183 185 void _rdmsr(u32 msr, u32 *hi, u32 *lo) 184 186 { 185 187 struct pci_bus bus = { 186 188 .number = PCI_BUS_CS5536 187 189 }; 188 190 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 191 + unsigned long flags; 192 + 193 + raw_spin_lock_irqsave(&msr_lock, flags); 189 194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 190 195 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 191 196 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 197 + raw_spin_unlock_irqrestore(&msr_lock, flags); 192 198 } 193 199 EXPORT_SYMBOL(_rdmsr); 194 200 ··· 204 198 .number = PCI_BUS_CS5536 205 199 }; 206 200 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); 201 + unsigned long flags; 202 + 203 + raw_spin_lock_irqsave(&msr_lock, flags); 207 204 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); 208 205 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); 209 206 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); 207 + raw_spin_unlock_irqrestore(&msr_lock, flags); 210 208 } 211 209 EXPORT_SYMBOL(_wrmsr); 212 210 #endif

+15

arch/mips/sibyte/sb1250/setup.c

··· 87 87 return ret; 88 88 } 89 89 90 + int sb1250_m3_workaround_needed(void) 91 + { 92 + switch (soc_type) { 93 + case K_SYS_SOC_TYPE_BCM1250: 94 + case K_SYS_SOC_TYPE_BCM1250_ALT: 95 + case K_SYS_SOC_TYPE_BCM1250_ALT2: 96 + case K_SYS_SOC_TYPE_BCM1125: 97 + case K_SYS_SOC_TYPE_BCM1125H: 98 + return soc_pass < K_SYS_REVISION_BCM1250_C0; 99 + 100 + default: 101 + return 0; 102 + } 103 + } 104 + 90 105 static int __init setup_bcm112x(void) 91 106 { 92 107 int ret = 0;

-29

drivers/ssb/driver_pcicore.c

··· 246 246 .pci_ops = &ssb_pcicore_pciops, 247 247 .io_resource = &ssb_pcicore_io_resource, 248 248 .mem_resource = &ssb_pcicore_mem_resource, 249 - .mem_offset = 0x24000000, 250 249 }; 251 - 252 - static u32 ssb_pcicore_pcibus_iobase = 0x100; 253 - static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA; 254 250 255 251 /* This function is called when doing a pci_enable_device(). 256 252 * We must first check if the device is a device on the PCI-core bridge. */ 257 253 int ssb_pcicore_plat_dev_init(struct pci_dev *d) 258 254 { 259 - struct resource *res; 260 - int pos, size; 261 - u32 *base; 262 - 263 255 if (d->bus->ops != &ssb_pcicore_pciops) { 264 256 /* This is not a device on the PCI-core bridge. */ 265 257 return -ENODEV; ··· 260 268 ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", 261 269 pci_name(d)); 262 270 263 - /* Fix up resource bases */ 264 - for (pos = 0; pos < 6; pos++) { 265 - res = &d->resource[pos]; 266 - if (res->flags & IORESOURCE_IO) 267 - base = &ssb_pcicore_pcibus_iobase; 268 - else 269 - base = &ssb_pcicore_pcibus_membase; 270 - res->flags |= IORESOURCE_PCI_FIXED; 271 - if (res->end) { 272 - size = res->end - res->start + 1; 273 - if (*base & (size - 1)) 274 - *base = (*base + size) & ~(size - 1); 275 - res->start = *base; 276 - res->end = res->start + size - 1; 277 - *base += size; 278 - pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start); 279 - } 280 - /* Fix up PCI bridge BAR0 only */ 281 - if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0) 282 - break; 283 - } 284 271 /* Fix up interrupt lines */ 285 272 d->irq = ssb_mips_irq(extpci_core->dev) + 2; 286 273 pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq);

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