Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
RDMA/hns: Rename CMDQ head/tail pointer to PI/CI
The same name represents opposite meanings in new/old driver, it is hard
to maintain, so rename them to PI/CI.
Link: https://lore.kernel.org/r/1621482876-35780-2-git-send-email-liweihang@huawei.com
Signed-off-by: Lang Cheng <chenglang@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
authored by
Lang Cheng
and committed by
Jason Gunthorpe
4511624a
b6989da8
+7
-7
+2
-2
drivers/infiniband/hw/hns/hns_roce_common.h
+2
-2
drivers/infiniband/hw/hns/hns_roce_common.h
···
373
373
#define ROCEE_TX_CMQ_BASEADDR_L_REG 0x07000
374
374
#define ROCEE_TX_CMQ_BASEADDR_H_REG 0x07004
375
375
#define ROCEE_TX_CMQ_DEPTH_REG 0x07008
376
-
#define ROCEE_TX_CMQ_HEAD_REG 0x07010
377
-
#define ROCEE_TX_CMQ_TAIL_REG 0x07014
376
+
#define ROCEE_TX_CMQ_PI_REG 0x07010
377
+
#define ROCEE_TX_CMQ_CI_REG 0x07014
378
378
379
379
#define ROCEE_RX_CMQ_BASEADDR_L_REG 0x07018
380
380
#define ROCEE_RX_CMQ_BASEADDR_H_REG 0x0701c
+5
-5
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+5
-5
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
···
1255
1255
(u32)ring->desc_num >> HNS_ROCE_CMQ_DESC_NUM_S);
1256
1256
1257
1257
/* Make sure to write tail first and then head */
1258
-
roce_write(hr_dev, ROCEE_TX_CMQ_TAIL_REG, 0);
1259
-
roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, 0);
1258
+
roce_write(hr_dev, ROCEE_TX_CMQ_CI_REG, 0);
1259
+
roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, 0);
1260
1260
} else {
1261
1261
roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_L_REG, (u32)dma);
1262
1262
roce_write(hr_dev, ROCEE_RX_CMQ_BASEADDR_H_REG,
···
1338
1338
1339
1339
static int hns_roce_cmq_csq_done(struct hns_roce_dev *hr_dev)
1340
1340
{
1341
-
u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
1341
+
u32 tail = roce_read(hr_dev, ROCEE_TX_CMQ_CI_REG);
1342
1342
struct hns_roce_v2_priv *priv = hr_dev->priv;
1343
1343
1344
1344
return tail == priv->cmq.csq.head;
···
1366
1366
}
1367
1367
1368
1368
/* Write to hardware */
1369
-
roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head);
1369
+
roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, csq->head);
1370
1370
1371
1371
/* If the command is sync, wait for the firmware to write back,
1372
1372
* if multi descriptors to be sent, use the first one to check
···
1397
1397
}
1398
1398
} else {
1399
1399
/* FW/HW reset or incorrect number of desc */
1400
-
tail = roce_read(hr_dev, ROCEE_TX_CMQ_TAIL_REG);
1400
+
tail = roce_read(hr_dev, ROCEE_TX_CMQ_CI_REG);
1401
1401
dev_warn(hr_dev->dev, "CMDQ move tail from %d to %d\n",
1402
1402
csq->head, tail);
1403
1403
csq->head = tail;