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drm/amdgpu: add set_reg_remap callback for NBIO 2.3

This will be used to consolidate the register remap offset
configuration and fix HDP flushes on systems non-4K pages.

Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

+15
+15
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
··· 553 553 } 554 554 } 555 555 556 + #define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE) 557 + 558 + static void nbio_v2_3_set_reg_remap(struct amdgpu_device *adev) 559 + { 560 + if (!amdgpu_sriov_vf(adev) && (PAGE_SIZE <= 4096)) { 561 + adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; 562 + adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; 563 + } else { 564 + adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, 565 + mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2; 566 + adev->rmmio_remap.bus_addr = 0; 567 + } 568 + } 569 + 556 570 const struct amdgpu_nbio_funcs nbio_v2_3_funcs = { 557 571 .get_hdp_flush_req_offset = nbio_v2_3_get_hdp_flush_req_offset, 558 572 .get_hdp_flush_done_offset = nbio_v2_3_get_hdp_flush_done_offset, ··· 591 577 .apply_lc_spc_mode_wa = nbio_v2_3_apply_lc_spc_mode_wa, 592 578 .apply_l1_link_width_reconfig_wa = nbio_v2_3_apply_l1_link_width_reconfig_wa, 593 579 .clear_doorbell_interrupt = nbio_v2_3_clear_doorbell_interrupt, 580 + .set_reg_remap = nbio_v2_3_set_reg_remap, 594 581 };