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Merge tag 'mips_fixes_5.8_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Thomas Bogendoerfer:

- fix for missing hazard barrier

- DT fix for ingenic

- DT fix of GPHY names for lantiq

- fix usage of smp_processor_id() while preemption is enabled

* tag 'mips_fixes_5.8_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Do not use smp_processor_id() in preemptible code
MIPS: Add missing EHB in mtc0 -> mfc0 sequence for DSPen
MIPS: ingenic: gcw0: Fix HP detection GPIO.
MIPS: lantiq: xway: sysctrl: fix the GPHY clock alias names

+11 -8
+1 -1
arch/mips/boot/dts/ingenic/gcw0.dts
··· 92 92 "MIC1N", "Built-in Mic"; 93 93 simple-audio-card,pin-switches = "Speaker", "Headphones"; 94 94 95 - simple-audio-card,hp-det-gpio = <&gpf 21 GPIO_ACTIVE_HIGH>; 95 + simple-audio-card,hp-det-gpio = <&gpf 21 GPIO_ACTIVE_LOW>; 96 96 simple-audio-card,aux-devs = <&speaker_amp>, <&headphones_amp>; 97 97 98 98 simple-audio-card,bitclock-master = <&dai_codec>;
+6 -3
arch/mips/kernel/traps.c
··· 723 723 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0); 724 724 725 725 /* Do not emulate on unsupported core models. */ 726 - if (!loongson3_cpucfg_emulation_enabled(&current_cpu_data)) 726 + preempt_disable(); 727 + if (!loongson3_cpucfg_emulation_enabled(&current_cpu_data)) { 728 + preempt_enable(); 727 729 return -1; 728 - 730 + } 729 731 regs->regs[rd] = loongson3_cpucfg_read_synthesized( 730 732 &current_cpu_data, sel); 731 - 733 + preempt_enable(); 732 734 return 0; 733 735 } 734 736 ··· 2171 2169 2172 2170 change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, 2173 2171 status_set); 2172 + back_to_back_c0_hazard(); 2174 2173 } 2175 2174 2176 2175 unsigned int hwrena;
+4 -4
arch/mips/lantiq/xway/sysctrl.c
··· 514 514 clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | 515 515 PMU_PPE_DP | PMU_PPE_TC); 516 516 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); 517 - clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); 518 - clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); 517 + clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY); 518 + clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY); 519 519 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); 520 520 clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE); 521 521 clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); ··· 538 538 PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | 539 539 PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | 540 540 PMU_PPE_QSB | PMU_PPE_TOP); 541 - clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); 542 - clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); 541 + clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY); 542 + clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY); 543 543 clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); 544 544 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); 545 545 clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);