Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
- Fix interrupt type on ethernet switch for i.MX-based RDU2
- GPC on i.MX exposed too large a register window which resulted in
userspace being able to crash the machine.
- Fixup of bad merge resolution moving GPIO DT nodes under pinctrl on
droid4.
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch
soc: imx: gpc: restrict register range for regmap access
ARM: dts: omap4-droid4: fix dts w.r.t. pwm
+25
-7
+1
-1
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
+3
-6
arch/arm/boot/dts/omap4-droid4-xt894.dts
+3
-6
arch/arm/boot/dts/omap4-droid4-xt894.dts
···
159
159
160
160
dais = <&mcbsp2_port>, <&mcbsp3_port>;
161
161
};
162
-
};
163
162
164
-
&dss {
165
-
status = "okay";
166
-
};
167
-
168
-
&gpio6 {
169
163
pwm8: dmtimer-pwm-8 {
170
164
pinctrl-names = "default";
171
165
pinctrl-0 = <&vibrator_direction_pin>;
···
186
192
pwm-names = "enable", "direction";
187
193
direction-duty-cycle-ns = <10000000>;
188
194
};
195
+
};
189
196
197
+
&dss {
198
+
status = "okay";
190
199
};
191
200
192
201
&dsi1 {
+21
drivers/soc/imx/gpc.c
+21
drivers/soc/imx/gpc.c
···
27
27
#define GPC_PGC_SW2ISO_SHIFT 0x8
28
28
#define GPC_PGC_SW_SHIFT 0x0
29
29
30
+
#define GPC_PGC_PCI_PDN 0x200
31
+
#define GPC_PGC_PCI_SR 0x20c
32
+
30
33
#define GPC_PGC_GPU_PDN 0x260
31
34
#define GPC_PGC_GPU_PUPSCR 0x264
32
35
#define GPC_PGC_GPU_PDNSCR 0x268
36
+
#define GPC_PGC_GPU_SR 0x26c
37
+
38
+
#define GPC_PGC_DISP_PDN 0x240
39
+
#define GPC_PGC_DISP_SR 0x24c
33
40
34
41
#define GPU_VPU_PUP_REQ BIT(1)
35
42
#define GPU_VPU_PDN_REQ BIT(0)
···
325
318
{ }
326
319
};
327
320
321
+
static const struct regmap_range yes_ranges[] = {
322
+
regmap_reg_range(GPC_CNTR, GPC_CNTR),
323
+
regmap_reg_range(GPC_PGC_PCI_PDN, GPC_PGC_PCI_SR),
324
+
regmap_reg_range(GPC_PGC_GPU_PDN, GPC_PGC_GPU_SR),
325
+
regmap_reg_range(GPC_PGC_DISP_PDN, GPC_PGC_DISP_SR),
326
+
};
327
+
328
+
static const struct regmap_access_table access_table = {
329
+
.yes_ranges = yes_ranges,
330
+
.n_yes_ranges = ARRAY_SIZE(yes_ranges),
331
+
};
332
+
328
333
static const struct regmap_config imx_gpc_regmap_config = {
329
334
.reg_bits = 32,
330
335
.val_bits = 32,
331
336
.reg_stride = 4,
337
+
.rd_table = &access_table,
338
+
.wr_table = &access_table,
332
339
.max_register = 0x2ac,
333
340
};
334
341