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dt-bindings: phy: uniphier-usb3hs: Fix incorrect clock-names and reset-names

There is no clock-names and reset-names for Pro5 SoC, that should have two
properties, "gio" and "link" like usb3-ssphy.

And according to the existing PXs2 devicetree, the clock-names for PXs2 SoC
should have "link" and "phy", and minItems of clocks should be 2.

Fixes: 134ab2845acb ("dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1648637715-19262-5-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Kunihiko Hayashi and committed by
Vinod Koul 45d1f841 fccd2f32

+11 -5
+11 -5
Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
··· 31 31 const: 0 32 32 33 33 clocks: 34 - minItems: 1 34 + minItems: 2 35 35 maxItems: 3 36 36 37 37 clock-names: 38 38 oneOf: 39 - - const: link # for PXs2 39 + - items: # for Pro5 40 + - const: gio 41 + - const: link 40 42 - items: # for PXs3 with phy-ext 41 43 - const: link 42 44 - const: phy ··· 51 49 maxItems: 2 52 50 53 51 reset-names: 54 - items: 55 - - const: link 56 - - const: phy 52 + oneOf: 53 + - items: # for Pro5 54 + - const: gio 55 + - const: link 56 + - items: # for others 57 + - const: link 58 + - const: phy 57 59 58 60 vbus-supply: 59 61 description: A phandle to the regulator for USB VBUS