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linux
dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
This MII converter can be found on the RZ/N1 processor family. The MII
converter ports are declared as subnodes which are then referenced by
users of the PCS driver such as the switch.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20220624144001.95518-5-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
authored by
Clément Léger
and committed by
Geert Uytterhoeven
45ed13d9
cda41c14
+204
+171
Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
+171
Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
···
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/N1 MII converter
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maintainers:
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- Clément Léger <clement.leger@bootlin.com>
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description: |
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This MII converter is present on the Renesas RZ/N1 SoC family. It is
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responsible to do MII passthrough or convert it to RMII/RGMII.
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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compatible:
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items:
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- enum:
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- renesas,r9a06g032-miic
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- const: renesas,rzn1-miic
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reg:
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maxItems: 1
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clocks:
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items:
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- description: MII reference clock
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- description: RGMII reference clock
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- description: RMII reference clock
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- description: AHB clock used for the MII converter register interface
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clock-names:
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items:
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- const: mii_ref
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- const: rgmii_ref
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- const: rmii_ref
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- const: hclk
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renesas,miic-switch-portin:
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description: MII Switch PORTIN configuration. This value should use one of
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the values defined in dt-bindings/net/pcs-rzn1-miic.h.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 2]
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power-domains:
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maxItems: 1
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patternProperties:
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"^mii-conv@[0-5]$":
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type: object
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description: MII converter port
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properties:
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reg:
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description: MII Converter port number.
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enum: [1, 2, 3, 4, 5]
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renesas,miic-input:
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description: Converter input port configuration. This value should use
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one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- reg
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- renesas,miic-input
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additionalProperties: false
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allOf:
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- if:
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properties:
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reg:
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const: 1
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then:
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properties:
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renesas,miic-input:
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const: 0
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- if:
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properties:
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reg:
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const: 2
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then:
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properties:
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renesas,miic-input:
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enum: [1, 11]
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- if:
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properties:
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reg:
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const: 3
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then:
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properties:
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renesas,miic-input:
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enum: [7, 10]
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- if:
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properties:
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reg:
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const: 4
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then:
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properties:
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renesas,miic-input:
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enum: [4, 6, 9, 13]
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- if:
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properties:
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reg:
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const: 5
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then:
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properties:
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renesas,miic-input:
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enum: [3, 5, 8, 12]
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required:
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- '#address-cells'
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- '#size-cells'
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- compatible
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- reg
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- clocks
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- clock-names
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- power-domains
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/net/pcs-rzn1-miic.h>
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#include <dt-bindings/clock/r9a06g032-sysctrl.h>
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eth-miic@44030000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
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reg = <0x44030000 0x10000>;
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clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
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<&sysctrl R9A06G032_CLK_RGMII_REF>,
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<&sysctrl R9A06G032_CLK_RMII_REF>,
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<&sysctrl R9A06G032_HCLK_SWITCH_RG>;
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clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
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renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
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power-domains = <&sysctrl>;
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mii_conv1: mii-conv@1 {
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renesas,miic-input = <MIIC_GMAC1_PORT>;
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reg = <1>;
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};
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mii_conv2: mii-conv@2 {
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renesas,miic-input = <MIIC_SWITCH_PORTD>;
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reg = <2>;
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};
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mii_conv3: mii-conv@3 {
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renesas,miic-input = <MIIC_SWITCH_PORTC>;
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reg = <3>;
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};
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mii_conv4: mii-conv@4 {
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renesas,miic-input = <MIIC_SWITCH_PORTB>;
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reg = <4>;
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};
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mii_conv5: mii-conv@5 {
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renesas,miic-input = <MIIC_SWITCH_PORTA>;
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reg = <5>;
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};
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};
+33
include/dt-bindings/net/pcs-rzn1-miic.h
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include/dt-bindings/net/pcs-rzn1-miic.h
···
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (C) 2022 Schneider-Electric
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*
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* Clément Léger <clement.leger@bootlin.com>
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*/
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#ifndef _DT_BINDINGS_PCS_RZN1_MIIC
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#define _DT_BINDINGS_PCS_RZN1_MIIC
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/*
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* Reefer to the datasheet [1] section 8.2.1, Internal Connection of Ethernet
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* Ports to check the available combination
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*
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* [1] REN_r01uh0750ej0140-rzn1-introduction_MAT_20210228.pdf
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*/
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#define MIIC_GMAC1_PORT 0
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#define MIIC_GMAC2_PORT 1
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#define MIIC_RTOS_PORT 2
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#define MIIC_SERCOS_PORTA 3
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#define MIIC_SERCOS_PORTB 4
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#define MIIC_ETHERCAT_PORTA 5
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#define MIIC_ETHERCAT_PORTB 6
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#define MIIC_ETHERCAT_PORTC 7
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#define MIIC_SWITCH_PORTA 8
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#define MIIC_SWITCH_PORTB 9
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#define MIIC_SWITCH_PORTC 10
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#define MIIC_SWITCH_PORTD 11
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#define MIIC_HSR_PORTA 12
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#define MIIC_HSR_PORTB 13
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#endif