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Merge tag 'cxl-fixes-7.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl

Pull Compute Express Link (CXL) fixes from Dave Jiang:

- Adjust the startup priority of cxl_pmem to be higher than that of
cxl_acpi

- Use proper endpoint validity check upon sanitize

- Avoid incorrect DVSEC fallback when HDM decoders are enabled

- Fix CXL_ACPI and CXL_PMEM Kconfig tristate mismatch

- Fix leakage in __construct_region()

- Fix use after free of parent_port in cxl_detach_ep()

* tag 'cxl-fixes-7.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl:
cxl: Adjust the startup priority of cxl_pmem to be higher than that of cxl_acpi
cxl/mbox: Use proper endpoint validity check upon sanitize
cxl/hdm: Avoid incorrect DVSEC fallback when HDM decoders are enabled
cxl/acpi: Fix CXL_ACPI and CXL_PMEM Kconfig tristate mismatch
cxl/region: Fix leakage in __construct_region()
cxl/port: Fix use after free of parent_port in cxl_detach_ep()

+21 -21
+1
drivers/cxl/Kconfig
··· 59 59 tristate "CXL ACPI: Platform Support" 60 60 depends on ACPI 61 61 depends on ACPI_NUMA 62 + depends on CXL_PMEM || !CXL_PMEM 62 63 default CXL_BUS 63 64 select ACPI_TABLE_LIB 64 65 select ACPI_HMAT
+9 -16
drivers/cxl/core/hdm.c
··· 94 94 struct cxl_hdm *cxlhdm; 95 95 void __iomem *hdm; 96 96 u32 ctrl; 97 - int i; 98 97 99 98 if (!info) 100 99 return false; ··· 112 113 return false; 113 114 114 115 /* 115 - * If any decoders are committed already, there should not be any 116 - * emulated DVSEC decoders. 116 + * If HDM decoders are globally enabled, do not fall back to DVSEC 117 + * range emulation. Zeroed decoder registers after region teardown 118 + * do not imply absence of HDM capability. 119 + * 120 + * Falling back to DVSEC here would treat the decoder as AUTO and 121 + * may incorrectly latch default interleave settings. 117 122 */ 118 - for (i = 0; i < cxlhdm->decoder_count; i++) { 119 - ctrl = readl(hdm + CXL_HDM_DECODER0_CTRL_OFFSET(i)); 120 - dev_dbg(&info->port->dev, 121 - "decoder%d.%d: committed: %ld base: %#x_%.8x size: %#x_%.8x\n", 122 - info->port->id, i, 123 - FIELD_GET(CXL_HDM_DECODER0_CTRL_COMMITTED, ctrl), 124 - readl(hdm + CXL_HDM_DECODER0_BASE_HIGH_OFFSET(i)), 125 - readl(hdm + CXL_HDM_DECODER0_BASE_LOW_OFFSET(i)), 126 - readl(hdm + CXL_HDM_DECODER0_SIZE_HIGH_OFFSET(i)), 127 - readl(hdm + CXL_HDM_DECODER0_SIZE_LOW_OFFSET(i))); 128 - if (FIELD_GET(CXL_HDM_DECODER0_CTRL_COMMITTED, ctrl)) 129 - return false; 130 - } 123 + ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); 124 + if (ctrl & CXL_HDM_DECODER_ENABLE) 125 + return false; 131 126 132 127 return true; 133 128 }
+1 -1
drivers/cxl/core/mbox.c
··· 1301 1301 * Require an endpoint to be safe otherwise the driver can not 1302 1302 * be sure that the device is unmapped. 1303 1303 */ 1304 - if (endpoint && cxl_num_decoders_committed(endpoint) == 0) 1304 + if (cxlmd->dev.driver && cxl_num_decoders_committed(endpoint) == 0) 1305 1305 return __cxl_mem_sanitize(mds, cmd); 1306 1306 1307 1307 return -EBUSY;
+6 -2
drivers/cxl/core/port.c
··· 552 552 xa_destroy(&port->dports); 553 553 xa_destroy(&port->regions); 554 554 ida_free(&cxl_port_ida, port->id); 555 - if (is_cxl_root(port)) 555 + 556 + if (is_cxl_root(port)) { 556 557 kfree(to_cxl_root(port)); 557 - else 558 + } else { 559 + put_device(dev->parent); 558 560 kfree(port); 561 + } 559 562 } 560 563 561 564 static ssize_t decoders_committed_show(struct device *dev, ··· 710 707 struct cxl_port *iter; 711 708 712 709 dev->parent = &parent_port->dev; 710 + get_device(dev->parent); 713 711 port->depth = parent_port->depth + 1; 714 712 port->parent_dport = parent_dport; 715 713
+3 -1
drivers/cxl/core/region.c
··· 3854 3854 } 3855 3855 3856 3856 rc = sysfs_update_group(&cxlr->dev.kobj, &cxl_region_group); 3857 - if (rc) 3857 + if (rc) { 3858 + kfree(res); 3858 3859 return rc; 3860 + } 3859 3861 3860 3862 rc = insert_resource(cxlrd->res, res); 3861 3863 if (rc) {
+1 -1
drivers/cxl/pmem.c
··· 554 554 555 555 MODULE_DESCRIPTION("CXL PMEM: Persistent Memory Support"); 556 556 MODULE_LICENSE("GPL v2"); 557 - module_init(cxl_pmem_init); 557 + subsys_initcall(cxl_pmem_init); 558 558 module_exit(cxl_pmem_exit); 559 559 MODULE_IMPORT_NS("CXL"); 560 560 MODULE_ALIAS_CXL(CXL_DEVICE_NVDIMM_BRIDGE);