Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull GPIO bug fixes from Grant Likely:
"Miscellaneous bug fixes to GPIO drivers and for a corner case in the
gpio device tree parsing code."
* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6:
gpio/exynos: Fix compiler warning in gpio-samsung.c file
gpio: Fix range check in of_gpio_simple_xlate()
gpio: Fix uninitialized variable bit in adp5588_irq_handler
gpio/sodaville: Convert sodaville driver to new irqdomain API
+21
-24
+1
-1
drivers/gpio/Kconfig
+1
-1
drivers/gpio/Kconfig
+1
-1
drivers/gpio/gpio-adp5588.c
+1
-1
drivers/gpio/gpio-adp5588.c
···
252
252
if (ret < 0)
253
253
memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
254
254
255
-
for (bank = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
255
+
for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
256
256
bank++, bit = 0) {
257
257
pending = dev->irq_stat[bank] & dev->irq_mask[bank];
258
258
+8
-8
drivers/gpio/gpio-samsung.c
+8
-8
drivers/gpio/gpio-samsung.c
···
2382
2382
#endif
2383
2383
};
2384
2384
2385
-
static struct samsung_gpio_chip exynos5_gpios_1[] = {
2386
2385
#ifdef CONFIG_ARCH_EXYNOS5
2386
+
static struct samsung_gpio_chip exynos5_gpios_1[] = {
2387
2387
{
2388
2388
.chip = {
2389
2389
.base = EXYNOS5_GPA0(0),
···
2541
2541
.to_irq = samsung_gpiolib_to_irq,
2542
2542
},
2543
2543
},
2544
-
#endif
2545
2544
};
2545
+
#endif
2546
2546
2547
-
static struct samsung_gpio_chip exynos5_gpios_2[] = {
2548
2547
#ifdef CONFIG_ARCH_EXYNOS5
2548
+
static struct samsung_gpio_chip exynos5_gpios_2[] = {
2549
2549
{
2550
2550
.chip = {
2551
2551
.base = EXYNOS5_GPE0(0),
···
2602
2602
2603
2603
},
2604
2604
},
2605
-
#endif
2606
2605
};
2606
+
#endif
2607
2607
2608
-
static struct samsung_gpio_chip exynos5_gpios_3[] = {
2609
2608
#ifdef CONFIG_ARCH_EXYNOS5
2609
+
static struct samsung_gpio_chip exynos5_gpios_3[] = {
2610
2610
{
2611
2611
.chip = {
2612
2612
.base = EXYNOS5_GPV0(0),
···
2638
2638
.label = "GPV4",
2639
2639
},
2640
2640
},
2641
-
#endif
2642
2641
};
2642
+
#endif
2643
2643
2644
-
static struct samsung_gpio_chip exynos5_gpios_4[] = {
2645
2644
#ifdef CONFIG_ARCH_EXYNOS5
2645
+
static struct samsung_gpio_chip exynos5_gpios_4[] = {
2646
2646
{
2647
2647
.chip = {
2648
2648
.base = EXYNOS5_GPZ(0),
···
2650
2650
.label = "GPZ",
2651
2651
},
2652
2652
},
2653
-
#endif
2654
2653
};
2654
+
#endif
2655
2655
2656
2656
2657
2657
#if defined(CONFIG_ARCH_EXYNOS) && defined(CONFIG_OF)
+10
-13
drivers/gpio/gpio-sodaville.c
+10
-13
drivers/gpio/gpio-sodaville.c
···
41
41
struct sdv_gpio_chip_data {
42
42
int irq_base;
43
43
void __iomem *gpio_pub_base;
44
-
struct irq_domain id;
44
+
struct irq_domain *id;
45
45
struct irq_chip_generic *gc;
46
46
struct bgpio_chip bgpio;
47
47
};
···
51
51
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
52
52
struct sdv_gpio_chip_data *sd = gc->private;
53
53
void __iomem *type_reg;
54
-
u32 irq_offs = d->irq - sd->irq_base;
55
54
u32 reg;
56
55
57
-
if (irq_offs < 8)
56
+
if (d->hwirq < 8)
58
57
type_reg = sd->gpio_pub_base + GPIT1R0;
59
58
else
60
59
type_reg = sd->gpio_pub_base + GPIT1R1;
···
62
63
63
64
switch (type) {
64
65
case IRQ_TYPE_LEVEL_HIGH:
65
-
reg &= ~BIT(4 * (irq_offs % 8));
66
+
reg &= ~BIT(4 * (d->hwirq % 8));
66
67
break;
67
68
68
69
case IRQ_TYPE_LEVEL_LOW:
69
-
reg |= BIT(4 * (irq_offs % 8));
70
+
reg |= BIT(4 * (d->hwirq % 8));
70
71
break;
71
72
72
73
default:
···
90
91
u32 irq_bit = __fls(irq_stat);
91
92
92
93
irq_stat &= ~BIT(irq_bit);
93
-
generic_handle_irq(sd->irq_base + irq_bit);
94
+
generic_handle_irq(irq_find_mapping(sd->id, irq_bit));
94
95
}
95
96
96
97
return IRQ_HANDLED;
···
126
127
}
127
128
128
129
static struct irq_domain_ops irq_domain_sdv_ops = {
129
-
.dt_translate = sdv_xlate,
130
+
.xlate = sdv_xlate,
130
131
};
131
132
132
133
static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
···
147
148
"sdv_gpio", sd);
148
149
if (ret)
149
150
goto out_free_desc;
150
-
151
-
sd->id.irq_base = sd->irq_base;
152
-
sd->id.of_node = of_node_get(pdev->dev.of_node);
153
-
sd->id.ops = &irq_domain_sdv_ops;
154
151
155
152
/*
156
153
* This gpio irq controller latches level irqs. Testing shows that if
···
174
179
IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,
175
180
IRQ_LEVEL | IRQ_NOPROBE);
176
181
177
-
irq_domain_add(&sd->id);
182
+
sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS,
183
+
sd->irq_base, 0, &irq_domain_sdv_ops, sd);
184
+
if (!sd->id)
185
+
goto out_free_irq;
178
186
return 0;
179
187
out_free_irq:
180
188
free_irq(pdev->irq, sd);
···
258
260
{
259
261
struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev);
260
262
261
-
irq_domain_del(&sd->id);
262
263
free_irq(pdev->irq, sd);
263
264
irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
264
265