tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"This is a bit larger than normal, as we had not managed to send out a
pull request before traveling for a week without my signing key.

There are multiple code fixes for older bugs, all of which should get
backported into stable kernels:

- tango: one fix for multiplatform configurations broken on other
platforms when tango is enabled

- arm_scmi: device unregistration fix

- iop32x: fix kernel oops from extraneous __init annotation

- pxa: remove a double kfree

- fsl qbman: close an interrupt clearing race

The rest is the usual collection of smaller fixes for device tree
files, on the renesas, allwinner, meson, omap, davinci, qualcomm and
imx platforms.

Some of these are for compile-time warnings, most are for board
specific functionality that fails to work because of incorrect
settings"

* tag 'armsoc-fixes-5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
ARM: tango: Improve ARCH_MULTIPLATFORM compatibility
firmware: arm_scmi: provide the mandatory device release callback
ARM: iop32x/n2100: fix PCI IRQ mapping
arm64: dts: add msm8996 compatible to gicv3
ARM: dts: am335x-shc.dts: fix wrong cd pin level
ARM: dts: n900: fix mmc1 card detect gpio polarity
ARM: dts: omap3-gta04: Fix graph_port warning
ARM: pxa: ssp: unneeded to free devm_ allocated data
ARM: dts: r8a7743: Convert to new LVDS DT bindings
soc: fsl: qbman: avoid race in clearing QMan interrupt
arm64: dts: renesas: r8a77965: Enable DMA for SCIF2
arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
arm64: dts: renesas: r8a774a1: Enable DMA for SCIF2
ARM: dts: da850: fix interrupt numbers for clocksource
dt-bindings: imx8mq: Number clocks consecutively
arm64: dts: meson: Fix mmc cd-gpios polarity
ARM: dts: imx6sx: correct backward compatible of gpt
ARM: dts: imx: replace gpio-key,wakeup with wakeup-source property
ARM: dts: vf610-bk4: fix incorrect #address-cells for dspi3
ARM: dts: meson8m2: mxiii-plus: mark the SD card detection GPIO active-low
...

Linus Torvalds 46c291e2 5bb513ed

+136 -102
+1 -1
arch/arm/boot/dts/am335x-shc.dts
··· 215 215 pinctrl-names = "default"; 216 216 pinctrl-0 = <&mmc1_pins>; 217 217 bus-width = <0x4>; 218 - cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 218 + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 219 219 cd-inverted; 220 220 max-frequency = <26000000>; 221 221 vmmc-supply = <&vmmcsd_fixed>;
+1 -1
arch/arm/boot/dts/da850.dtsi
··· 476 476 clocksource: timer@20000 { 477 477 compatible = "ti,da830-timer"; 478 478 reg = <0x20000 0x1000>; 479 - interrupts = <12>, <13>; 479 + interrupts = <21>, <22>; 480 480 interrupt-names = "tint12", "tint34"; 481 481 clocks = <&pll0_auxclk>; 482 482 };
+1 -1
arch/arm/boot/dts/imx6q-pistachio.dts
··· 103 103 power { 104 104 label = "Power Button"; 105 105 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 106 - gpio-key,wakeup; 106 + wakeup-source; 107 107 linux,code = <KEY_POWER>; 108 108 }; 109 109 };
+1 -1
arch/arm/boot/dts/imx6sll-evk.dts
··· 309 309 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 310 310 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 311 311 keep-power-in-suspend; 312 - enable-sdio-wakeup; 312 + wakeup-source; 313 313 vmmc-supply = <&reg_sd3_vmmc>; 314 314 status = "okay"; 315 315 };
+1 -1
arch/arm/boot/dts/imx6sx.dtsi
··· 467 467 }; 468 468 469 469 gpt: gpt@2098000 { 470 - compatible = "fsl,imx6sx-gpt", "fsl,imx31-gpt"; 470 + compatible = "fsl,imx6sx-gpt", "fsl,imx6dl-gpt"; 471 471 reg = <0x02098000 0x4000>; 472 472 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 473 473 clocks = <&clks IMX6SX_CLK_GPT_BUS>,
+1 -1
arch/arm/boot/dts/meson.dtsi
··· 274 274 compatible = "amlogic,meson6-dwmac", "snps,dwmac"; 275 275 reg = <0xc9410000 0x10000 276 276 0xc1108108 0x4>; 277 - interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>; 277 + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 278 278 interrupt-names = "macirq"; 279 279 status = "disabled"; 280 280 };
+1 -2
arch/arm/boot/dts/meson8b-ec100.dts
··· 205 205 cap-sd-highspeed; 206 206 disable-wp; 207 207 208 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 209 - cd-inverted; 208 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 210 209 211 210 vmmc-supply = <&vcc_3v3>; 212 211 };
+1 -3
arch/arm/boot/dts/meson8b-odroidc1.dts
··· 221 221 /* Realtek RTL8211F (0x001cc916) */ 222 222 eth_phy: ethernet-phy@0 { 223 223 reg = <0>; 224 - eee-broken-1000t; 225 224 interrupt-parent = <&gpio_intc>; 226 225 /* GPIOH_3 */ 227 226 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; ··· 272 273 cap-sd-highspeed; 273 274 disable-wp; 274 275 275 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 276 - cd-inverted; 276 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 277 277 278 278 vmmc-supply = <&tflash_vdd>; 279 279 vqmmc-supply = <&tf_io>;
+1 -2
arch/arm/boot/dts/meson8m2-mxiii-plus.dts
··· 206 206 cap-sd-highspeed; 207 207 disable-wp; 208 208 209 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 210 - cd-inverted; 209 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 211 210 212 211 vmmc-supply = <&vcc_3v3>; 213 212 };
+1 -1
arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi
··· 105 105 interrupts-extended = < 106 106 &cpcap 15 0 &cpcap 14 0 &cpcap 28 0 &cpcap 19 0 107 107 &cpcap 18 0 &cpcap 17 0 &cpcap 16 0 &cpcap 49 0 108 - &cpcap 48 1 108 + &cpcap 48 0 109 109 >; 110 110 interrupt-names = 111 111 "id_ground", "id_float", "se0conn", "vbusvld",
-4
arch/arm/boot/dts/omap3-gta04.dtsi
··· 714 714 715 715 vdda-supply = <&vdac>; 716 716 717 - #address-cells = <1>; 718 - #size-cells = <0>; 719 - 720 717 port { 721 - reg = <0>; 722 718 venc_out: endpoint { 723 719 remote-endpoint = <&opa_in>; 724 720 ti,channels = <1>;
+1 -1
arch/arm/boot/dts/omap3-n900.dts
··· 814 814 /* For debugging, it is often good idea to remove this GPIO. 815 815 It means you can remove back cover (to reboot by removing 816 816 battery) and still use the MMC card. */ 817 - cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */ 817 + cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */ 818 818 }; 819 819 820 820 /* most boards use vaux3, only some old versions use vmmc2 instead */
+28 -14
arch/arm/boot/dts/omap3-n950-n9.dtsi
··· 370 370 compatible = "ti,omap2-onenand"; 371 371 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 372 372 373 + /* 374 + * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported 375 + * bootloader set values when booted with v4.19 using both N950 376 + * and N9 devices (OneNAND Manufacturer: Samsung): 377 + * 378 + * gpmc cs0 before gpmc_cs_program_settings: 379 + * cs0 GPMC_CS_CONFIG1: 0xfd001202 380 + * cs0 GPMC_CS_CONFIG2: 0x00181800 381 + * cs0 GPMC_CS_CONFIG3: 0x00030300 382 + * cs0 GPMC_CS_CONFIG4: 0x18001804 383 + * cs0 GPMC_CS_CONFIG5: 0x03171d1d 384 + * cs0 GPMC_CS_CONFIG6: 0x97080000 385 + */ 373 386 gpmc,sync-read; 374 387 gpmc,sync-write; 375 388 gpmc,burst-length = <16>; ··· 392 379 gpmc,device-width = <2>; 393 380 gpmc,mux-add-data = <2>; 394 381 gpmc,cs-on-ns = <0>; 395 - gpmc,cs-rd-off-ns = <87>; 396 - gpmc,cs-wr-off-ns = <87>; 382 + gpmc,cs-rd-off-ns = <122>; 383 + gpmc,cs-wr-off-ns = <122>; 397 384 gpmc,adv-on-ns = <0>; 398 - gpmc,adv-rd-off-ns = <10>; 399 - gpmc,adv-wr-off-ns = <10>; 400 - gpmc,oe-on-ns = <15>; 401 - gpmc,oe-off-ns = <87>; 385 + gpmc,adv-rd-off-ns = <15>; 386 + gpmc,adv-wr-off-ns = <15>; 387 + gpmc,oe-on-ns = <20>; 388 + gpmc,oe-off-ns = <122>; 402 389 gpmc,we-on-ns = <0>; 403 - gpmc,we-off-ns = <87>; 404 - gpmc,rd-cycle-ns = <112>; 405 - gpmc,wr-cycle-ns = <112>; 406 - gpmc,access-ns = <81>; 390 + gpmc,we-off-ns = <122>; 391 + gpmc,rd-cycle-ns = <148>; 392 + gpmc,wr-cycle-ns = <148>; 393 + gpmc,access-ns = <117>; 407 394 gpmc,page-burst-access-ns = <15>; 408 395 gpmc,bus-turnaround-ns = <0>; 409 396 gpmc,cycle2cycle-delay-ns = <0>; 410 397 gpmc,wait-monitoring-ns = <0>; 411 - gpmc,clk-activation-ns = <5>; 412 - gpmc,wr-data-mux-bus-ns = <30>; 413 - gpmc,wr-access-ns = <81>; 414 - gpmc,sync-clk-ps = <15000>; 398 + gpmc,clk-activation-ns = <10>; 399 + gpmc,wr-data-mux-bus-ns = <40>; 400 + gpmc,wr-access-ns = <117>; 401 + 402 + gpmc,sync-clk-ps = <15000>; /* TBC; Where this value came? */ 415 403 416 404 /* 417 405 * MTD partition table corresponding to Nokia's MeeGo 1.2
-2
arch/arm/boot/dts/omap5-l4.dtsi
··· 1046 1046 <SYSC_IDLE_SMART>, 1047 1047 <SYSC_IDLE_SMART_WKUP>; 1048 1048 ti,syss-mask = <1>; 1049 - ti,no-reset-on-init; 1050 - ti,no-idle-on-init; 1051 1049 /* Domains (V, P, C): core, core_pwrdm, l4per_clkdm */ 1052 1050 clocks = <&l4per_clkctrl OMAP5_UART3_CLKCTRL 0>; 1053 1051 clock-names = "fck";
+30 -6
arch/arm/boot/dts/r8a7743.dtsi
··· 1681 1681 1682 1682 du: display@feb00000 { 1683 1683 compatible = "renesas,du-r8a7743"; 1684 - reg = <0 0xfeb00000 0 0x40000>, 1685 - <0 0xfeb90000 0 0x1c>; 1686 - reg-names = "du", "lvds.0"; 1684 + reg = <0 0xfeb00000 0 0x40000>; 1687 1685 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1688 1686 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1689 1687 clocks = <&cpg CPG_MOD 724>, 1690 - <&cpg CPG_MOD 723>, 1691 - <&cpg CPG_MOD 726>; 1692 - clock-names = "du.0", "du.1", "lvds.0"; 1688 + <&cpg CPG_MOD 723>; 1689 + clock-names = "du.0", "du.1"; 1693 1690 status = "disabled"; 1694 1691 1695 1692 ports { ··· 1701 1704 port@1 { 1702 1705 reg = <1>; 1703 1706 du_out_lvds0: endpoint { 1707 + remote-endpoint = <&lvds0_in>; 1708 + }; 1709 + }; 1710 + }; 1711 + }; 1712 + 1713 + lvds0: lvds@feb90000 { 1714 + compatible = "renesas,r8a7743-lvds"; 1715 + reg = <0 0xfeb90000 0 0x1c>; 1716 + clocks = <&cpg CPG_MOD 726>; 1717 + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 1718 + resets = <&cpg 726>; 1719 + status = "disabled"; 1720 + 1721 + ports { 1722 + #address-cells = <1>; 1723 + #size-cells = <0>; 1724 + 1725 + port@0 { 1726 + reg = <0>; 1727 + lvds0_in: endpoint { 1728 + remote-endpoint = <&du_out_lvds0>; 1729 + }; 1730 + }; 1731 + port@1 { 1732 + reg = <1>; 1733 + lvds0_out: endpoint { 1704 1734 }; 1705 1735 }; 1706 1736 };
+1
arch/arm/boot/dts/sun6i-a31.dtsi
··· 216 216 #clock-cells = <0>; 217 217 compatible = "fixed-clock"; 218 218 clock-frequency = <24000000>; 219 + clock-output-names = "osc24M"; 219 220 }; 220 221 221 222 osc32k: clk-32k {
+2 -2
arch/arm/boot/dts/vf610-bk4.dts
··· 110 110 bus-num = <3>; 111 111 status = "okay"; 112 112 spi-slave; 113 + #address-cells = <0>; 113 114 114 - slave@0 { 115 + slave { 115 116 compatible = "lwn,bk4"; 116 117 spi-max-frequency = <30000000>; 117 - reg = <0>; 118 118 }; 119 119 }; 120 120
+1 -2
arch/arm/mach-iop32x/n2100.c
··· 75 75 /* 76 76 * N2100 PCI. 77 77 */ 78 - static int __init 79 - n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 78 + static int n2100_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 80 79 { 81 80 int irq; 82 81
+2 -4
arch/arm/mach-tango/pm.c
··· 3 3 #include <linux/suspend.h> 4 4 #include <asm/suspend.h> 5 5 #include "smc.h" 6 + #include "pm.h" 6 7 7 8 static int tango_pm_powerdown(unsigned long arg) 8 9 { ··· 25 24 .valid = suspend_valid_only_mem, 26 25 }; 27 26 28 - static int __init tango_pm_init(void) 27 + void __init tango_pm_init(void) 29 28 { 30 29 suspend_set_ops(&tango_pm_ops); 31 - return 0; 32 30 } 33 - 34 - late_initcall(tango_pm_init);
+7
arch/arm/mach-tango/pm.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + 3 + #ifdef CONFIG_SUSPEND 4 + void __init tango_pm_init(void); 5 + #else 6 + #define tango_pm_init NULL 7 + #endif
+2
arch/arm/mach-tango/setup.c
··· 2 2 #include <asm/mach/arch.h> 3 3 #include <asm/hardware/cache-l2x0.h> 4 4 #include "smc.h" 5 + #include "pm.h" 5 6 6 7 static void tango_l2c_write(unsigned long val, unsigned int reg) 7 8 { ··· 16 15 .dt_compat = tango_dt_compat, 17 16 .l2c_aux_mask = ~0, 18 17 .l2c_write_sec = tango_l2c_write, 18 + .init_late = tango_pm_init, 19 19 MACHINE_END
-3
arch/arm/plat-pxa/ssp.c
··· 190 190 if (ssp == NULL) 191 191 return -ENODEV; 192 192 193 - iounmap(ssp->mmio_base); 194 - 195 193 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 196 194 release_mem_region(res->start, resource_size(res)); 197 195 ··· 199 201 list_del(&ssp->node); 200 202 mutex_unlock(&ssp_lock); 201 203 202 - kfree(ssp); 203 204 return 0; 204 205 } 205 206
+1
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
··· 188 188 reg = <0x3a3>; 189 189 interrupt-parent = <&r_intc>; 190 190 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 191 + x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 191 192 }; 192 193 }; 193 194
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
··· 390 390 }; 391 391 392 392 video-codec@1c0e000 { 393 - compatible = "allwinner,sun50i-h5-video-engine"; 393 + compatible = "allwinner,sun50i-a64-video-engine"; 394 394 reg = <0x01c0e000 0x1000>; 395 395 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, 396 396 <&ccu CLK_DRAM_VE>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
··· 187 187 max-frequency = <100000000>; 188 188 disable-wp; 189 189 190 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 191 - cd-inverted; 190 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 192 191 193 192 vmmc-supply = <&vddao_3v3>; 194 193 vqmmc-supply = <&vddio_boot>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
··· 305 305 max-frequency = <200000000>; 306 306 disable-wp; 307 307 308 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 309 - cd-inverted; 308 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 310 309 311 310 vmmc-supply = <&vddio_ao3v3>; 312 311 vqmmc-supply = <&vddio_tf>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
··· 238 238 max-frequency = <100000000>; 239 239 disable-wp; 240 240 241 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 242 - cd-inverted; 241 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 243 242 244 243 vmmc-supply = <&vddao_3v3>; 245 244 vqmmc-supply = <&vddio_card>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
··· 258 258 max-frequency = <100000000>; 259 259 disable-wp; 260 260 261 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 262 - cd-inverted; 261 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 263 262 264 263 vmmc-supply = <&tflash_vdd>; 265 264 vqmmc-supply = <&tf_io>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
··· 196 196 max-frequency = <100000000>; 197 197 disable-wp; 198 198 199 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 200 - cd-inverted; 199 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 201 200 202 201 vmmc-supply = <&vddao_3v3>; 203 202 vqmmc-supply = <&vddio_card>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
··· 154 154 max-frequency = <100000000>; 155 155 disable-wp; 156 156 157 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 158 - cd-inverted; 157 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 159 158 160 159 vmmc-supply = <&vcc_3v3>; 161 160 };
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
··· 211 211 max-frequency = <100000000>; 212 212 disable-wp; 213 213 214 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 215 - cd-inverted; 214 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 216 215 217 216 vmmc-supply = <&vddao_3v3>; 218 217 vqmmc-supply = <&vcc_3v3>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
··· 131 131 max-frequency = <100000000>; 132 132 disable-wp; 133 133 134 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 135 - cd-inverted; 134 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 136 135 137 136 vmmc-supply = <&vddao_3v3>; 138 137 vqmmc-supply = <&vddio_card>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
··· 238 238 max-frequency = <100000000>; 239 239 disable-wp; 240 240 241 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 242 - cd-inverted; 241 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 243 242 244 243 vmmc-supply = <&vcc_3v3>; 245 244 vqmmc-supply = <&vcc_card>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
··· 183 183 max-frequency = <100000000>; 184 184 disable-wp; 185 185 186 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 187 - cd-inverted; 186 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 188 187 189 188 vmmc-supply = <&vddao_3v3>; 190 189 vqmmc-supply = <&vddio_card>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
··· 137 137 max-frequency = <100000000>; 138 138 disable-wp; 139 139 140 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 141 - cd-inverted; 140 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 142 141 143 142 vmmc-supply = <&vddao_3v3>; 144 143 vqmmc-supply = <&vddio_boot>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
··· 356 356 max-frequency = <100000000>; 357 357 disable-wp; 358 358 359 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 360 - cd-inverted; 359 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 361 360 362 361 vmmc-supply = <&vddao_3v3>; 363 362 vqmmc-supply = <&vddio_boot>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
··· 147 147 max-frequency = <100000000>; 148 148 disable-wp; 149 149 150 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 151 - cd-inverted; 150 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 152 151 153 152 vmmc-supply = <&vddao_3v3>; 154 153 vqmmc-supply = <&vddio_boot>;
+1 -2
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
··· 170 170 max-frequency = <100000000>; 171 171 disable-wp; 172 172 173 - cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; 174 - cd-inverted; 173 + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 175 174 176 175 vmmc-supply = <&vddao_3v3>; 177 176 vqmmc-supply = <&vddio_boot>;
+1 -1
arch/arm64/boot/dts/qcom/msm8996.dtsi
··· 404 404 }; 405 405 406 406 intc: interrupt-controller@9bc0000 { 407 - compatible = "arm,gic-v3"; 407 + compatible = "qcom,msm8996-gic-v3", "arm,gic-v3"; 408 408 #interrupt-cells = <3>; 409 409 interrupt-controller; 410 410 #redistributor-regions = <1>;
+3
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
··· 1011 1011 <&cpg CPG_CORE R8A774A1_CLK_S3D1>, 1012 1012 <&scif_clk>; 1013 1013 clock-names = "fck", "brg_int", "scif_clk"; 1014 + dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1015 + <&dmac2 0x13>, <&dmac2 0x12>; 1016 + dma-names = "tx", "rx", "tx", "rx"; 1014 1017 power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; 1015 1018 resets = <&cpg 310>; 1016 1019 status = "disabled";
+3
arch/arm64/boot/dts/renesas/r8a7796.dtsi
··· 1262 1262 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1263 1263 <&scif_clk>; 1264 1264 clock-names = "fck", "brg_int", "scif_clk"; 1265 + dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1266 + <&dmac2 0x13>, <&dmac2 0x12>; 1267 + dma-names = "tx", "rx", "tx", "rx"; 1265 1268 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1266 1269 resets = <&cpg 310>; 1267 1270 status = "disabled";
+3
arch/arm64/boot/dts/renesas/r8a77965.dtsi
··· 1068 1068 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1069 1069 <&scif_clk>; 1070 1070 clock-names = "fck", "brg_int", "scif_clk"; 1071 + dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1072 + <&dmac2 0x13>, <&dmac2 0x12>; 1073 + dma-names = "tx", "rx", "tx", "rx"; 1071 1074 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1072 1075 resets = <&cpg 310>; 1073 1076 status = "disabled";
+7 -2
drivers/firmware/arm_scmi/bus.c
··· 119 119 } 120 120 EXPORT_SYMBOL_GPL(scmi_driver_unregister); 121 121 122 + static void scmi_device_release(struct device *dev) 123 + { 124 + kfree(to_scmi_dev(dev)); 125 + } 126 + 122 127 struct scmi_device * 123 128 scmi_device_create(struct device_node *np, struct device *parent, int protocol) 124 129 { ··· 143 138 scmi_dev->dev.parent = parent; 144 139 scmi_dev->dev.of_node = np; 145 140 scmi_dev->dev.bus = &scmi_bus_type; 141 + scmi_dev->dev.release = scmi_device_release; 146 142 dev_set_name(&scmi_dev->dev, "scmi_dev.%d", id); 147 143 148 144 retval = device_register(&scmi_dev->dev); ··· 162 156 void scmi_device_destroy(struct scmi_device *scmi_dev) 163 157 { 164 158 scmi_handle_put(scmi_dev->handle); 165 - device_unregister(&scmi_dev->dev); 166 159 ida_simple_remove(&scmi_bus_id, scmi_dev->id); 167 - kfree(scmi_dev); 160 + device_unregister(&scmi_dev->dev); 168 161 } 169 162 170 163 void scmi_set_handle(struct scmi_device *scmi_dev)
+5 -4
drivers/soc/fsl/qbman/qman.c
··· 1143 1143 static irqreturn_t portal_isr(int irq, void *ptr) 1144 1144 { 1145 1145 struct qman_portal *p = ptr; 1146 - 1147 - u32 clear = QM_DQAVAIL_MASK | p->irq_sources; 1148 1146 u32 is = qm_in(&p->p, QM_REG_ISR) & p->irq_sources; 1147 + u32 clear = 0; 1149 1148 1150 1149 if (unlikely(!is)) 1151 1150 return IRQ_NONE; 1152 1151 1153 1152 /* DQRR-handling if it's interrupt-driven */ 1154 - if (is & QM_PIRQ_DQRI) 1153 + if (is & QM_PIRQ_DQRI) { 1155 1154 __poll_portal_fast(p, QMAN_POLL_LIMIT); 1155 + clear = QM_DQAVAIL_MASK | QM_PIRQ_DQRI; 1156 + } 1156 1157 /* Handling of anything else that's interrupt-driven */ 1157 - clear |= __poll_portal_slow(p, is); 1158 + clear |= __poll_portal_slow(p, is) & QM_PIRQ_SLOW; 1158 1159 qm_out(&p->p, QM_REG_ISR, clear); 1159 1160 return IRQ_HANDLED; 1160 1161 }
+13 -13
include/dt-bindings/clock/imx8mq-clock.h
··· 350 350 #define IMX8MQ_CLK_VPU_G2_ROOT 241 351 351 352 352 /* SCCG PLL GATE */ 353 - #define IMX8MQ_SYS1_PLL_OUT 232 353 + #define IMX8MQ_SYS1_PLL_OUT 242 354 354 #define IMX8MQ_SYS2_PLL_OUT 243 355 355 #define IMX8MQ_SYS3_PLL_OUT 244 356 356 #define IMX8MQ_DRAM_PLL_OUT 245 ··· 372 372 /* txesc clock */ 373 373 #define IMX8MQ_CLK_DSI_IPG_DIV 256 374 374 375 - #define IMX8MQ_CLK_TMU_ROOT 265 375 + #define IMX8MQ_CLK_TMU_ROOT 257 376 376 377 377 /* Display root clocks */ 378 - #define IMX8MQ_CLK_DISP_AXI_ROOT 266 379 - #define IMX8MQ_CLK_DISP_APB_ROOT 267 380 - #define IMX8MQ_CLK_DISP_RTRM_ROOT 268 378 + #define IMX8MQ_CLK_DISP_AXI_ROOT 258 379 + #define IMX8MQ_CLK_DISP_APB_ROOT 259 380 + #define IMX8MQ_CLK_DISP_RTRM_ROOT 260 381 381 382 - #define IMX8MQ_CLK_OCOTP_ROOT 269 382 + #define IMX8MQ_CLK_OCOTP_ROOT 261 383 383 384 - #define IMX8MQ_CLK_DRAM_ALT_ROOT 270 385 - #define IMX8MQ_CLK_DRAM_CORE 271 384 + #define IMX8MQ_CLK_DRAM_ALT_ROOT 262 385 + #define IMX8MQ_CLK_DRAM_CORE 263 386 386 387 - #define IMX8MQ_CLK_MU_ROOT 272 388 - #define IMX8MQ_VIDEO2_PLL_OUT 273 387 + #define IMX8MQ_CLK_MU_ROOT 264 388 + #define IMX8MQ_VIDEO2_PLL_OUT 265 389 389 390 - #define IMX8MQ_CLK_CLKO2 274 390 + #define IMX8MQ_CLK_CLKO2 266 391 391 392 - #define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 275 392 + #define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 267 393 393 394 - #define IMX8MQ_CLK_END 276 394 + #define IMX8MQ_CLK_END 268 395 395 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */