Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"The PPC folks had a large amount of changes queued for 3.13, and now
they are fixing the bugs"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: PPC: Book3S HV: Don't drop low-order page address bits
powerpc: book3s: kvm: Don't abuse host r2 in exit path
powerpc/kvm/booke: Fix build break due to stack frame size warning
KVM: PPC: Book3S: PR: Enable interrupts earlier
KVM: PPC: Book3S: PR: Make svcpu -> vcpu store preempt savvy
KVM: PPC: Book3S: PR: Export kvmppc_copy_to|from_svcpu
KVM: PPC: Book3S: PR: Don't clobber our exit handler id
powerpc: kvm: fix rare but potential deadlock scene
KVM: PPC: Book3S HV: Take SRCU read lock around kvm_read_guest() call
KVM: PPC: Book3S HV: Make tbacct_lock irq-safe
KVM: PPC: Book3S HV: Refine barriers in guest entry/exit
KVM: PPC: Book3S HV: Fix physical address calculations
+112
-62
+4
arch/powerpc/include/asm/kvm_book3s.h
+4
arch/powerpc/include/asm/kvm_book3s.h
···
192
192
extern u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst);
193
193
extern ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst);
194
194
extern int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd);
195
+
extern void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
196
+
struct kvm_vcpu *vcpu);
197
+
extern void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
198
+
struct kvmppc_book3s_shadow_vcpu *svcpu);
195
199
196
200
static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
197
201
{
+2
arch/powerpc/include/asm/kvm_book3s_asm.h
+2
arch/powerpc/include/asm/kvm_book3s_asm.h
+1
-1
arch/powerpc/include/asm/switch_to.h
+1
-1
arch/powerpc/include/asm/switch_to.h
···
35
35
extern void enable_kernel_spe(void);
36
36
extern void giveup_spe(struct task_struct *);
37
37
extern void load_up_spe(struct task_struct *);
38
-
extern void switch_booke_debug_regs(struct thread_struct *new_thread);
38
+
extern void switch_booke_debug_regs(struct debug_reg *new_debug);
39
39
40
40
#ifndef CONFIG_SMP
41
41
extern void discard_lazy_cpu_state(void);
+1
arch/powerpc/kernel/asm-offsets.c
+1
arch/powerpc/kernel/asm-offsets.c
···
576
576
HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
577
577
HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
578
578
HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
579
+
HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
579
580
HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
580
581
HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
581
582
HSTATE_FIELD(HSTATE_NAPPING, napping);
+16
-16
arch/powerpc/kernel/process.c
+16
-16
arch/powerpc/kernel/process.c
···
339
339
#endif
340
340
}
341
341
342
-
static void prime_debug_regs(struct thread_struct *thread)
342
+
static void prime_debug_regs(struct debug_reg *debug)
343
343
{
344
344
/*
345
345
* We could have inherited MSR_DE from userspace, since
···
348
348
*/
349
349
mtmsr(mfmsr() & ~MSR_DE);
350
350
351
-
mtspr(SPRN_IAC1, thread->debug.iac1);
352
-
mtspr(SPRN_IAC2, thread->debug.iac2);
351
+
mtspr(SPRN_IAC1, debug->iac1);
352
+
mtspr(SPRN_IAC2, debug->iac2);
353
353
#if CONFIG_PPC_ADV_DEBUG_IACS > 2
354
-
mtspr(SPRN_IAC3, thread->debug.iac3);
355
-
mtspr(SPRN_IAC4, thread->debug.iac4);
354
+
mtspr(SPRN_IAC3, debug->iac3);
355
+
mtspr(SPRN_IAC4, debug->iac4);
356
356
#endif
357
-
mtspr(SPRN_DAC1, thread->debug.dac1);
358
-
mtspr(SPRN_DAC2, thread->debug.dac2);
357
+
mtspr(SPRN_DAC1, debug->dac1);
358
+
mtspr(SPRN_DAC2, debug->dac2);
359
359
#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
360
-
mtspr(SPRN_DVC1, thread->debug.dvc1);
361
-
mtspr(SPRN_DVC2, thread->debug.dvc2);
360
+
mtspr(SPRN_DVC1, debug->dvc1);
361
+
mtspr(SPRN_DVC2, debug->dvc2);
362
362
#endif
363
-
mtspr(SPRN_DBCR0, thread->debug.dbcr0);
364
-
mtspr(SPRN_DBCR1, thread->debug.dbcr1);
363
+
mtspr(SPRN_DBCR0, debug->dbcr0);
364
+
mtspr(SPRN_DBCR1, debug->dbcr1);
365
365
#ifdef CONFIG_BOOKE
366
-
mtspr(SPRN_DBCR2, thread->debug.dbcr2);
366
+
mtspr(SPRN_DBCR2, debug->dbcr2);
367
367
#endif
368
368
}
369
369
/*
···
371
371
* debug registers, set the debug registers from the values
372
372
* stored in the new thread.
373
373
*/
374
-
void switch_booke_debug_regs(struct thread_struct *new_thread)
374
+
void switch_booke_debug_regs(struct debug_reg *new_debug)
375
375
{
376
376
if ((current->thread.debug.dbcr0 & DBCR0_IDM)
377
-
|| (new_thread->debug.dbcr0 & DBCR0_IDM))
378
-
prime_debug_regs(new_thread);
377
+
|| (new_debug->dbcr0 & DBCR0_IDM))
378
+
prime_debug_regs(new_debug);
379
379
}
380
380
EXPORT_SYMBOL_GPL(switch_booke_debug_regs);
381
381
#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
···
683
683
#endif /* CONFIG_SMP */
684
684
685
685
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
686
-
switch_booke_debug_regs(&new->thread);
686
+
switch_booke_debug_regs(&new->thread.debug);
687
687
#else
688
688
/*
689
689
* For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
+14
-4
arch/powerpc/kvm/book3s_64_mmu_hv.c
+14
-4
arch/powerpc/kvm/book3s_64_mmu_hv.c
···
469
469
slb_v = vcpu->kvm->arch.vrma_slb_v;
470
470
}
471
471
472
+
preempt_disable();
472
473
/* Find the HPTE in the hash table */
473
474
index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v,
474
475
HPTE_V_VALID | HPTE_V_ABSENT);
475
-
if (index < 0)
476
+
if (index < 0) {
477
+
preempt_enable();
476
478
return -ENOENT;
479
+
}
477
480
hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
478
481
v = hptep[0] & ~HPTE_V_HVLOCK;
479
482
gr = kvm->arch.revmap[index].guest_rpte;
···
484
481
/* Unlock the HPTE */
485
482
asm volatile("lwsync" : : : "memory");
486
483
hptep[0] = v;
484
+
preempt_enable();
487
485
488
486
gpte->eaddr = eaddr;
489
487
gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff);
···
669
665
return -EFAULT;
670
666
} else {
671
667
page = pages[0];
668
+
pfn = page_to_pfn(page);
672
669
if (PageHuge(page)) {
673
670
page = compound_head(page);
674
671
pte_size <<= compound_order(page);
···
694
689
}
695
690
rcu_read_unlock_sched();
696
691
}
697
-
pfn = page_to_pfn(page);
698
692
}
699
693
700
694
ret = -EFAULT;
···
711
707
r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M;
712
708
}
713
709
714
-
/* Set the HPTE to point to pfn */
715
-
r = (r & ~(HPTE_R_PP0 - pte_size)) | (pfn << PAGE_SHIFT);
710
+
/*
711
+
* Set the HPTE to point to pfn.
712
+
* Since the pfn is at PAGE_SIZE granularity, make sure we
713
+
* don't mask out lower-order bits if psize < PAGE_SIZE.
714
+
*/
715
+
if (psize < PAGE_SIZE)
716
+
psize = PAGE_SIZE;
717
+
r = (r & ~(HPTE_R_PP0 - psize)) | ((pfn << PAGE_SHIFT) & ~(psize - 1));
716
718
if (hpte_is_writable(r) && !write_ok)
717
719
r = hpte_make_readonly(r);
718
720
ret = RESUME_GUEST;
+14
-10
arch/powerpc/kvm/book3s_hv.c
+14
-10
arch/powerpc/kvm/book3s_hv.c
···
131
131
static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
132
132
{
133
133
struct kvmppc_vcore *vc = vcpu->arch.vcore;
134
+
unsigned long flags;
134
135
135
-
spin_lock(&vcpu->arch.tbacct_lock);
136
+
spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
136
137
if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE &&
137
138
vc->preempt_tb != TB_NIL) {
138
139
vc->stolen_tb += mftb() - vc->preempt_tb;
···
144
143
vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
145
144
vcpu->arch.busy_preempt = TB_NIL;
146
145
}
147
-
spin_unlock(&vcpu->arch.tbacct_lock);
146
+
spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
148
147
}
149
148
150
149
static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
151
150
{
152
151
struct kvmppc_vcore *vc = vcpu->arch.vcore;
152
+
unsigned long flags;
153
153
154
-
spin_lock(&vcpu->arch.tbacct_lock);
154
+
spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
155
155
if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE)
156
156
vc->preempt_tb = mftb();
157
157
if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
158
158
vcpu->arch.busy_preempt = mftb();
159
-
spin_unlock(&vcpu->arch.tbacct_lock);
159
+
spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
160
160
}
161
161
162
162
static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
···
488
486
*/
489
487
if (vc->vcore_state != VCORE_INACTIVE &&
490
488
vc->runner->arch.run_task != current) {
491
-
spin_lock(&vc->runner->arch.tbacct_lock);
489
+
spin_lock_irq(&vc->runner->arch.tbacct_lock);
492
490
p = vc->stolen_tb;
493
491
if (vc->preempt_tb != TB_NIL)
494
492
p += now - vc->preempt_tb;
495
-
spin_unlock(&vc->runner->arch.tbacct_lock);
493
+
spin_unlock_irq(&vc->runner->arch.tbacct_lock);
496
494
} else {
497
495
p = vc->stolen_tb;
498
496
}
···
514
512
core_stolen = vcore_stolen_time(vc, now);
515
513
stolen = core_stolen - vcpu->arch.stolen_logged;
516
514
vcpu->arch.stolen_logged = core_stolen;
517
-
spin_lock(&vcpu->arch.tbacct_lock);
515
+
spin_lock_irq(&vcpu->arch.tbacct_lock);
518
516
stolen += vcpu->arch.busy_stolen;
519
517
vcpu->arch.busy_stolen = 0;
520
-
spin_unlock(&vcpu->arch.tbacct_lock);
518
+
spin_unlock_irq(&vcpu->arch.tbacct_lock);
521
519
if (!dt || !vpa)
522
520
return;
523
521
memset(dt, 0, sizeof(struct dtl_entry));
···
591
589
if (list_empty(&vcpu->kvm->arch.rtas_tokens))
592
590
return RESUME_HOST;
593
591
592
+
idx = srcu_read_lock(&vcpu->kvm->srcu);
594
593
rc = kvmppc_rtas_hcall(vcpu);
594
+
srcu_read_unlock(&vcpu->kvm->srcu, idx);
595
595
596
596
if (rc == -ENOENT)
597
597
return RESUME_HOST;
···
1119
1115
1120
1116
if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
1121
1117
return;
1122
-
spin_lock(&vcpu->arch.tbacct_lock);
1118
+
spin_lock_irq(&vcpu->arch.tbacct_lock);
1123
1119
now = mftb();
1124
1120
vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
1125
1121
vcpu->arch.stolen_logged;
1126
1122
vcpu->arch.busy_preempt = now;
1127
1123
vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
1128
-
spin_unlock(&vcpu->arch.tbacct_lock);
1124
+
spin_unlock_irq(&vcpu->arch.tbacct_lock);
1129
1125
--vc->n_runnable;
1130
1126
list_del(&vcpu->arch.run_list);
1131
1127
}
+7
-2
arch/powerpc/kvm/book3s_hv_rm_mmu.c
+7
-2
arch/powerpc/kvm/book3s_hv_rm_mmu.c
···
225
225
is_io = pa & (HPTE_R_I | HPTE_R_W);
226
226
pte_size = PAGE_SIZE << (pa & KVMPPC_PAGE_ORDER_MASK);
227
227
pa &= PAGE_MASK;
228
+
pa |= gpa & ~PAGE_MASK;
228
229
} else {
229
230
/* Translate to host virtual address */
230
231
hva = __gfn_to_hva_memslot(memslot, gfn);
···
239
238
ptel = hpte_make_readonly(ptel);
240
239
is_io = hpte_cache_bits(pte_val(pte));
241
240
pa = pte_pfn(pte) << PAGE_SHIFT;
241
+
pa |= hva & (pte_size - 1);
242
+
pa |= gpa & ~PAGE_MASK;
242
243
}
243
244
}
244
245
245
246
if (pte_size < psize)
246
247
return H_PARAMETER;
247
-
if (pa && pte_size > psize)
248
-
pa |= gpa & (pte_size - 1);
249
248
250
249
ptel &= ~(HPTE_R_PP0 - psize);
251
250
ptel |= pa;
···
750
749
20, /* 1M, unsupported */
751
750
};
752
751
752
+
/* When called from virtmode, this func should be protected by
753
+
* preempt_disable(), otherwise, the holding of HPTE_V_HVLOCK
754
+
* can trigger deadlock issue.
755
+
*/
753
756
long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v,
754
757
unsigned long valid)
755
758
{
+13
-10
arch/powerpc/kvm/book3s_hv_rmhandlers.S
+13
-10
arch/powerpc/kvm/book3s_hv_rmhandlers.S
···
153
153
154
154
13: b machine_check_fwnmi
155
155
156
-
157
156
/*
158
157
* We come in here when wakened from nap mode on a secondary hw thread.
159
158
* Relocation is off and most register values are lost.
···
223
224
/* Clear our vcpu pointer so we don't come back in early */
224
225
li r0, 0
225
226
std r0, HSTATE_KVM_VCPU(r13)
227
+
/*
228
+
* Make sure we clear HSTATE_KVM_VCPU(r13) before incrementing
229
+
* the nap_count, because once the increment to nap_count is
230
+
* visible we could be given another vcpu.
231
+
*/
226
232
lwsync
227
233
/* Clear any pending IPI - we're an offline thread */
228
234
ld r5, HSTATE_XICS_PHYS(r13)
···
245
241
/* increment the nap count and then go to nap mode */
246
242
ld r4, HSTATE_KVM_VCORE(r13)
247
243
addi r4, r4, VCORE_NAP_COUNT
248
-
lwsync /* make previous updates visible */
249
244
51: lwarx r3, 0, r4
250
245
addi r3, r3, 1
251
246
stwcx. r3, 0, r4
···
754
751
* guest CR, R12 saved in shadow VCPU SCRATCH1/0
755
752
* guest R13 saved in SPRN_SCRATCH0
756
753
*/
757
-
/* abuse host_r2 as third scratch area; we get r2 from PACATOC(r13) */
758
-
std r9, HSTATE_HOST_R2(r13)
754
+
std r9, HSTATE_SCRATCH2(r13)
759
755
760
756
lbz r9, HSTATE_IN_GUEST(r13)
761
757
cmpwi r9, KVM_GUEST_MODE_HOST_HV
762
758
beq kvmppc_bad_host_intr
763
759
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
764
760
cmpwi r9, KVM_GUEST_MODE_GUEST
765
-
ld r9, HSTATE_HOST_R2(r13)
761
+
ld r9, HSTATE_SCRATCH2(r13)
766
762
beq kvmppc_interrupt_pr
767
763
#endif
768
764
/* We're now back in the host but in guest MMU context */
···
781
779
std r6, VCPU_GPR(R6)(r9)
782
780
std r7, VCPU_GPR(R7)(r9)
783
781
std r8, VCPU_GPR(R8)(r9)
784
-
ld r0, HSTATE_HOST_R2(r13)
782
+
ld r0, HSTATE_SCRATCH2(r13)
785
783
std r0, VCPU_GPR(R9)(r9)
786
784
std r10, VCPU_GPR(R10)(r9)
787
785
std r11, VCPU_GPR(R11)(r9)
···
992
990
*/
993
991
/* Increment the threads-exiting-guest count in the 0xff00
994
992
bits of vcore->entry_exit_count */
995
-
lwsync
996
993
ld r5,HSTATE_KVM_VCORE(r13)
997
994
addi r6,r5,VCORE_ENTRY_EXIT
998
995
41: lwarx r3,0,r6
999
996
addi r0,r3,0x100
1000
997
stwcx. r0,0,r6
1001
998
bne 41b
1002
-
lwsync
999
+
isync /* order stwcx. vs. reading napping_threads */
1003
1000
1004
1001
/*
1005
1002
* At this point we have an interrupt that we have to pass
···
1031
1030
sld r0,r0,r4
1032
1031
andc. r3,r3,r0 /* no sense IPI'ing ourselves */
1033
1032
beq 43f
1033
+
/* Order entry/exit update vs. IPIs */
1034
+
sync
1034
1035
mulli r4,r4,PACA_SIZE /* get paca for thread 0 */
1035
1036
subf r6,r4,r13
1036
1037
42: andi. r0,r3,1
···
1641
1638
bge kvm_cede_exit
1642
1639
stwcx. r4,0,r6
1643
1640
bne 31b
1641
+
/* order napping_threads update vs testing entry_exit_count */
1642
+
isync
1644
1643
li r0,1
1645
1644
stb r0,HSTATE_NAPPING(r13)
1646
-
/* order napping_threads update vs testing entry_exit_count */
1647
-
lwsync
1648
1645
mr r4,r3
1649
1646
lwz r7,VCORE_ENTRY_EXIT(r5)
1650
1647
cmpwi r7,0x100
+11
-8
arch/powerpc/kvm/book3s_interrupts.S
+11
-8
arch/powerpc/kvm/book3s_interrupts.S
···
129
129
* R12 = exit handler id
130
130
* R13 = PACA
131
131
* SVCPU.* = guest *
132
+
* MSR.EE = 1
132
133
*
133
134
*/
134
135
136
+
PPC_LL r3, GPR4(r1) /* vcpu pointer */
137
+
138
+
/*
139
+
* kvmppc_copy_from_svcpu can clobber volatile registers, save
140
+
* the exit handler id to the vcpu and restore it from there later.
141
+
*/
142
+
stw r12, VCPU_TRAP(r3)
143
+
135
144
/* Transfer reg values from shadow vcpu back to vcpu struct */
136
145
/* On 64-bit, interrupts are still off at this point */
137
-
PPC_LL r3, GPR4(r1) /* vcpu pointer */
146
+
138
147
GET_SHADOW_VCPU(r4)
139
148
bl FUNC(kvmppc_copy_from_svcpu)
140
149
nop
141
150
142
151
#ifdef CONFIG_PPC_BOOK3S_64
143
-
/* Re-enable interrupts */
144
-
ld r3, HSTATE_HOST_MSR(r13)
145
-
ori r3, r3, MSR_EE
146
-
MTMSR_EERI(r3)
147
-
148
152
/*
149
153
* Reload kernel SPRG3 value.
150
154
* No need to save guest value as usermode can't modify SPRG3.
151
155
*/
152
156
ld r3, PACA_SPRG3(r13)
153
157
mtspr SPRN_SPRG3, r3
154
-
155
158
#endif /* CONFIG_PPC_BOOK3S_64 */
156
159
157
160
/* R7 = vcpu */
···
180
177
PPC_STL r31, VCPU_GPR(R31)(r7)
181
178
182
179
/* Pass the exit number as 3rd argument to kvmppc_handle_exit */
183
-
mr r5, r12
180
+
lwz r5, VCPU_TRAP(r7)
184
181
185
182
/* Restore r3 (kvm_run) and r4 (vcpu) */
186
183
REST_2GPRS(3, r1)
+22
arch/powerpc/kvm/book3s_pr.c
+22
arch/powerpc/kvm/book3s_pr.c
···
66
66
struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
67
67
memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
68
68
svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
69
+
svcpu->in_use = 0;
69
70
svcpu_put(svcpu);
70
71
#endif
71
72
vcpu->cpu = smp_processor_id();
···
79
78
{
80
79
#ifdef CONFIG_PPC_BOOK3S_64
81
80
struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
81
+
if (svcpu->in_use) {
82
+
kvmppc_copy_from_svcpu(vcpu, svcpu);
83
+
}
82
84
memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
83
85
to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
84
86
svcpu_put(svcpu);
···
114
110
svcpu->ctr = vcpu->arch.ctr;
115
111
svcpu->lr = vcpu->arch.lr;
116
112
svcpu->pc = vcpu->arch.pc;
113
+
svcpu->in_use = true;
117
114
}
118
115
119
116
/* Copy data touched by real-mode code from shadow vcpu back to vcpu */
120
117
void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
121
118
struct kvmppc_book3s_shadow_vcpu *svcpu)
122
119
{
120
+
/*
121
+
* vcpu_put would just call us again because in_use hasn't
122
+
* been updated yet.
123
+
*/
124
+
preempt_disable();
125
+
126
+
/*
127
+
* Maybe we were already preempted and synced the svcpu from
128
+
* our preempt notifiers. Don't bother touching this svcpu then.
129
+
*/
130
+
if (!svcpu->in_use)
131
+
goto out;
132
+
123
133
vcpu->arch.gpr[0] = svcpu->gpr[0];
124
134
vcpu->arch.gpr[1] = svcpu->gpr[1];
125
135
vcpu->arch.gpr[2] = svcpu->gpr[2];
···
157
139
vcpu->arch.fault_dar = svcpu->fault_dar;
158
140
vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
159
141
vcpu->arch.last_inst = svcpu->last_inst;
142
+
svcpu->in_use = false;
143
+
144
+
out:
145
+
preempt_enable();
160
146
}
161
147
162
148
static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
+1
-5
arch/powerpc/kvm/book3s_rmhandlers.S
+1
-5
arch/powerpc/kvm/book3s_rmhandlers.S
···
153
153
154
154
li r6, MSR_IR | MSR_DR
155
155
andc r6, r5, r6 /* Clear DR and IR in MSR value */
156
-
#ifdef CONFIG_PPC_BOOK3S_32
157
156
/*
158
157
* Set EE in HOST_MSR so that it's enabled when we get into our
159
-
* C exit handler function. On 64-bit we delay enabling
160
-
* interrupts until we have finished transferring stuff
161
-
* to or from the PACA.
158
+
* C exit handler function.
162
159
*/
163
160
ori r5, r5, MSR_EE
164
-
#endif
165
161
mtsrr0 r7
166
162
mtsrr1 r6
167
163
RFI
+6
-6
arch/powerpc/kvm/booke.c
+6
-6
arch/powerpc/kvm/booke.c
···
681
681
int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
682
682
{
683
683
int ret, s;
684
-
struct thread_struct thread;
684
+
struct debug_reg debug;
685
685
#ifdef CONFIG_PPC_FPU
686
686
struct thread_fp_state fp;
687
687
int fpexc_mode;
···
723
723
#endif
724
724
725
725
/* Switch to guest debug context */
726
-
thread.debug = vcpu->arch.shadow_dbg_reg;
727
-
switch_booke_debug_regs(&thread);
728
-
thread.debug = current->thread.debug;
726
+
debug = vcpu->arch.shadow_dbg_reg;
727
+
switch_booke_debug_regs(&debug);
728
+
debug = current->thread.debug;
729
729
current->thread.debug = vcpu->arch.shadow_dbg_reg;
730
730
731
731
kvmppc_fix_ee_before_entry();
···
736
736
We also get here with interrupts enabled. */
737
737
738
738
/* Switch back to user space debug context */
739
-
switch_booke_debug_regs(&thread);
740
-
current->thread.debug = thread.debug;
739
+
switch_booke_debug_regs(&debug);
740
+
current->thread.debug = debug;
741
741
742
742
#ifdef CONFIG_PPC_FPU
743
743
kvmppc_save_guest_fp(vcpu);