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Merge tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
"Here are some USB fixes for 4.5-rc3.

The usual, xhci fixes for reported issues, combined with some small
gadget driver fixes, and a MAINTAINERS file update. All have been in
linux-next with no reported issues"

* tag 'usb-4.5-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
xhci: harden xhci_find_next_ext_cap against device removal
xhci: Fix list corruption in urb dequeue at host removal
usb: host: xhci-plat: fix NULL pointer in probe for device tree case
usb: xhci-mtk: fix AHB bus hang up caused by roothubs polling
usb: xhci-mtk: fix bpkts value of LS/HS periodic eps not behind TT
usb: xhci: apply XHCI_PME_STUCK_QUIRK to Intel Broxton-M platforms
usb: xhci: set SSIC port unused only if xhci_suspend succeeds
usb: xhci: add a quirk bit for ssic port unused
usb: xhci: handle both SSIC ports in PME stuck quirk
usb: dwc3: gadget: set the OTG flag in dwc3 gadget driver.
Revert "xhci: don't finish a TD if we get a short-transfer event mid TD"
MAINTAINERS: fix my email address
usb: dwc2: Fix probe problem on bcm2835
Revert "usb: dwc2: Move reset into dwc2_get_hwparams()"
usb: musb: ux500: Fix NULL pointer dereference at system PM
usb: phy: mxs: declare variable with initialized value
usb: phy: msm: fix error handling in probe.

+131 -65
+5 -5
MAINTAINERS
··· 3450 3450 F: drivers/usb/dwc2/ 3451 3451 3452 3452 DESIGNWARE USB3 DRD IP DRIVER 3453 - M: Felipe Balbi <balbi@ti.com> 3453 + M: Felipe Balbi <balbi@kernel.org> 3454 3454 L: linux-usb@vger.kernel.org 3455 3455 L: linux-omap@vger.kernel.org 3456 3456 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git ··· 7362 7362 F: include/linux/isicom.h 7363 7363 7364 7364 MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER 7365 - M: Felipe Balbi <balbi@ti.com> 7365 + M: Felipe Balbi <balbi@kernel.org> 7366 7366 L: linux-usb@vger.kernel.org 7367 7367 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git 7368 7368 S: Maintained ··· 7931 7931 F: drivers/staging/media/omap4iss/ 7932 7932 7933 7933 OMAP USB SUPPORT 7934 - M: Felipe Balbi <balbi@ti.com> 7934 + M: Felipe Balbi <balbi@kernel.org> 7935 7935 L: linux-usb@vger.kernel.org 7936 7936 L: linux-omap@vger.kernel.org 7937 7937 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git ··· 11314 11314 F: drivers/usb/host/ehci* 11315 11315 11316 11316 USB GADGET/PERIPHERAL SUBSYSTEM 11317 - M: Felipe Balbi <balbi@ti.com> 11317 + M: Felipe Balbi <balbi@kernel.org> 11318 11318 L: linux-usb@vger.kernel.org 11319 11319 W: http://www.linux-usb.org/gadget 11320 11320 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git ··· 11390 11390 F: drivers/net/usb/pegasus.* 11391 11391 11392 11392 USB PHY LAYER 11393 - M: Felipe Balbi <balbi@ti.com> 11393 + M: Felipe Balbi <balbi@kernel.org> 11394 11394 L: linux-usb@vger.kernel.org 11395 11395 T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git 11396 11396 S: Maintained
-14
drivers/usb/dwc2/core.c
··· 572 572 set = host ? GUSBCFG_FORCEHOSTMODE : GUSBCFG_FORCEDEVMODE; 573 573 clear = host ? GUSBCFG_FORCEDEVMODE : GUSBCFG_FORCEHOSTMODE; 574 574 575 - /* 576 - * If the force mode bit is already set, don't set it. 577 - */ 578 - if ((gusbcfg & set) && !(gusbcfg & clear)) 579 - return false; 580 - 581 575 gusbcfg &= ~clear; 582 576 gusbcfg |= set; 583 577 dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG); ··· 3272 3278 /** 3273 3279 * During device initialization, read various hardware configuration 3274 3280 * registers and interpret the contents. 3275 - * 3276 - * This should be called during driver probe. It will perform a core 3277 - * soft reset in order to get the reset values of the parameters. 3278 3281 */ 3279 3282 int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) 3280 3283 { ··· 3279 3288 unsigned width; 3280 3289 u32 hwcfg1, hwcfg2, hwcfg3, hwcfg4; 3281 3290 u32 grxfsiz; 3282 - int retval; 3283 3291 3284 3292 /* 3285 3293 * Attempt to ensure this device is really a DWC_otg Controller. ··· 3297 3307 dev_dbg(hsotg->dev, "Core Release: %1x.%1x%1x%1x (snpsid=%x)\n", 3298 3308 hw->snpsid >> 12 & 0xf, hw->snpsid >> 8 & 0xf, 3299 3309 hw->snpsid >> 4 & 0xf, hw->snpsid & 0xf, hw->snpsid); 3300 - 3301 - retval = dwc2_core_reset(hsotg); 3302 - if (retval) 3303 - return retval; 3304 3310 3305 3311 hwcfg1 = dwc2_readl(hsotg->regs + GHWCFG1); 3306 3312 hwcfg2 = dwc2_readl(hsotg->regs + GHWCFG2);
+7 -1
drivers/usb/dwc2/platform.c
··· 530 530 if (retval) 531 531 return retval; 532 532 533 - /* Reset the controller and detect hardware config values */ 533 + /* 534 + * Reset before dwc2_get_hwparams() then it could get power-on real 535 + * reset value form registers. 536 + */ 537 + dwc2_core_reset_and_force_dr_mode(hsotg); 538 + 539 + /* Detect config values from hardware */ 534 540 retval = dwc2_get_hwparams(hsotg); 535 541 if (retval) 536 542 goto error;
+1
drivers/usb/dwc3/gadget.c
··· 2789 2789 dwc->gadget.speed = USB_SPEED_UNKNOWN; 2790 2790 dwc->gadget.sg_supported = true; 2791 2791 dwc->gadget.name = "dwc3-gadget"; 2792 + dwc->gadget.is_otg = dwc->dr_mode == USB_DR_MODE_OTG; 2792 2793 2793 2794 /* 2794 2795 * FIXME We might be setting max_speed to <SUPER, however versions
+4
drivers/usb/host/xhci-ext-caps.h
··· 112 112 offset = start; 113 113 if (!start || start == XHCI_HCC_PARAMS_OFFSET) { 114 114 val = readl(base + XHCI_HCC_PARAMS_OFFSET); 115 + if (val == ~0) 116 + return 0; 115 117 offset = XHCI_HCC_EXT_CAPS(val) << 2; 116 118 if (!offset) 117 119 return 0; 118 120 }; 119 121 do { 120 122 val = readl(base + offset); 123 + if (val == ~0) 124 + return 0; 121 125 if (XHCI_EXT_CAPS_ID(val) == id && offset != start) 122 126 return offset; 123 127
+13 -3
drivers/usb/host/xhci-mtk-sch.c
··· 275 275 return false; 276 276 277 277 /* 278 - * for LS & FS periodic endpoints which its device don't attach 279 - * to TT are also ignored, root-hub will schedule them directly 278 + * for LS & FS periodic endpoints which its device is not behind 279 + * a TT are also ignored, root-hub will schedule them directly, 280 + * but need set @bpkts field of endpoint context to 1. 280 281 */ 281 282 if (is_fs_or_ls(speed) && !has_tt) 282 283 return false; ··· 340 339 GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)), 341 340 usb_endpoint_dir_in(&ep->desc), ep); 342 341 343 - if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) 342 + if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) { 343 + /* 344 + * set @bpkts to 1 if it is LS or FS periodic endpoint, and its 345 + * device does not connected through an external HS hub 346 + */ 347 + if (usb_endpoint_xfer_int(&ep->desc) 348 + || usb_endpoint_xfer_isoc(&ep->desc)) 349 + ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1)); 350 + 344 351 return 0; 352 + } 345 353 346 354 bw_index = get_bw_index(xhci, udev, ep); 347 355 sch_bw = &sch_array[bw_index];
+23
drivers/usb/host/xhci-mtk.c
··· 696 696 } 697 697 698 698 #ifdef CONFIG_PM_SLEEP 699 + /* 700 + * if ip sleep fails, and all clocks are disabled, access register will hang 701 + * AHB bus, so stop polling roothubs to avoid regs access on bus suspend. 702 + * and no need to check whether ip sleep failed or not; this will cause SPM 703 + * to wake up system immediately after system suspend complete if ip sleep 704 + * fails, it is what we wanted. 705 + */ 699 706 static int xhci_mtk_suspend(struct device *dev) 700 707 { 701 708 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); 709 + struct usb_hcd *hcd = mtk->hcd; 710 + struct xhci_hcd *xhci = hcd_to_xhci(hcd); 711 + 712 + xhci_dbg(xhci, "%s: stop port polling\n", __func__); 713 + clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); 714 + del_timer_sync(&hcd->rh_timer); 715 + clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); 716 + del_timer_sync(&xhci->shared_hcd->rh_timer); 702 717 703 718 xhci_mtk_host_disable(mtk); 704 719 xhci_mtk_phy_power_off(mtk); ··· 725 710 static int xhci_mtk_resume(struct device *dev) 726 711 { 727 712 struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); 713 + struct usb_hcd *hcd = mtk->hcd; 714 + struct xhci_hcd *xhci = hcd_to_xhci(hcd); 728 715 729 716 usb_wakeup_disable(mtk); 730 717 xhci_mtk_clks_enable(mtk); 731 718 xhci_mtk_phy_power_on(mtk); 732 719 xhci_mtk_host_enable(mtk); 720 + 721 + xhci_dbg(xhci, "%s: restart port polling\n", __func__); 722 + set_bit(HCD_FLAG_POLL_RH, &hcd->flags); 723 + usb_hcd_poll_rh_status(hcd); 724 + set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); 725 + usb_hcd_poll_rh_status(xhci->shared_hcd); 733 726 return 0; 734 727 } 735 728
+42 -14
drivers/usb/host/xhci-pci.c
··· 28 28 #include "xhci.h" 29 29 #include "xhci-trace.h" 30 30 31 - #define PORT2_SSIC_CONFIG_REG2 0x883c 31 + #define SSIC_PORT_NUM 2 32 + #define SSIC_PORT_CFG2 0x880c 33 + #define SSIC_PORT_CFG2_OFFSET 0x30 32 34 #define PROG_DONE (1 << 30) 33 35 #define SSIC_PORT_UNUSED (1 << 31) 34 36 ··· 47 45 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5 48 46 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f 49 47 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f 48 + #define PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI 0x0aa8 50 49 51 50 static const char hcd_name[] = "xhci_hcd"; 52 51 ··· 154 151 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 155 152 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 156 153 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI || 157 - pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) { 154 + pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI || 155 + pdev->device == PCI_DEVICE_ID_INTEL_BROXTON_M_XHCI)) { 158 156 xhci->quirks |= XHCI_PME_STUCK_QUIRK; 157 + } 158 + if (pdev->vendor == PCI_VENDOR_ID_INTEL && 159 + pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) { 160 + xhci->quirks |= XHCI_SSIC_PORT_UNUSED; 159 161 } 160 162 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 161 163 pdev->device == PCI_DEVICE_ID_EJ168) { ··· 320 312 * SSIC PORT need to be marked as "unused" before putting xHCI 321 313 * into D3. After D3 exit, the SSIC port need to be marked as "used". 322 314 * Without this change, xHCI might not enter D3 state. 323 - * Make sure PME works on some Intel xHCI controllers by writing 1 to clear 324 - * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4 325 315 */ 326 - static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend) 316 + static void xhci_ssic_port_unused_quirk(struct usb_hcd *hcd, bool suspend) 327 317 { 328 318 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 329 - struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 330 319 u32 val; 331 320 void __iomem *reg; 321 + int i; 332 322 333 - if (pdev->vendor == PCI_VENDOR_ID_INTEL && 334 - pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) { 323 + for (i = 0; i < SSIC_PORT_NUM; i++) { 324 + reg = (void __iomem *) xhci->cap_regs + 325 + SSIC_PORT_CFG2 + 326 + i * SSIC_PORT_CFG2_OFFSET; 335 327 336 - reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2; 337 - 338 - /* Notify SSIC that SSIC profile programming is not done */ 328 + /* Notify SSIC that SSIC profile programming is not done. */ 339 329 val = readl(reg) & ~PROG_DONE; 340 330 writel(val, reg); 341 331 ··· 350 344 writel(val, reg); 351 345 readl(reg); 352 346 } 347 + } 348 + 349 + /* 350 + * Make sure PME works on some Intel xHCI controllers by writing 1 to clear 351 + * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4 352 + */ 353 + static void xhci_pme_quirk(struct usb_hcd *hcd) 354 + { 355 + struct xhci_hcd *xhci = hcd_to_xhci(hcd); 356 + void __iomem *reg; 357 + u32 val; 353 358 354 359 reg = (void __iomem *) xhci->cap_regs + 0x80a4; 355 360 val = readl(reg); ··· 372 355 { 373 356 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 374 357 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 358 + int ret; 375 359 376 360 /* 377 361 * Systems with the TI redriver that loses port status change events ··· 382 364 pdev->no_d3cold = true; 383 365 384 366 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) 385 - xhci_pme_quirk(hcd, true); 367 + xhci_pme_quirk(hcd); 386 368 387 - return xhci_suspend(xhci, do_wakeup); 369 + if (xhci->quirks & XHCI_SSIC_PORT_UNUSED) 370 + xhci_ssic_port_unused_quirk(hcd, true); 371 + 372 + ret = xhci_suspend(xhci, do_wakeup); 373 + if (ret && (xhci->quirks & XHCI_SSIC_PORT_UNUSED)) 374 + xhci_ssic_port_unused_quirk(hcd, false); 375 + 376 + return ret; 388 377 } 389 378 390 379 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) ··· 421 396 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 422 397 usb_enable_intel_xhci_ports(pdev); 423 398 399 + if (xhci->quirks & XHCI_SSIC_PORT_UNUSED) 400 + xhci_ssic_port_unused_quirk(hcd, false); 401 + 424 402 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) 425 - xhci_pme_quirk(hcd, false); 403 + xhci_pme_quirk(hcd); 426 404 427 405 retval = xhci_resume(xhci, hibernated); 428 406 return retval;
+2 -1
drivers/usb/host/xhci-plat.c
··· 184 184 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd); 185 185 186 186 /* Just copy data for now */ 187 - *priv = *priv_match; 187 + if (priv_match) 188 + *priv = *priv_match; 188 189 } 189 190 190 191 if (xhci_plat_type_is(hcd, XHCI_PLAT_TYPE_MARVELL_ARMADA)) {
-10
drivers/usb/host/xhci-ring.c
··· 2193 2193 } 2194 2194 /* Fast path - was this the last TRB in the TD for this URB? */ 2195 2195 } else if (event_trb == td->last_trb) { 2196 - if (td->urb_length_set && trb_comp_code == COMP_SHORT_TX) 2197 - return finish_td(xhci, td, event_trb, event, ep, 2198 - status, false); 2199 - 2200 2196 if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { 2201 2197 td->urb->actual_length = 2202 2198 td->urb->transfer_buffer_length - ··· 2244 2248 td->urb->actual_length += 2245 2249 TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - 2246 2250 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 2247 - 2248 - if (trb_comp_code == COMP_SHORT_TX) { 2249 - xhci_dbg(xhci, "mid bulk/intr SP, wait for last TRB event\n"); 2250 - td->urb_length_set = true; 2251 - return 0; 2252 - } 2253 2251 } 2254 2252 2255 2253 return finish_td(xhci, td, event_trb, event, ep, status, false);
+3 -1
drivers/usb/host/xhci.c
··· 1554 1554 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 1555 1555 "HW died, freeing TD."); 1556 1556 urb_priv = urb->hcpriv; 1557 - for (i = urb_priv->td_cnt; i < urb_priv->length; i++) { 1557 + for (i = urb_priv->td_cnt; 1558 + i < urb_priv->length && xhci->devs[urb->dev->slot_id]; 1559 + i++) { 1558 1560 td = urb_priv->td[i]; 1559 1561 if (!list_empty(&td->td_list)) 1560 1562 list_del_init(&td->td_list);
+1
drivers/usb/host/xhci.h
··· 1631 1631 #define XHCI_BROKEN_STREAMS (1 << 19) 1632 1632 #define XHCI_PME_STUCK_QUIRK (1 << 20) 1633 1633 #define XHCI_MTK_HOST (1 << 21) 1634 + #define XHCI_SSIC_PORT_UNUSED (1 << 22) 1634 1635 unsigned int num_active_eps; 1635 1636 unsigned int limit_active_eps; 1636 1637 /* There are two roothubs to keep track of bus suspend info for */
+5 -2
drivers/usb/musb/ux500.c
··· 348 348 struct ux500_glue *glue = dev_get_drvdata(dev); 349 349 struct musb *musb = glue_to_musb(glue); 350 350 351 - usb_phy_set_suspend(musb->xceiv, 1); 351 + if (musb) 352 + usb_phy_set_suspend(musb->xceiv, 1); 353 + 352 354 clk_disable_unprepare(glue->clk); 353 355 354 356 return 0; ··· 368 366 return ret; 369 367 } 370 368 371 - usb_phy_set_suspend(musb->xceiv, 0); 369 + if (musb) 370 + usb_phy_set_suspend(musb->xceiv, 0); 372 371 373 372 return 0; 374 373 }
+24 -13
drivers/usb/phy/phy-msm-usb.c
··· 1599 1599 &motg->id.nb); 1600 1600 if (ret < 0) { 1601 1601 dev_err(&pdev->dev, "register ID notifier failed\n"); 1602 + extcon_unregister_notifier(motg->vbus.extcon, 1603 + EXTCON_USB, &motg->vbus.nb); 1602 1604 return ret; 1603 1605 } 1604 1606 ··· 1662 1660 if (!motg) 1663 1661 return -ENOMEM; 1664 1662 1665 - pdata = dev_get_platdata(&pdev->dev); 1666 - if (!pdata) { 1667 - if (!np) 1668 - return -ENXIO; 1669 - ret = msm_otg_read_dt(pdev, motg); 1670 - if (ret) 1671 - return ret; 1672 - } 1673 - 1674 1663 motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), 1675 1664 GFP_KERNEL); 1676 1665 if (!motg->phy.otg) ··· 1703 1710 if (!motg->regs) 1704 1711 return -ENOMEM; 1705 1712 1713 + pdata = dev_get_platdata(&pdev->dev); 1714 + if (!pdata) { 1715 + if (!np) 1716 + return -ENXIO; 1717 + ret = msm_otg_read_dt(pdev, motg); 1718 + if (ret) 1719 + return ret; 1720 + } 1721 + 1706 1722 /* 1707 1723 * NOTE: The PHYs can be multiplexed between the chipidea controller 1708 1724 * and the dwc3 controller, using a single bit. It is important that ··· 1719 1717 */ 1720 1718 if (motg->phy_number) { 1721 1719 phy_select = devm_ioremap_nocache(&pdev->dev, USB2_PHY_SEL, 4); 1722 - if (!phy_select) 1723 - return -ENOMEM; 1720 + if (!phy_select) { 1721 + ret = -ENOMEM; 1722 + goto unregister_extcon; 1723 + } 1724 1724 /* Enable second PHY with the OTG port */ 1725 1725 writel(0x1, phy_select); 1726 1726 } ··· 1732 1728 motg->irq = platform_get_irq(pdev, 0); 1733 1729 if (motg->irq < 0) { 1734 1730 dev_err(&pdev->dev, "platform_get_irq failed\n"); 1735 - return motg->irq; 1731 + ret = motg->irq; 1732 + goto unregister_extcon; 1736 1733 } 1737 1734 1738 1735 regs[0].supply = "vddcx"; ··· 1742 1737 1743 1738 ret = devm_regulator_bulk_get(motg->phy.dev, ARRAY_SIZE(regs), regs); 1744 1739 if (ret) 1745 - return ret; 1740 + goto unregister_extcon; 1746 1741 1747 1742 motg->vddcx = regs[0].consumer; 1748 1743 motg->v3p3 = regs[1].consumer; ··· 1839 1834 clk_disable_unprepare(motg->clk); 1840 1835 if (!IS_ERR(motg->core_clk)) 1841 1836 clk_disable_unprepare(motg->core_clk); 1837 + unregister_extcon: 1838 + extcon_unregister_notifier(motg->id.extcon, 1839 + EXTCON_USB_HOST, &motg->id.nb); 1840 + extcon_unregister_notifier(motg->vbus.extcon, 1841 + EXTCON_USB, &motg->vbus.nb); 1842 + 1842 1843 return ret; 1843 1844 } 1844 1845
+1 -1
drivers/usb/phy/phy-mxs-usb.c
··· 220 220 /* Return true if the vbus is there */ 221 221 static bool mxs_phy_get_vbus_status(struct mxs_phy *mxs_phy) 222 222 { 223 - unsigned int vbus_value; 223 + unsigned int vbus_value = 0; 224 224 225 225 if (!mxs_phy->regmap_anatop) 226 226 return false;