tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'drm-fixes-2023-09-22-2' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
"Ben Skeggs is stepping away from nouveau and Red Hat for personal
reasons, he'll be missed and we intend to fill the gaps in the
upcoming time with Danilo and Lyude stepping in for now.

Otherwise i915, nouveau, amdgpu with a few each and some misc spread
around.

MAINTAINERS:
- drop Ben as he retired from nouveau

core:
- drm_mm test fixes

fbdev:
- Kconfig fixes

ivpu:
- IRQ-handling fixes

meson:
- Fix memory leak in HDMI EDID code

nouveau:
- Correct type casting
- Fix memory leak in scheduler
- u_memcpya() fixes

i915:
- Prevent error pointer dereference
- Fix PMU busyness values when using GuC mode

amdgpu:
- MST fix
- Vbios part number reporting fix
- Fix a possible memory leak in an error case in the RAS code
- Fix low resolution modes on eDP

amdkfd:
- Fix GPU address for user queue wptr when GART is not at 0"

* tag 'drm-fixes-2023-09-22-2' of git://anongit.freedesktop.org/drm/drm:
MAINTAINERS: remove myself as nouveau maintainer
fbdev/sh7760fb: Depend on FB=y
drm/amdkfd: Use gpu_offset for user queue's wptr
drm/amd/display: fix the ability to use lower resolution modes on eDP
drm/amdgpu: fix a memory leak in amdgpu_ras_feature_enable
Revert "drm/amdgpu: Report vbios version instead of PN"
drm/amd/display: Fix MST recognizes connected displays as one
drm/virtio: clean out_fence on complete_submit
i915/pmu: Move execlist stats initialization to execlist specific setup
drm/i915/gt: Prevent error pointer dereference
drm/meson: fix memory leak on ->hpd_notify callback
accel/ivpu/40xx: Fix buttress interrupt handling
nouveau/u_memcpya: fix NULL vs error pointer bug
nouveau/u_memcpya: use vmemdup_user
drm/nouveau: sched: fix leaking memory of timedout job
drm/nouveau: fence: fix type cast warning in nouveau_fence_emit()
drm: fix up fbdev Kconfig defaults
drm/tests: Fix incorrect argument in drm_test_mm_insert_range

Linus Torvalds 48bb67d3 2f8d62da

+61 -53
-1
MAINTAINERS
··· 6645 6645 F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c 6646 6646 6647 6647 DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS 6648 - M: Ben Skeggs <bskeggs@redhat.com> 6649 6648 M: Karol Herbst <kherbst@redhat.com> 6650 6649 M: Lyude Paul <lyude@redhat.com> 6651 6650 L: dri-devel@lists.freedesktop.org
+8 -1
drivers/accel/ivpu/ivpu_hw_40xx.c
··· 1046 1046 if (status == 0) 1047 1047 return IRQ_NONE; 1048 1048 1049 - REGB_WR32(VPU_40XX_BUTTRESS_INTERRUPT_STAT, status); 1049 + /* Disable global interrupt before handling local buttress interrupts */ 1050 + REGB_WR32(VPU_40XX_BUTTRESS_GLOBAL_INT_MASK, 0x1); 1050 1051 1051 1052 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status)) 1052 1053 ivpu_dbg(vdev, IRQ, "FREQ_CHANGE"); ··· 1092 1091 ivpu_err(vdev, "Survivability error detected\n"); 1093 1092 schedule_recovery = true; 1094 1093 } 1094 + 1095 + /* This must be done after interrupts are cleared at the source. */ 1096 + REGB_WR32(VPU_40XX_BUTTRESS_INTERRUPT_STAT, status); 1097 + 1098 + /* Re-enable global interrupt */ 1099 + REGB_WR32(VPU_40XX_BUTTRESS_GLOBAL_INT_MASK, 0x0); 1095 1100 1096 1101 if (schedule_recovery) 1097 1102 ivpu_pm_schedule_recovery(vdev);
+1 -1
drivers/gpu/drm/Kconfig
··· 136 136 bool "Enable legacy fbdev support for your modesetting driver" 137 137 depends on DRM 138 138 select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE 139 - default y 139 + default FB 140 140 help 141 141 Choose this option if you have a need for the legacy fbdev 142 142 support. Note that this support also provides the linux console
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
··· 1776 1776 struct amdgpu_device *adev = drm_to_adev(ddev); 1777 1777 struct atom_context *ctx = adev->mode_info.atom_context; 1778 1778 1779 - return sysfs_emit(buf, "%s\n", ctx->vbios_ver_str); 1779 + return sysfs_emit(buf, "%s\n", ctx->vbios_pn); 1780 1780 } 1781 1781 1782 1782 static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
+1
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
··· 801 801 enable ? "enable":"disable", 802 802 get_ras_block_str(head), 803 803 amdgpu_ras_is_poison_mode_supported(adev), ret); 804 + kfree(info); 804 805 return ret; 805 806 } 806 807
+1 -1
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
··· 216 216 217 217 if (q->wptr_bo) { 218 218 wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1); 219 - queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off; 219 + queue_input.wptr_mc_addr = amdgpu_bo_gpu_offset(q->wptr_bo) + wptr_addr_off; 220 220 } 221 221 222 222 queue_input.is_kfd_process = 1;
+2 -2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 6098 6098 6099 6099 if (recalculate_timing) 6100 6100 drm_mode_set_crtcinfo(&saved_mode, 0); 6101 - else if (!old_stream) 6102 - drm_mode_set_crtcinfo(&mode, 0); 6103 6101 6104 6102 /* 6105 6103 * If scaling is enabled and refresh rate didn't change ··· 6658 6660 DRM_ERROR("dc_sink is NULL!\n"); 6659 6661 goto fail; 6660 6662 } 6663 + 6664 + drm_mode_set_crtcinfo(mode, 0); 6661 6665 6662 6666 stream = create_validate_stream_for_sink(aconnector, mode, 6663 6667 to_dm_connector_state(connector->state),
+17 -13
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
··· 1178 1178 dto_params.otg_inst = tg->inst; 1179 1179 dto_params.timing = &pipe_ctx->stream->timing; 1180 1180 dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst; 1181 - dccg->funcs->set_dtbclk_dto(dccg, &dto_params); 1182 - dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst); 1183 - dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); 1184 - } else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->disable_symclk_se) 1181 + if (dccg) { 1182 + dccg->funcs->set_dtbclk_dto(dccg, &dto_params); 1183 + dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst); 1184 + dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst); 1185 + } 1186 + } else if (dccg && dccg->funcs->disable_symclk_se) { 1185 1187 dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst, 1186 1188 link_enc->transmitter - TRANSMITTER_UNIPHY_A); 1189 + } 1187 1190 1188 1191 if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) { 1189 1192 /* TODO: This looks like a bug to me as we are disabling HPO IO when ··· 2661 2658 struct clk_mgr *dccg = dc->clk_mgr; 2662 2659 2663 2660 dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool); 2664 - 2665 - dccg->funcs->update_clocks( 2666 - dccg, 2667 - context, 2668 - false); 2661 + if (dccg) 2662 + dccg->funcs->update_clocks( 2663 + dccg, 2664 + context, 2665 + false); 2669 2666 } 2670 2667 2671 2668 void dce110_optimize_bandwidth( ··· 2676 2673 2677 2674 dce110_set_displaymarks(dc, context); 2678 2675 2679 - dccg->funcs->update_clocks( 2680 - dccg, 2681 - context, 2682 - true); 2676 + if (dccg) 2677 + dccg->funcs->update_clocks( 2678 + dccg, 2679 + context, 2680 + true); 2683 2681 } 2684 2682 2685 2683 static void dce110_program_front_end_for_pipe(
+2 -6
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
··· 2692 2692 struct dce_hwseq *hws = dc->hwseq; 2693 2693 unsigned int k1_div = PIXEL_RATE_DIV_NA; 2694 2694 unsigned int k2_div = PIXEL_RATE_DIV_NA; 2695 - struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); 2696 - struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; 2697 2695 2698 2696 if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) { 2699 2697 if (dc->hwseq->funcs.setup_hpo_hw_control) ··· 2711 2713 dto_params.timing = &pipe_ctx->stream->timing; 2712 2714 dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr); 2713 2715 dccg->funcs->set_dtbclk_dto(dccg, &dto_params); 2714 - } else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->enable_symclk_se) 2715 - dccg->funcs->enable_symclk_se(dccg, 2716 - stream_enc->stream_enc_inst, link_enc->transmitter - TRANSMITTER_UNIPHY_A); 2717 - 2716 + } else { 2717 + } 2718 2718 if (hws->funcs.calculate_dccg_k1_k2_values && dc->res_pool->dccg->funcs->set_pixel_rate_div) { 2719 2719 hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div); 2720 2720
+1 -1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
··· 75 75 if (power_on) { 76 76 REG_UPDATE(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_FORCE, 0); 77 77 REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_STATE, 0, 1, 5); 78 - } else { 78 + } else if (!mpc->ctx->dc->debug.disable_mem_low_power) { 79 79 ASSERT(false); 80 80 /* TODO: change to mpc 81 81 * dpp_base->ctx->dc->optimized_required = true;
-1
drivers/gpu/drm/i915/gt/intel_engine_cs.c
··· 558 558 DRIVER_CAPS(i915)->has_logical_contexts = true; 559 559 560 560 ewma__engine_latency_init(&engine->latency); 561 - seqcount_init(&engine->stats.execlists.lock); 562 561 563 562 ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier); 564 563
+2
drivers/gpu/drm/i915/gt/intel_execlists_submission.c
··· 3550 3550 logical_ring_default_vfuncs(engine); 3551 3551 logical_ring_default_irqs(engine); 3552 3552 3553 + seqcount_init(&engine->stats.execlists.lock); 3554 + 3553 3555 if (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE) 3554 3556 rcs_submission_override(engine); 3555 3557
+3 -2
drivers/gpu/drm/i915/gt/intel_lrc.c
··· 1094 1094 I915_BO_ALLOC_PM_VOLATILE); 1095 1095 if (IS_ERR(obj)) { 1096 1096 obj = i915_gem_object_create_shmem(engine->i915, context_size); 1097 + if (IS_ERR(obj)) 1098 + return ERR_CAST(obj); 1099 + 1097 1100 /* 1098 1101 * Wa_22016122933: For Media version 13.0, all Media GT shared 1099 1102 * memory needs to be mapped as WC on CPU side and UC (PAT ··· 1105 1102 if (intel_gt_needs_wa_22016122933(engine->gt)) 1106 1103 i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE); 1107 1104 } 1108 - if (IS_ERR(obj)) 1109 - return ERR_CAST(obj); 1110 1105 1111 1106 vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL); 1112 1107 if (IS_ERR(vma)) {
+2
drivers/gpu/drm/meson/meson_encoder_hdmi.c
··· 334 334 return; 335 335 336 336 cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid); 337 + 338 + kfree(edid); 337 339 } else 338 340 cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier); 339 341 }
+5 -14
drivers/gpu/drm/nouveau/nouveau_drv.h
··· 189 189 static inline void * 190 190 u_memcpya(uint64_t user, unsigned int nmemb, unsigned int size) 191 191 { 192 - void *mem; 193 - void __user *userptr = (void __force __user *)(uintptr_t)user; 192 + void __user *userptr = u64_to_user_ptr(user); 193 + size_t bytes; 194 194 195 - size *= nmemb; 196 - 197 - mem = kvmalloc(size, GFP_KERNEL); 198 - if (!mem) 199 - return ERR_PTR(-ENOMEM); 200 - 201 - if (copy_from_user(mem, userptr, size)) { 202 - u_free(mem); 203 - return ERR_PTR(-EFAULT); 204 - } 205 - 206 - return mem; 195 + if (unlikely(check_mul_overflow(nmemb, size, &bytes))) 196 + return ERR_PTR(-EOVERFLOW); 197 + return vmemdup_user(userptr, bytes); 207 198 } 208 199 209 200 #include <nvif/object.h>
+1 -1
drivers/gpu/drm/nouveau/nouveau_exec.c
··· 213 213 214 214 nouveau_sched_entity_fini(job->entity); 215 215 216 - return DRM_GPU_SCHED_STAT_ENODEV; 216 + return DRM_GPU_SCHED_STAT_NOMINAL; 217 217 } 218 218 219 219 static struct nouveau_job_ops nouveau_exec_job_ops = {
+1 -1
drivers/gpu/drm/nouveau/nouveau_fence.c
··· 207 207 int 208 208 nouveau_fence_emit(struct nouveau_fence *fence) 209 209 { 210 - struct nouveau_channel *chan = fence->channel; 210 + struct nouveau_channel *chan = unrcu_pointer(fence->channel); 211 211 struct nouveau_fence_chan *fctx = chan->fence; 212 212 struct nouveau_fence_priv *priv = (void*)chan->drm->fence; 213 213 int ret;
+9 -3
drivers/gpu/drm/nouveau/nouveau_sched.c
··· 375 375 static enum drm_gpu_sched_stat 376 376 nouveau_sched_timedout_job(struct drm_sched_job *sched_job) 377 377 { 378 + struct drm_gpu_scheduler *sched = sched_job->sched; 378 379 struct nouveau_job *job = to_nouveau_job(sched_job); 380 + enum drm_gpu_sched_stat stat = DRM_GPU_SCHED_STAT_NOMINAL; 379 381 380 - NV_PRINTK(warn, job->cli, "Job timed out.\n"); 382 + drm_sched_stop(sched, sched_job); 381 383 382 384 if (job->ops->timeout) 383 - return job->ops->timeout(job); 385 + stat = job->ops->timeout(job); 386 + else 387 + NV_PRINTK(warn, job->cli, "Generic job timeout.\n"); 384 388 385 - return DRM_GPU_SCHED_STAT_ENODEV; 389 + drm_sched_start(sched, true); 390 + 391 + return stat; 386 392 } 387 393 388 394 static void
+1 -1
drivers/gpu/drm/tests/drm_mm_test.c
··· 939 939 KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max - 1)); 940 940 KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max / 2)); 941 941 KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 942 - max / 2, max / 2)); 942 + max / 2, max)); 943 943 KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 944 944 max / 4 + 1, 3 * max / 4 - 1)); 945 945
-1
drivers/gpu/drm/virtio/virtgpu_submit.c
··· 361 361 submit->buf = NULL; 362 362 submit->buflist = NULL; 363 363 submit->sync_file = NULL; 364 - submit->out_fence = NULL; 365 364 submit->out_fence_fd = -1; 366 365 } 367 366
+1
drivers/video/console/Kconfig
··· 73 73 config FRAMEBUFFER_CONSOLE 74 74 bool "Framebuffer Console support" 75 75 depends on FB_CORE && !UML 76 + default DRM_FBDEV_EMULATION 76 77 select VT_HW_CONSOLE_BINDING 77 78 select CRC32 78 79 select FONT_SUPPORT
+1 -1
drivers/video/fbdev/Kconfig
··· 1762 1762 1763 1763 config FB_SH7760 1764 1764 bool "SH7760/SH7763/SH7720/SH7721 LCDC support" 1765 - depends on FB && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \ 1765 + depends on FB=y && (CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7763 \ 1766 1766 || CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721) 1767 1767 select FB_IOMEM_HELPERS 1768 1768 help
+1 -1
drivers/video/fbdev/core/Kconfig
··· 28 28 config FB_DEVICE 29 29 bool "Provide legacy /dev/fb* device" 30 30 depends on FB_CORE 31 - default y 31 + default FB 32 32 help 33 33 Say Y here if you want the legacy /dev/fb* device file and 34 34 interfaces within sysfs anc procfs. It is only required if you