Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux
Pull blackfin updates from Steven Miao:
"blackfin updates for Linux 3.11"
* tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux:
smp: refine bf561 smpboot code
bf609: stmmac: fix build after stmmac_mdio_bus_data changed
bf609: add cpu revision 0.1
bf609: rename bfin6xx_spi to bfin_spi3
kgdb: blackfin: include irq_regs.h in kgdb.c
+24
-27
+1
-1
arch/blackfin/Kconfig
+1
-1
arch/blackfin/Kconfig
+2
-2
arch/blackfin/include/asm/bfin6xx_spi.h
arch/blackfin/include/asm/bfin_spi3.h
+2
-2
arch/blackfin/include/asm/bfin6xx_spi.h
arch/blackfin/include/asm/bfin_spi3.h
···
240
240
#define MAX_CTRL_CS 8 /* cs in spi controller */
241
241
242
242
/* device.platform_data for SSP controller devices */
243
-
struct bfin6xx_spi_master {
243
+
struct bfin_spi3_master {
244
244
u16 num_chipselect;
245
245
u16 pin_req[7];
246
246
};
···
248
248
/* spi_board_info.controller_data for SPI slave devices,
249
249
* copied to spi_device.platform_data ... mostly for dma tuning
250
250
*/
251
-
struct bfin6xx_spi_chip {
251
+
struct bfin_spi3_chip {
252
252
u32 control;
253
253
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
254
254
u32 tx_dummy_val; /* tx value for rx only transfer */
+1
arch/blackfin/kernel/kgdb.c
+1
arch/blackfin/kernel/kgdb.c
+3
-4
arch/blackfin/mach-bf561/smp.c
+3
-4
arch/blackfin/mach-bf561/smp.c
···
69
69
SSYNC();
70
70
71
71
/* We are done with local CPU inits, unblock the boot CPU. */
72
-
set_cpu_online(cpu, true);
73
72
spin_lock(&boot_lock);
74
73
spin_unlock(&boot_lock);
75
74
}
···
90
91
SSYNC();
91
92
}
92
93
93
-
timeout = jiffies + 1 * HZ;
94
+
timeout = jiffies + HZ;
95
+
/* release the lock and let coreb run */
96
+
spin_unlock(&boot_lock);
94
97
while (time_before(jiffies, timeout)) {
95
98
if (cpu_online(cpu))
96
99
break;
···
101
100
}
102
101
103
102
if (cpu_online(cpu)) {
104
-
/* release the lock and let coreb run */
105
-
spin_unlock(&boot_lock);
106
103
return 0;
107
104
} else
108
105
panic("CPU%u: processor failed to boot\n", cpu);
+9
-10
arch/blackfin/mach-bf609/boards/ezkit.c
+9
-10
arch/blackfin/mach-bf609/boards/ezkit.c
···
17
17
#include <linux/i2c.h>
18
18
#include <linux/interrupt.h>
19
19
#include <linux/usb/musb.h>
20
-
#include <asm/bfin6xx_spi.h>
20
+
#include <asm/bfin_spi3.h>
21
21
#include <asm/dma.h>
22
22
#include <asm/gpio.h>
23
23
#include <asm/nand.h>
···
108
108
static unsigned short pins[] = P_RMII0;
109
109
110
110
static struct stmmac_mdio_bus_data phy_private_data = {
111
-
.bus_id = 0,
112
111
.phy_mask = 1,
113
112
};
114
113
···
744
745
.type = "w25q32",
745
746
};
746
747
747
-
static struct bfin6xx_spi_chip spi_flash_chip_info = {
748
+
static struct bfin_spi3_chip spi_flash_chip_info = {
748
749
.enable_dma = true, /* use dma transfer with this chip*/
749
750
};
750
751
#endif
751
752
752
753
#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
753
-
static struct bfin6xx_spi_chip spidev_chip_info = {
754
+
static struct bfin_spi3_chip spidev_chip_info = {
754
755
.enable_dma = true,
755
756
};
756
757
#endif
···
1295
1296
},
1296
1297
#endif
1297
1298
};
1298
-
#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1299
+
#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1299
1300
/* SPI (0) */
1300
1301
static struct resource bfin_spi0_resource[] = {
1301
1302
{
···
1336
1337
};
1337
1338
1338
1339
/* SPI controller data */
1339
-
static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1340
+
static struct bfin_spi3_master bf60x_spi_master_info0 = {
1340
1341
.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1341
1342
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1342
1343
};
1343
1344
1344
1345
static struct platform_device bf60x_spi_master0 = {
1345
-
.name = "bfin-spi",
1346
+
.name = "bfin-spi3",
1346
1347
.id = 0, /* Bus number */
1347
1348
.num_resources = ARRAY_SIZE(bfin_spi0_resource),
1348
1349
.resource = bfin_spi0_resource,
···
1351
1352
},
1352
1353
};
1353
1354
1354
-
static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1355
+
static struct bfin_spi3_master bf60x_spi_master_info1 = {
1355
1356
.num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1356
1357
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1357
1358
};
1358
1359
1359
1360
static struct platform_device bf60x_spi_master1 = {
1360
-
.name = "bfin-spi",
1361
+
.name = "bfin-spi3",
1361
1362
.id = 1, /* Bus number */
1362
1363
.num_resources = ARRAY_SIZE(bfin_spi1_resource),
1363
1364
.resource = bfin_spi1_resource,
···
1533
1534
&bfin_sdh_device,
1534
1535
#endif
1535
1536
1536
-
#if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1537
+
#if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1537
1538
&bf60x_spi_master0,
1538
1539
&bf60x_spi_master1,
1539
1540
#endif
+8
-10
arch/blackfin/mach-common/smp.c
+8
-10
arch/blackfin/mach-common/smp.c
···
49
49
struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
50
50
51
51
enum ipi_message_type {
52
+
BFIN_IPI_NONE,
52
53
BFIN_IPI_TIMER,
53
54
BFIN_IPI_RESCHEDULE,
54
55
BFIN_IPI_CALL_FUNC,
···
73
72
74
73
/* Simple FIFO buffer, overflow leads to panic */
75
74
struct ipi_data {
76
-
unsigned long count;
77
-
unsigned long bits;
75
+
atomic_t count;
76
+
atomic_t bits;
78
77
};
79
78
80
79
static DEFINE_PER_CPU(struct ipi_data, bfin_ipi);
···
147
146
platform_clear_ipi(cpu, IRQ_SUPPLE_1);
148
147
149
148
bfin_ipi_data = &__get_cpu_var(bfin_ipi);
150
-
smp_mb();
151
149
while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
152
150
msg = 0;
153
151
do {
···
170
170
ipi_cpu_stop(cpu);
171
171
break;
172
172
}
173
+
atomic_dec(&bfin_ipi_data->count);
173
174
} while (msg < BITS_PER_LONG);
174
-
175
-
smp_mb();
176
175
}
177
176
return IRQ_HANDLED;
178
177
}
···
194
195
unsigned long flags;
195
196
196
197
local_irq_save(flags);
197
-
smp_mb();
198
198
for_each_cpu(cpu, cpumask) {
199
199
bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
200
-
smp_mb();
201
-
set_bit(msg, &bfin_ipi_data->bits);
202
-
bfin_ipi_data->count++;
200
+
atomic_set_mask((1 << msg), &bfin_ipi_data->bits);
201
+
atomic_inc(&bfin_ipi_data->count);
203
202
platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1);
204
203
}
205
204
···
316
319
setup_secondary(cpu);
317
320
318
321
platform_secondary_init(cpu);
319
-
320
322
/* setup local core timer */
321
323
bfin_local_timer_setup();
322
324
···
331
335
*/
332
336
calibrate_delay();
333
337
338
+
/* We are done with local CPU inits, unblock the boot CPU. */
339
+
set_cpu_online(cpu, true);
334
340
cpu_startup_entry(CPUHP_ONLINE);
335
341
}
336
342