tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'pinctrl-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl fixes from Linus Walleij:
"First round of pin control fixes for v3.14:

- Protect pinctrl_list_add() with the proper mutex. This was
identified by RedHat. Caused nasty locking warnings was rootcased
by Stanislaw Gruszka.

- Avoid adding dangerous debugfs files when either half of the
subsystem is unused: pinmux or pinconf.

- Various fixes to various drivers: locking, hardware particulars, DT
parsing, error codes"

* tag 'pinctrl-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: tegra: return correct error type
pinctrl: do not init debugfs entries for unimplemented functionalities
pinctrl: protect pinctrl_list add
pinctrl: sirf: correct the pin index of ac97_pins group
pinctrl: imx27: fix offset calculation in imx_read_2bit
pinctrl: vt8500: Change devicetree data parsing
pinctrl: imx27: fix wrong offset to ICONFB
pinctrl: at91: use locked variant of irq_set_handler

Linus Torvalds 49447903 c132adef

+32 -15
+6 -2
drivers/pinctrl/core.c
··· 851 851 kref_init(&p->users); 852 852 853 853 /* Add the pinctrl handle to the global list */ 854 + mutex_lock(&pinctrl_list_mutex); 854 855 list_add_tail(&p->node, &pinctrl_list); 856 + mutex_unlock(&pinctrl_list_mutex); 855 857 856 858 return p; 857 859 } ··· 1644 1642 device_root, pctldev, &pinctrl_groups_ops); 1645 1643 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, 1646 1644 device_root, pctldev, &pinctrl_gpioranges_ops); 1647 - pinmux_init_device_debugfs(device_root, pctldev); 1648 - pinconf_init_device_debugfs(device_root, pctldev); 1645 + if (pctldev->desc->pmxops) 1646 + pinmux_init_device_debugfs(device_root, pctldev); 1647 + if (pctldev->desc->confops) 1648 + pinconf_init_device_debugfs(device_root, pctldev); 1649 1649 } 1650 1650 1651 1651 static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
+5 -5
drivers/pinctrl/pinctrl-at91.c
··· 1286 1286 1287 1287 switch (type) { 1288 1288 case IRQ_TYPE_EDGE_RISING: 1289 - irq_set_handler(d->irq, handle_simple_irq); 1289 + __irq_set_handler_locked(d->irq, handle_simple_irq); 1290 1290 writel_relaxed(mask, pio + PIO_ESR); 1291 1291 writel_relaxed(mask, pio + PIO_REHLSR); 1292 1292 break; 1293 1293 case IRQ_TYPE_EDGE_FALLING: 1294 - irq_set_handler(d->irq, handle_simple_irq); 1294 + __irq_set_handler_locked(d->irq, handle_simple_irq); 1295 1295 writel_relaxed(mask, pio + PIO_ESR); 1296 1296 writel_relaxed(mask, pio + PIO_FELLSR); 1297 1297 break; 1298 1298 case IRQ_TYPE_LEVEL_LOW: 1299 - irq_set_handler(d->irq, handle_level_irq); 1299 + __irq_set_handler_locked(d->irq, handle_level_irq); 1300 1300 writel_relaxed(mask, pio + PIO_LSR); 1301 1301 writel_relaxed(mask, pio + PIO_FELLSR); 1302 1302 break; 1303 1303 case IRQ_TYPE_LEVEL_HIGH: 1304 - irq_set_handler(d->irq, handle_level_irq); 1304 + __irq_set_handler_locked(d->irq, handle_level_irq); 1305 1305 writel_relaxed(mask, pio + PIO_LSR); 1306 1306 writel_relaxed(mask, pio + PIO_REHLSR); 1307 1307 break; ··· 1310 1310 * disable additional interrupt modes: 1311 1311 * fall back to default behavior 1312 1312 */ 1313 - irq_set_handler(d->irq, handle_simple_irq); 1313 + __irq_set_handler_locked(d->irq, handle_simple_irq); 1314 1314 writel_relaxed(mask, pio + PIO_AIMDR); 1315 1315 return 0; 1316 1316 case IRQ_TYPE_NONE:
+5 -5
drivers/pinctrl/pinctrl-imx1-core.c
··· 45 45 #define MX1_DDIR 0x00 46 46 #define MX1_OCR 0x04 47 47 #define MX1_ICONFA 0x0c 48 - #define MX1_ICONFB 0x10 48 + #define MX1_ICONFB 0x14 49 49 #define MX1_GIUS 0x20 50 50 #define MX1_GPR 0x38 51 51 #define MX1_PUEN 0x40 ··· 97 97 u32 old_val; 98 98 u32 new_val; 99 99 100 - dev_dbg(ipctl->dev, "write: register 0x%p offset %d value 0x%x\n", 101 - reg, offset, value); 102 - 103 100 /* Use the next register if the pin's port pin number is >=16 */ 104 101 if (pin_id % 32 >= 16) 105 102 reg += 0x04; 103 + 104 + dev_dbg(ipctl->dev, "write: register 0x%p offset %d value 0x%x\n", 105 + reg, offset, value); 106 106 107 107 /* Get current state of pins */ 108 108 old_val = readl(reg); ··· 139 139 u32 reg_offset) 140 140 { 141 141 void __iomem *reg = imx1_mem(ipctl, pin_id) + reg_offset; 142 - int offset = pin_id % 16; 142 + int offset = (pin_id % 16) * 2; 143 143 144 144 /* Use the next register if the pin's port pin number is >=16 */ 145 145 if (pin_id % 32 >= 16)
+1 -1
drivers/pinctrl/pinctrl-tegra.c
··· 645 645 GFP_KERNEL); 646 646 if (!pmx->regs) { 647 647 dev_err(&pdev->dev, "Can't alloc regs pointer\n"); 648 - return -ENODEV; 648 + return -ENOMEM; 649 649 } 650 650 651 651 for (i = 0; i < pmx->nbanks; i++) {
+1 -1
drivers/pinctrl/sirf/pinctrl-prima2.c
··· 413 413 .funcval = 0, 414 414 }; 415 415 416 - static const unsigned ac97_pins[] = { 33, 34, 35, 36 }; 416 + static const unsigned ac97_pins[] = { 43, 44, 45, 46 }; 417 417 418 418 static const struct sirfsoc_muxmask spi1_muxmask[] = { 419 419 {
+14 -1
drivers/pinctrl/vt8500/pinctrl-wmt.c
··· 276 276 if (!configs) 277 277 return -ENOMEM; 278 278 279 - configs[0] = pull; 279 + switch (pull) { 280 + case 0: 281 + configs[0] = PIN_CONFIG_BIAS_DISABLE; 282 + break; 283 + case 1: 284 + configs[0] = PIN_CONFIG_BIAS_PULL_DOWN; 285 + break; 286 + case 2: 287 + configs[0] = PIN_CONFIG_BIAS_PULL_UP; 288 + break; 289 + default: 290 + configs[0] = PIN_CONFIG_BIAS_DISABLE; 291 + dev_err(data->dev, "invalid pull state %d - disabling\n", pull); 292 + } 280 293 281 294 map->type = PIN_MAP_TYPE_CONFIGS_PIN; 282 295 map->data.configs.group_or_pin = data->groups[group];