tjh.dev / kernel
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drm/amd/display: Fix scratch registers offsets for DCN35

[Why]
Different platforms use differnet NBIO header files,
causing display code to use differnt offset and read
wrong accelerated status.

[How]
- Unified NBIO offset header file across platform.
- Correct scratch registers offsets to proper locations.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4667
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Ray Wu and committed by
Alex Deucher 49a63bc8 3679a3ba

+4 -4
+4 -4
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
··· 203 203 NBIO_BASE_INNER(seg) 204 204 205 205 #define NBIO_SR(reg_name)\ 206 - REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 207 - regBIF_BX2_ ## reg_name 206 + REG_STRUCT.reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 207 + regBIF_BX1_ ## reg_name 208 208 209 209 #define NBIO_SR_ARR(reg_name, id)\ 210 - REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX2_ ## reg_name ## _BASE_IDX) + \ 211 - regBIF_BX2_ ## reg_name 210 + REG_STRUCT[id].reg_name = NBIO_BASE(regBIF_BX1_ ## reg_name ## _BASE_IDX) + \ 211 + regBIF_BX1_ ## reg_name 212 212 213 213 #define bios_regs_init() \ 214 214 ( \