Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/lima: add mask irq callback to gp and pp
This is needed because we want to reset those devices in device-agnostic
code such as lima_sched.
In particular, masking irqs will be useful before a hard reset to
prevent race conditions.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240405152951.1531555-2-nunes.erico@gmail.com
authored by
Erico Nunes
and committed by
Qiang Yu
49c13b4d
42d34193
+42
+12
drivers/gpu/drm/lima/lima_bcast.c
+12
drivers/gpu/drm/lima/lima_bcast.c
···
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}
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+
int lima_bcast_mask_irq(struct lima_ip *ip)
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{
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bcast_write(LIMA_BCAST_BROADCAST_MASK, 0);
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bcast_write(LIMA_BCAST_INTERRUPT_MASK, 0);
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return 0;
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}
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+
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int lima_bcast_reset(struct lima_ip *ip)
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{
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return lima_bcast_hw_init(ip);
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}
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+
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int lima_bcast_init(struct lima_ip *ip)
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{
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int i;
+3
drivers/gpu/drm/lima/lima_bcast.h
+3
drivers/gpu/drm/lima/lima_bcast.h
+8
drivers/gpu/drm/lima/lima_gp.c
+8
drivers/gpu/drm/lima/lima_gp.c
···
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lima_sched_pipe_task_done(pipe);
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}
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+
static void lima_gp_task_mask_irq(struct lima_sched_pipe *pipe)
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{
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struct lima_ip *ip = pipe->processor[0];
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gp_write(LIMA_GP_INT_MASK, 0);
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}
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static int lima_gp_task_recover(struct lima_sched_pipe *pipe)
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{
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struct lima_ip *ip = pipe->processor[0];
···
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pipe->task_error = lima_gp_task_error;
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pipe->task_mmu_error = lima_gp_task_mmu_error;
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pipe->task_recover = lima_gp_task_recover;
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+
pipe->task_mask_irq = lima_gp_task_mask_irq;
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return 0;
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}
+18
drivers/gpu/drm/lima/lima_pp.c
+18
drivers/gpu/drm/lima/lima_pp.c
···
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lima_pp_hard_reset(ip);
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}
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+
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if (pipe->bcast_processor)
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lima_bcast_reset(pipe->bcast_processor);
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}
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static void lima_pp_task_mmu_error(struct lima_sched_pipe *pipe)
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{
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if (atomic_dec_and_test(&pipe->task))
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lima_sched_pipe_task_done(pipe);
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+
}
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+
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static void lima_pp_task_mask_irq(struct lima_sched_pipe *pipe)
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{
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int i;
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+
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for (i = 0; i < pipe->num_processor; i++) {
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struct lima_ip *ip = pipe->processor[i];
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pp_write(LIMA_PP_INT_MASK, 0);
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}
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+
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if (pipe->bcast_processor)
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lima_bcast_mask_irq(pipe->bcast_processor);
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}
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static struct kmem_cache *lima_pp_task_slab;
···
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pipe->task_fini = lima_pp_task_fini;
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pipe->task_error = lima_pp_task_error;
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pipe->task_mmu_error = lima_pp_task_mmu_error;
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+
pipe->task_mask_irq = lima_pp_task_mask_irq;
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return 0;
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}
+1
drivers/gpu/drm/lima/lima_sched.h
+1
drivers/gpu/drm/lima/lima_sched.h