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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc

Pull sparc fix from David Miller:
"FPU register corruption bug fix"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc64: Fix userspace FPU register corruptions.

+11 -81
+5 -11
arch/sparc/include/asm/visasm.h
··· 28 28 * Must preserve %o5 between VISEntryHalf and VISExitHalf */ 29 29 30 30 #define VISEntryHalf \ 31 - rd %fprs, %o5; \ 32 - andcc %o5, FPRS_FEF, %g0; \ 33 - be,pt %icc, 297f; \ 34 - sethi %hi(298f), %g7; \ 35 - sethi %hi(VISenterhalf), %g1; \ 36 - jmpl %g1 + %lo(VISenterhalf), %g0; \ 37 - or %g7, %lo(298f), %g7; \ 38 - clr %o5; \ 39 - 297: wr %o5, FPRS_FEF, %fprs; \ 40 - 298: 31 + VISEntry 32 + 33 + #define VISExitHalf \ 34 + VISExit 41 35 42 36 #define VISEntryHalfFast(fail_label) \ 43 37 rd %fprs, %o5; \ ··· 41 47 ba,a,pt %xcc, fail_label; \ 42 48 297: wr %o5, FPRS_FEF, %fprs; 43 49 44 - #define VISExitHalf \ 50 + #define VISExitHalfFast \ 45 51 wr %o5, 0, %fprs; 46 52 47 53 #ifndef __ASSEMBLY__
+4 -1
arch/sparc/lib/NG4memcpy.S
··· 240 240 add %o0, 0x40, %o0 241 241 bne,pt %icc, 1b 242 242 LOAD(prefetch, %g1 + 0x200, #n_reads_strong) 243 + #ifdef NON_USER_COPY 244 + VISExitHalfFast 245 + #else 243 246 VISExitHalf 244 - 247 + #endif 245 248 brz,pn %o2, .Lexit 246 249 cmp %o2, 19 247 250 ble,pn %icc, .Lsmall_unaligned
+2 -65
arch/sparc/lib/VISsave.S
··· 44 44 45 45 stx %g3, [%g6 + TI_GSR] 46 46 2: add %g6, %g1, %g3 47 - cmp %o5, FPRS_DU 48 - be,pn %icc, 6f 49 - sll %g1, 3, %g1 47 + mov FPRS_DU | FPRS_DL | FPRS_FEF, %o5 48 + sll %g1, 3, %g1 50 49 stb %o5, [%g3 + TI_FPSAVED] 51 50 rd %gsr, %g2 52 51 add %g6, %g1, %g3 ··· 79 80 .align 32 80 81 80: jmpl %g7 + %g0, %g0 81 82 nop 82 - 83 - 6: ldub [%g3 + TI_FPSAVED], %o5 84 - or %o5, FPRS_DU, %o5 85 - add %g6, TI_FPREGS+0x80, %g2 86 - stb %o5, [%g3 + TI_FPSAVED] 87 - 88 - sll %g1, 5, %g1 89 - add %g6, TI_FPREGS+0xc0, %g3 90 - wr %g0, FPRS_FEF, %fprs 91 - membar #Sync 92 - stda %f32, [%g2 + %g1] ASI_BLK_P 93 - stda %f48, [%g3 + %g1] ASI_BLK_P 94 - membar #Sync 95 - ba,pt %xcc, 80f 96 - nop 97 - 98 - .align 32 99 - 80: jmpl %g7 + %g0, %g0 100 - nop 101 - 102 - .align 32 103 - VISenterhalf: 104 - ldub [%g6 + TI_FPDEPTH], %g1 105 - brnz,a,pn %g1, 1f 106 - cmp %g1, 1 107 - stb %g0, [%g6 + TI_FPSAVED] 108 - stx %fsr, [%g6 + TI_XFSR] 109 - clr %o5 110 - jmpl %g7 + %g0, %g0 111 - wr %g0, FPRS_FEF, %fprs 112 - 113 - 1: bne,pn %icc, 2f 114 - srl %g1, 1, %g1 115 - ba,pt %xcc, vis1 116 - sub %g7, 8, %g7 117 - 2: addcc %g6, %g1, %g3 118 - sll %g1, 3, %g1 119 - andn %o5, FPRS_DU, %g2 120 - stb %g2, [%g3 + TI_FPSAVED] 121 - 122 - rd %gsr, %g2 123 - add %g6, %g1, %g3 124 - stx %g2, [%g3 + TI_GSR] 125 - add %g6, %g1, %g2 126 - stx %fsr, [%g2 + TI_XFSR] 127 - sll %g1, 5, %g1 128 - 3: andcc %o5, FPRS_DL, %g0 129 - be,pn %icc, 4f 130 - add %g6, TI_FPREGS, %g2 131 - 132 - add %g6, TI_FPREGS+0x40, %g3 133 - membar #Sync 134 - stda %f0, [%g2 + %g1] ASI_BLK_P 135 - stda %f16, [%g3 + %g1] ASI_BLK_P 136 - membar #Sync 137 - ba,pt %xcc, 4f 138 - nop 139 - 140 - .align 32 141 - 4: and %o5, FPRS_DU, %o5 142 - jmpl %g7 + %g0, %g0 143 - wr %o5, FPRS_FEF, %fprs
-4
arch/sparc/lib/ksyms.c
··· 135 135 void VISenter(void); 136 136 EXPORT_SYMBOL(VISenter); 137 137 138 - /* CRYPTO code needs this */ 139 - void VISenterhalf(void); 140 - EXPORT_SYMBOL(VISenterhalf); 141 - 142 138 extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); 143 139 extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, 144 140 unsigned long *);