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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
Merge branch 'mlx5-misc-enhancements-2025-03-19'
Tariq Toukan says:
====================
mlx5 misc enhancements 2025-03-19
This series introduces multiple small misc enhancements
from the team to the mlx5 core and Eth drivers.
====================
Link: https://patch.msgid.link/1742392983-153050-1-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+61
-38
+11
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c
+11
drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c
···
5
5
#include "en/tc_priv.h"
6
6
#include "en/tc_ct.h"
7
7
8
+
static bool
9
+
tc_act_can_offload_ct(struct mlx5e_tc_act_parse_state *parse_state,
10
+
const struct flow_action_entry *act,
11
+
int act_index,
12
+
struct mlx5_flow_attr *attr)
13
+
{
14
+
return !((act->ct.action & TCA_CT_ACT_COMMIT) &&
15
+
flow_action_is_last_entry(parse_state->flow_action, act));
16
+
}
17
+
8
18
static int
9
19
tc_act_parse_ct(struct mlx5e_tc_act_parse_state *parse_state,
10
20
const struct flow_action_entry *act,
···
66
56
}
67
57
68
58
struct mlx5e_tc_act mlx5e_tc_act_ct = {
59
+
.can_offload = tc_act_can_offload_ct,
69
60
.parse_action = tc_act_parse_ct,
70
61
.post_parse = tc_act_post_parse_ct,
71
62
.is_multi_table_act = tc_act_is_multi_table_act_ct,
+29
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c
+29
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c
···
1349
1349
return 0;
1350
1350
}
1351
1351
1352
+
static bool
1353
+
mlx5_tc_ct_filter_legacy_non_nic_flows(struct mlx5_ct_ft *ft,
1354
+
struct flow_cls_offload *flow)
1355
+
{
1356
+
struct flow_rule *rule = flow_cls_offload_flow_rule(flow);
1357
+
struct mlx5_tc_ct_priv *ct_priv = ft->ct_priv;
1358
+
struct flow_match_meta match;
1359
+
struct net_device *netdev;
1360
+
bool same_dev = false;
1361
+
1362
+
if (!is_mdev_legacy_mode(ct_priv->dev) ||
1363
+
!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
1364
+
return true;
1365
+
1366
+
flow_rule_match_meta(rule, &match);
1367
+
1368
+
if (!(match.key->ingress_ifindex & match.mask->ingress_ifindex))
1369
+
return true;
1370
+
1371
+
netdev = dev_get_by_index(&init_net, match.key->ingress_ifindex);
1372
+
same_dev = ct_priv->netdev == netdev;
1373
+
dev_put(netdev);
1374
+
1375
+
return same_dev;
1376
+
}
1377
+
1352
1378
static int
1353
1379
mlx5_tc_ct_block_flow_offload(enum tc_setup_type type, void *type_data,
1354
1380
void *cb_priv)
···
1387
1361
1388
1362
switch (f->command) {
1389
1363
case FLOW_CLS_REPLACE:
1364
+
if (!mlx5_tc_ct_filter_legacy_non_nic_flows(ft, f))
1365
+
return -EOPNOTSUPP;
1366
+
1390
1367
return mlx5_tc_ct_block_flow_offload_add(ft, f);
1391
1368
case FLOW_CLS_DESTROY:
1392
1369
return mlx5_tc_ct_block_flow_offload_del(ft, f);
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c
···
32
32
u16 pfnum;
33
33
34
34
mlx5_esw_get_port_parent_id(dev, &ppid);
35
-
pfnum = mlx5_get_dev_index(dev);
35
+
pfnum = PCI_FUNC(dev->pdev->devfn);
36
36
external = mlx5_core_is_ecpf_esw_manager(dev);
37
37
if (external)
38
38
controller_num = dev->priv.eswitch->offloads.host_number + 1;
···
110
110
struct netdev_phys_item_id ppid = {};
111
111
u16 pfnum;
112
112
113
-
pfnum = mlx5_get_dev_index(dev);
113
+
pfnum = PCI_FUNC(dev->pdev->devfn);
114
114
mlx5_esw_get_port_parent_id(dev, &ppid);
115
115
memcpy(dl_port->attrs.switch_id.id, &ppid.id[0], ppid.id_len);
116
116
dl_port->attrs.switch_id.id_len = ppid.id_len;
+9
-6
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
+9
-6
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
···
345
345
}
346
346
347
347
#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)
348
-
static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev)
348
+
static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev,
349
+
struct pci_dev *bridge)
349
350
{
350
-
struct pci_dev *bridge = dev->pdev->bus->self;
351
351
u16 reg16;
352
352
int err;
353
-
354
-
if (!bridge)
355
-
return -EOPNOTSUPP;
356
353
357
354
err = pcie_capability_read_word(bridge, PCI_EXP_SLTCTL, ®16);
358
355
if (err)
···
413
416
static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev,
414
417
u8 reset_method)
415
418
{
419
+
struct pci_dev *bridge = dev->pdev->bus->self;
416
420
u16 dev_id;
417
421
int err;
422
+
423
+
if (!bridge) {
424
+
mlx5_core_warn(dev, "PCI bus bridge is not accessible\n");
425
+
return false;
426
+
}
418
427
419
428
if (!MLX5_CAP_GEN(dev, fast_teardown)) {
420
429
mlx5_core_warn(dev, "fast teardown is not supported by firmware\n");
···
429
426
430
427
#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)
431
428
if (reset_method != MLX5_MFRL_REG_PCI_RESET_METHOD_HOT_RESET) {
432
-
err = mlx5_check_hotplug_interrupt(dev);
429
+
err = mlx5_check_hotplug_interrupt(dev, bridge);
433
430
if (err)
434
431
return false;
435
432
}
+9
-29
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
+9
-29
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c
···
583
583
}
584
584
}
585
585
586
-
static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev,
587
-
unsigned long *flags)
586
+
static int mlx5_lag_set_port_sel_mode(struct mlx5_lag *ldev,
587
+
enum mlx5_lag_mode mode,
588
+
unsigned long *flags)
588
589
{
589
590
int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
590
591
struct mlx5_core_dev *dev0;
···
593
592
if (first_idx < 0)
594
593
return -EINVAL;
595
594
595
+
if (mode == MLX5_LAG_MODE_MPESW ||
596
+
mode == MLX5_LAG_MODE_MULTIPATH)
597
+
return 0;
598
+
596
599
dev0 = ldev->pf[first_idx].dev;
600
+
597
601
if (!MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table)) {
598
602
if (ldev->ports > 2)
599
603
return -EINVAL;
···
613
607
return 0;
614
608
}
615
609
616
-
static void mlx5_lag_set_port_sel_mode_offloads(struct mlx5_lag *ldev,
617
-
struct lag_tracker *tracker,
618
-
enum mlx5_lag_mode mode,
619
-
unsigned long *flags)
620
-
{
621
-
int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
622
-
struct lag_func *dev0;
623
-
624
-
if (first_idx < 0 || mode == MLX5_LAG_MODE_MPESW)
625
-
return;
626
-
627
-
dev0 = &ldev->pf[first_idx];
628
-
if (MLX5_CAP_PORT_SELECTION(dev0->dev, port_select_flow_table) &&
629
-
tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH) {
630
-
if (ldev->ports > 2)
631
-
ldev->buckets = MLX5_LAG_MAX_HASH_BUCKETS;
632
-
set_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, flags);
633
-
}
634
-
}
635
-
636
610
static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode,
637
611
struct lag_tracker *tracker, bool shared_fdb,
638
612
unsigned long *flags)
639
613
{
640
-
bool roce_lag = mode == MLX5_LAG_MODE_ROCE;
641
-
642
614
*flags = 0;
643
615
if (shared_fdb) {
644
616
set_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, flags);
···
626
642
if (mode == MLX5_LAG_MODE_MPESW)
627
643
set_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, flags);
628
644
629
-
if (roce_lag)
630
-
return mlx5_lag_set_port_sel_mode_roce(ldev, flags);
631
-
632
-
mlx5_lag_set_port_sel_mode_offloads(ldev, tracker, mode, flags);
633
-
return 0;
645
+
return mlx5_lag_set_port_sel_mode(ldev, mode, flags);
634
646
}
635
647
636
648
char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
···
285
285
NL_SET_ERR_MSG_MOD(extack, "External controller is unsupported");
286
286
return -EOPNOTSUPP;
287
287
}
288
-
if (new_attr->pfnum != mlx5_get_dev_index(dev)) {
288
+
if (new_attr->pfnum != PCI_FUNC(dev->pdev->devfn)) {
289
289
NL_SET_ERR_MSG_MOD(extack, "Invalid pfnum supplied");
290
290
return -EOPNOTSUPP;
291
291
}