Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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os
linux
Merge tag 'iio-fixes-for-6.17b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next
Jonathan writes:
IIO: 2nd set of fixes for the 6.17 cycle (or 6.18 merge window)
adi,ad5360
- Use a signed int type to be able to hold a potential error return.
adi,ad5421
- Use a signed int type to be able to hold a potential error return.
adi,adf4350
- Ensure rules on VCO frequency and prescaler values are met.
- Fix a wrong offset for the clock divisor control field.
xilinx,ams
- Unmask alarms correctly if an event is disabled and re-enabled.
- Fix a wrong register field mask.
* tag 'iio-fixes-for-6.17b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio:
iio: dac: ad5421: use int type to store negative error codes
iio: dac: ad5360: use int type to store negative error codes
iio: frequency: adf4350: Fix ADF4350_REG3_12BIT_CLKDIV_MODE
iio: frequency: adf4350: Fix prescaler usage.
iio: xilinx-ams: Fix AMS_ALARM_THR_DIRECT_MASK
iio: xilinx-ams: Unmask interrupts after updating alarms
iio/adc/pac1934: fix channel disable configuration
+60
-33
+18
-2
drivers/iio/adc/pac1934.c
+18
-2
drivers/iio/adc/pac1934.c
···
88
88
#define PAC1934_VPOWER_3_ADDR 0x19
89
89
#define PAC1934_VPOWER_4_ADDR 0x1A
90
90
#define PAC1934_REFRESH_V_REG_ADDR 0x1F
91
+
#define PAC1934_SLOW_REG_ADDR 0x20
91
92
#define PAC1934_CTRL_STAT_REGS_ADDR 0x1C
92
93
#define PAC1934_PID_REG_ADDR 0xFD
93
94
#define PAC1934_MID_REG_ADDR 0xFE
···
1266
1265
/* no SLOW triggered REFRESH, clear POR */
1267
1266
regs[PAC1934_SLOW_REG_OFF] = 0;
1268
1267
1269
-
ret = i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
1270
-
ARRAY_SIZE(regs), (u8 *)regs);
1268
+
/*
1269
+
* Write the three bytes sequentially, as the device does not support
1270
+
* block write.
1271
+
*/
1272
+
ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_STAT_REGS_ADDR,
1273
+
regs[PAC1934_CHANNEL_DIS_REG_OFF]);
1274
+
if (ret)
1275
+
return ret;
1276
+
1277
+
ret = i2c_smbus_write_byte_data(client,
1278
+
PAC1934_CTRL_STAT_REGS_ADDR + PAC1934_NEG_PWR_REG_OFF,
1279
+
regs[PAC1934_NEG_PWR_REG_OFF]);
1280
+
if (ret)
1281
+
return ret;
1282
+
1283
+
ret = i2c_smbus_write_byte_data(client, PAC1934_SLOW_REG_ADDR,
1284
+
regs[PAC1934_SLOW_REG_OFF]);
1271
1285
if (ret)
1272
1286
return ret;
1273
1287
+26
-21
drivers/iio/adc/xilinx-ams.c
+26
-21
drivers/iio/adc/xilinx-ams.c
···
118
118
#define AMS_ALARM_THRESHOLD_OFF_10 0x10
119
119
#define AMS_ALARM_THRESHOLD_OFF_20 0x20
120
120
121
-
#define AMS_ALARM_THR_DIRECT_MASK BIT(1)
121
+
#define AMS_ALARM_THR_DIRECT_MASK BIT(0)
122
122
#define AMS_ALARM_THR_MIN 0x0000
123
123
#define AMS_ALARM_THR_MAX (BIT(16) - 1)
124
124
···
389
389
ams_pl_update_reg(ams, AMS_REG_CONFIG3, AMS_REGCFG3_ALARM_MASK, cfg);
390
390
}
391
391
392
+
static void ams_unmask(struct ams *ams)
393
+
{
394
+
unsigned int status, unmask;
395
+
396
+
status = readl(ams->base + AMS_ISR_0);
397
+
398
+
/* Clear those bits which are not active anymore */
399
+
unmask = (ams->current_masked_alarm ^ status) & ams->current_masked_alarm;
400
+
401
+
/* Clear status of disabled alarm */
402
+
unmask |= ams->intr_mask;
403
+
404
+
ams->current_masked_alarm &= status;
405
+
406
+
/* Also clear those which are masked out anyway */
407
+
ams->current_masked_alarm &= ~ams->intr_mask;
408
+
409
+
/* Clear the interrupts before we unmask them */
410
+
writel(unmask, ams->base + AMS_ISR_0);
411
+
412
+
ams_update_intrmask(ams, ~AMS_ALARM_MASK, ~AMS_ALARM_MASK);
413
+
}
414
+
392
415
static void ams_update_alarm(struct ams *ams, unsigned long alarm_mask)
393
416
{
394
417
unsigned long flags;
···
424
401
425
402
spin_lock_irqsave(&ams->intr_lock, flags);
426
403
ams_update_intrmask(ams, AMS_ISR0_ALARM_MASK, ~alarm_mask);
404
+
ams_unmask(ams);
427
405
spin_unlock_irqrestore(&ams->intr_lock, flags);
428
406
}
429
407
···
1059
1035
static void ams_unmask_worker(struct work_struct *work)
1060
1036
{
1061
1037
struct ams *ams = container_of(work, struct ams, ams_unmask_work.work);
1062
-
unsigned int status, unmask;
1063
1038
1064
1039
spin_lock_irq(&ams->intr_lock);
1065
-
1066
-
status = readl(ams->base + AMS_ISR_0);
1067
-
1068
-
/* Clear those bits which are not active anymore */
1069
-
unmask = (ams->current_masked_alarm ^ status) & ams->current_masked_alarm;
1070
-
1071
-
/* Clear status of disabled alarm */
1072
-
unmask |= ams->intr_mask;
1073
-
1074
-
ams->current_masked_alarm &= status;
1075
-
1076
-
/* Also clear those which are masked out anyway */
1077
-
ams->current_masked_alarm &= ~ams->intr_mask;
1078
-
1079
-
/* Clear the interrupts before we unmask them */
1080
-
writel(unmask, ams->base + AMS_ISR_0);
1081
-
1082
-
ams_update_intrmask(ams, ~AMS_ALARM_MASK, ~AMS_ALARM_MASK);
1083
-
1040
+
ams_unmask(ams);
1084
1041
spin_unlock_irq(&ams->intr_lock);
1085
1042
1086
1043
/* If still pending some alarm re-trigger the timer */
+1
-1
drivers/iio/dac/ad5360.c
+1
-1
drivers/iio/dac/ad5360.c
+1
-1
drivers/iio/dac/ad5421.c
+1
-1
drivers/iio/dac/ad5421.c
+13
-7
drivers/iio/frequency/adf4350.c
+13
-7
drivers/iio/frequency/adf4350.c
···
149
149
if (freq > ADF4350_MAX_OUT_FREQ || freq < st->min_out_freq)
150
150
return -EINVAL;
151
151
152
+
st->r4_rf_div_sel = 0;
153
+
154
+
/*
155
+
* !\TODO: The below computation is making sure we get a power of 2
156
+
* shift (st->r4_rf_div_sel) so that freq becomes higher or equal to
157
+
* ADF4350_MIN_VCO_FREQ. This might be simplified with fls()/fls_long()
158
+
* and friends.
159
+
*/
160
+
while (freq < ADF4350_MIN_VCO_FREQ) {
161
+
freq <<= 1;
162
+
st->r4_rf_div_sel++;
163
+
}
164
+
152
165
if (freq > ADF4350_MAX_FREQ_45_PRESC) {
153
166
prescaler = ADF4350_REG1_PRESCALER;
154
167
mdiv = 75;
155
168
} else {
156
169
prescaler = 0;
157
170
mdiv = 23;
158
-
}
159
-
160
-
st->r4_rf_div_sel = 0;
161
-
162
-
while (freq < ADF4350_MIN_VCO_FREQ) {
163
-
freq <<= 1;
164
-
st->r4_rf_div_sel++;
165
171
}
166
172
167
173
/*
+1
-1
include/linux/iio/frequency/adf4350.h
+1
-1
include/linux/iio/frequency/adf4350.h
···
51
51
52
52
/* REG3 Bit Definitions */
53
53
#define ADF4350_REG3_12BIT_CLKDIV(x) ((x) << 3)
54
-
#define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 16)
54
+
#define ADF4350_REG3_12BIT_CLKDIV_MODE(x) ((x) << 15)
55
55
#define ADF4350_REG3_12BIT_CSR_EN (1 << 18)
56
56
#define ADF4351_REG3_CHARGE_CANCELLATION_EN (1 << 21)
57
57
#define ADF4351_REG3_ANTI_BACKLASH_3ns_EN (1 << 22)