tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu: don't override default ECO_BITs setting

Leave this bit as hardware default setting

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Hawking Zhang and committed by
Alex Deucher 4ac955ba 2c113b99

-9
-1
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
··· 162 162 ENABLE_ADVANCED_DRIVER_MODEL, 1); 163 163 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 164 164 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 165 - tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 166 165 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 167 166 MTYPE, MTYPE_UC);/* XXX for emulation. */ 168 167 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ATC_EN, 1);
-1
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
··· 196 196 ENABLE_ADVANCED_DRIVER_MODEL, 1); 197 197 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, 198 198 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 199 - tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 200 199 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, 201 200 MTYPE, MTYPE_UC); /* UC, uncached */ 202 201
-1
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
··· 197 197 ENABLE_ADVANCED_DRIVER_MODEL, 1); 198 198 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, 199 199 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 200 - tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 201 200 tmp = REG_SET_FIELD(tmp, GCMC_VM_MX_L1_TLB_CNTL, 202 201 MTYPE, MTYPE_UC); /* UC, uncached */ 203 202
-1
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
··· 145 145 ENABLE_ADVANCED_DRIVER_MODEL, 1); 146 146 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 147 147 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 148 - tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 149 148 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 150 149 MTYPE, MTYPE_UC);/* XXX for emulation. */ 151 150 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ATC_EN, 1);
-1
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
··· 165 165 ENABLE_ADVANCED_DRIVER_MODEL, 1); 166 166 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 167 167 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 168 - tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 169 168 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, 170 169 MTYPE, MTYPE_UC);/* XXX for emulation. */ 171 170 tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ATC_EN, 1);
-1
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
··· 267 267 ENABLE_ADVANCED_DRIVER_MODEL, 1); 268 268 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, 269 269 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 270 - tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 271 270 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, 272 271 MTYPE, MTYPE_UC); /* UC, uncached */ 273 272
-1
drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c
··· 194 194 ENABLE_ADVANCED_DRIVER_MODEL, 1); 195 195 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, 196 196 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 197 - tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, ECO_BITS, 0); 198 197 tmp = REG_SET_FIELD(tmp, MMMC_VM_MX_L1_TLB_CNTL, 199 198 MTYPE, MTYPE_UC); /* UC, uncached */ 200 199
-2
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
··· 190 190 tmp = REG_SET_FIELD(tmp, VMSHAREDVC0_MC_VM_MX_L1_TLB_CNTL, 191 191 SYSTEM_APERTURE_UNMAPPED_ACCESS, 0); 192 192 tmp = REG_SET_FIELD(tmp, VMSHAREDVC0_MC_VM_MX_L1_TLB_CNTL, 193 - ECO_BITS, 0); 194 - tmp = REG_SET_FIELD(tmp, VMSHAREDVC0_MC_VM_MX_L1_TLB_CNTL, 195 193 MTYPE, MTYPE_UC);/* XXX for emulation. */ 196 194 tmp = REG_SET_FIELD(tmp, VMSHAREDVC0_MC_VM_MX_L1_TLB_CNTL, 197 195 ATC_EN, 1);