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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qualcomm: phy-qcom-eusb2-repeater: Use regmap_fields
Switch to regmap_fields, so that the values written into registers are
sanitized by their explicit sizes and the different registers are
structured in an iterable object to make external changes to the init
sequence simpler.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230830-topic-eusb2_override-v2-2-7d8c893d93f6@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Konrad Dybcio
and committed by
Vinod Koul
4ba2e527
c20b59b2
+61
-30
+61
-30
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
+61
-30
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
···
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#define EUSB2_TUNE_SQUELCH_U 0x54
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#define EUSB2_TUNE_USB2_PREEM 0x57
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-
#define QCOM_EUSB2_REPEATER_INIT_CFG(o, v) \
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#define QCOM_EUSB2_REPEATER_INIT_CFG(r, v) \
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{ \
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-
.offset = o, \
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.reg = r, \
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.val = v, \
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}
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enum reg_fields {
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F_TUNE_USB2_PREEM,
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F_TUNE_SQUELCH_U,
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F_TUNE_IUSB2,
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F_NUM_TUNE_FIELDS,
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+
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F_FORCE_VAL_5 = F_NUM_TUNE_FIELDS,
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F_FORCE_EN_5,
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+
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F_EN_CTL1,
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+
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F_RPTR_STATUS,
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F_NUM_FIELDS,
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};
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+
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static struct reg_field eusb2_repeater_tune_reg_fields[F_NUM_FIELDS] = {
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[F_TUNE_USB2_PREEM] = REG_FIELD(EUSB2_TUNE_USB2_PREEM, 0, 2),
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[F_TUNE_SQUELCH_U] = REG_FIELD(EUSB2_TUNE_SQUELCH_U, 0, 2),
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[F_TUNE_IUSB2] = REG_FIELD(EUSB2_TUNE_IUSB2, 0, 3),
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+
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[F_FORCE_VAL_5] = REG_FIELD(EUSB2_FORCE_VAL_5, 0, 7),
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[F_FORCE_EN_5] = REG_FIELD(EUSB2_FORCE_EN_5, 0, 7),
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+
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[F_EN_CTL1] = REG_FIELD(EUSB2_EN_CTL1, 0, 7),
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+
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[F_RPTR_STATUS] = REG_FIELD(EUSB2_RPTR_STATUS, 0, 7),
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};
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+
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struct eusb2_repeater_init_tbl {
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unsigned int offset;
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unsigned int reg;
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unsigned int val;
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};
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···
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struct eusb2_repeater {
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struct device *dev;
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-
struct regmap *regmap;
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struct regmap_field *regs[F_NUM_FIELDS];
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struct phy *phy;
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struct regulator_bulk_data *vregs;
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const struct eusb2_repeater_cfg *cfg;
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u16 base;
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enum phy_mode mode;
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};
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···
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};
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static const struct eusb2_repeater_init_tbl pm8550b_init_tbl[] = {
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QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_IUSB2, 0x8),
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QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_SQUELCH_U, 0x3),
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QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_USB2_PREEM, 0x5),
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_IUSB2, 0x8),
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_SQUELCH_U, 0x3),
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QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_USB2_PREEM, 0x5),
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};
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static const struct eusb2_repeater_cfg pm8550b_eusb2_cfg = {
···
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{
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struct eusb2_repeater *rptr = phy_get_drvdata(phy);
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const struct eusb2_repeater_init_tbl *init_tbl = rptr->cfg->init_tbl;
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-
int num = rptr->cfg->init_tbl_num;
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u32 val;
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int ret;
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int i;
···
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if (ret)
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return ret;
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-
regmap_update_bits(rptr->regmap, rptr->base + EUSB2_EN_CTL1,
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EUSB2_RPTR_EN, EUSB2_RPTR_EN);
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regmap_field_update_bits(rptr->regs[F_EN_CTL1], EUSB2_RPTR_EN, EUSB2_RPTR_EN);
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for (i = 0; i < num; i++)
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regmap_update_bits(rptr->regmap,
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rptr->base + init_tbl[i].offset,
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init_tbl[i].val, init_tbl[i].val);
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for (i = 0; i < rptr->cfg->init_tbl_num; i++)
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regmap_field_update_bits(rptr->regs[init_tbl[i].reg],
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init_tbl[i].val, init_tbl[i].val);
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ret = regmap_read_poll_timeout(rptr->regmap,
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rptr->base + EUSB2_RPTR_STATUS, val,
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val & RPTR_OK, 10, 5);
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ret = regmap_field_read_poll_timeout(rptr->regs[F_RPTR_STATUS],
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val, val & RPTR_OK, 10, 5);
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if (ret)
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dev_err(rptr->dev, "initialization timed-out\n");
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···
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* per eUSB 1.2 Spec. Below implement software workaround until
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* PHY and controller is fixing seen observation.
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*/
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regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_EN_5,
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F_CLK_19P2M_EN, F_CLK_19P2M_EN);
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regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_VAL_5,
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V_CLK_19P2M_EN, V_CLK_19P2M_EN);
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regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
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F_CLK_19P2M_EN, F_CLK_19P2M_EN);
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regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
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V_CLK_19P2M_EN, V_CLK_19P2M_EN);
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break;
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case PHY_MODE_USB_DEVICE:
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/*
···
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* repeater doesn't clear previous value due to shared
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* regulators (say host <-> device mode switch).
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*/
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regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_EN_5,
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F_CLK_19P2M_EN, 0);
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regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_VAL_5,
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V_CLK_19P2M_EN, 0);
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regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
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F_CLK_19P2M_EN, 0);
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regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
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V_CLK_19P2M_EN, 0);
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break;
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default:
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return -EINVAL;
···
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struct device *dev = &pdev->dev;
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struct phy_provider *phy_provider;
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struct device_node *np = dev->of_node;
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struct regmap *regmap;
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int i, ret;
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u32 res;
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int ret;
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rptr = devm_kzalloc(dev, sizeof(*rptr), GFP_KERNEL);
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if (!rptr)
···
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if (!rptr->cfg)
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return -EINVAL;
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rptr->regmap = dev_get_regmap(dev->parent, NULL);
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if (!rptr->regmap)
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regmap = dev_get_regmap(dev->parent, NULL);
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if (!regmap)
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return -ENODEV;
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ret = of_property_read_u32(np, "reg", &res);
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if (ret < 0)
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return ret;
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rptr->base = res;
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for (i = 0; i < F_NUM_FIELDS; i++)
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eusb2_repeater_tune_reg_fields[i].reg += res;
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ret = devm_regmap_field_bulk_alloc(dev, regmap, rptr->regs,
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eusb2_repeater_tune_reg_fields,
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F_NUM_FIELDS);
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if (ret)
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return ret;
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ret = eusb2_repeater_init_vregs(rptr);
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if (ret < 0) {