Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"Not too much this time.
- One nouveau workaround extended to a few more GPUs
- Some amdgpu big endian fixes, and a regression fixer
- Some vmwgfx fixes
- One ttm locking fix
- One vgaarb fix"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
vgaarb: fix signal handling in vga_get()
radeon: Fix VCE IB test on Big-Endian systems
radeon: Fix VCE ring test for Big-Endian systems
radeon/cik: Fix GFX IB test on Big-Endian
drm/amdgpu: fix the lost duplicates checking
drm/nouveau/pmu: remove whitelist for PGOB-exit WAR, enable by default
drm/vmwgfx: Implement the cursor_set2 callback v2
drm/vmwgfx: fix a warning message
drm/ttm: Fixed a read/write lock imbalance
+129
-110
+8
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+8
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
···
477
477
if (domain == AMDGPU_GEM_DOMAIN_CPU)
478
478
goto error_unreserve;
479
479
}
480
+
list_for_each_entry(entry, &duplicates, head) {
481
+
domain = amdgpu_mem_type_to_domain(entry->bo->mem.mem_type);
482
+
/* if anything is swapped out don't swap it in here,
483
+
just abort and wait for the next CS */
484
+
if (domain == AMDGPU_GEM_DOMAIN_CPU)
485
+
goto error_unreserve;
486
+
}
487
+
480
488
r = amdgpu_vm_update_page_directory(adev, bo_va->vm);
481
489
if (r)
482
490
goto error_unreserve;
-1
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
-1
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+4
-31
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
+4
-31
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
···
259
259
};
260
260
261
261
static const struct nvkm_device_pci_vendor
262
-
nvkm_device_pci_10de_0fcd[] = {
263
-
{ 0x17aa, 0x3801, NULL, { .War00C800_0 = true } }, /* Lenovo Y510P */
264
-
{}
265
-
};
266
-
267
-
static const struct nvkm_device_pci_vendor
268
262
nvkm_device_pci_10de_0fd2[] = {
269
263
{ 0x1028, 0x0595, "GeForce GT 640M LE" },
270
264
{ 0x1028, 0x05b2, "GeForce GT 640M LE" },
···
269
275
nvkm_device_pci_10de_0fe3[] = {
270
276
{ 0x103c, 0x2b16, "GeForce GT 745A" },
271
277
{ 0x17aa, 0x3675, "GeForce GT 745A" },
272
-
{}
273
-
};
274
-
275
-
static const struct nvkm_device_pci_vendor
276
-
nvkm_device_pci_10de_0fe4[] = {
277
-
{ 0x144d, 0xc740, NULL, { .War00C800_0 = true } },
278
278
{}
279
279
};
280
280
···
678
690
static const struct nvkm_device_pci_vendor
679
691
nvkm_device_pci_10de_1199[] = {
680
692
{ 0x1458, 0xd001, "GeForce GTX 760" },
681
-
{ 0x1462, 0x1106, "GeForce GTX 780M", { .War00C800_0 = true } }, /* Medion Erazer X7827 */
682
-
{}
683
-
};
684
-
685
-
static const struct nvkm_device_pci_vendor
686
-
nvkm_device_pci_10de_11e0[] = {
687
-
{ 0x1558, 0x5106, NULL, { .War00C800_0 = true } },
688
693
{}
689
694
};
690
695
691
696
static const struct nvkm_device_pci_vendor
692
697
nvkm_device_pci_10de_11e3[] = {
693
698
{ 0x17aa, 0x3683, "GeForce GTX 760A" },
694
-
{}
695
-
};
696
-
697
-
static const struct nvkm_device_pci_vendor
698
-
nvkm_device_pci_10de_11fc[] = {
699
-
{ 0x1179, 0x0001, NULL, { .War00C800_0 = true } }, /* Toshiba Tecra W50 */
700
-
{ 0x17aa, 0x2211, NULL, { .War00C800_0 = true } }, /* Lenovo W541 */
701
-
{ 0x17aa, 0x221e, NULL, { .War00C800_0 = true } }, /* Lenovo W541 */
702
699
{}
703
700
};
704
701
···
1341
1368
{ 0x0fc6, "GeForce GTX 650" },
1342
1369
{ 0x0fc8, "GeForce GT 740" },
1343
1370
{ 0x0fc9, "GeForce GT 730" },
1344
-
{ 0x0fcd, "GeForce GT 755M", nvkm_device_pci_10de_0fcd },
1371
+
{ 0x0fcd, "GeForce GT 755M" },
1345
1372
{ 0x0fce, "GeForce GT 640M LE" },
1346
1373
{ 0x0fd1, "GeForce GT 650M" },
1347
1374
{ 0x0fd2, "GeForce GT 640M", nvkm_device_pci_10de_0fd2 },
···
1355
1382
{ 0x0fe1, "GeForce GT 730M" },
1356
1383
{ 0x0fe2, "GeForce GT 745M" },
1357
1384
{ 0x0fe3, "GeForce GT 745M", nvkm_device_pci_10de_0fe3 },
1358
-
{ 0x0fe4, "GeForce GT 750M", nvkm_device_pci_10de_0fe4 },
1385
+
{ 0x0fe4, "GeForce GT 750M" },
1359
1386
{ 0x0fe9, "GeForce GT 750M" },
1360
1387
{ 0x0fea, "GeForce GT 755M" },
1361
1388
{ 0x0fec, "GeForce 710A" },
···
1470
1497
{ 0x11c6, "GeForce GTX 650 Ti" },
1471
1498
{ 0x11c8, "GeForce GTX 650" },
1472
1499
{ 0x11cb, "GeForce GT 740" },
1473
-
{ 0x11e0, "GeForce GTX 770M", nvkm_device_pci_10de_11e0 },
1500
+
{ 0x11e0, "GeForce GTX 770M" },
1474
1501
{ 0x11e1, "GeForce GTX 765M" },
1475
1502
{ 0x11e2, "GeForce GTX 765M" },
1476
1503
{ 0x11e3, "GeForce GTX 760M", nvkm_device_pci_10de_11e3 },
1477
1504
{ 0x11fa, "Quadro K4000" },
1478
-
{ 0x11fc, "Quadro K2100M", nvkm_device_pci_10de_11fc },
1505
+
{ 0x11fc, "Quadro K2100M" },
1479
1506
{ 0x1200, "GeForce GTX 560 Ti" },
1480
1507
{ 0x1201, "GeForce GTX 560" },
1481
1508
{ 0x1203, "GeForce GTX 460 SE v2" },
+1
-3
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c
+1
-3
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c
···
81
81
nvkm_mask(device, 0x000200, 0x00001000, 0x00001000);
82
82
nvkm_rd32(device, 0x000200);
83
83
84
-
if ( nvkm_boolopt(device->cfgopt, "War00C800_0",
85
-
device->quirk ? device->quirk->War00C800_0 : false)) {
86
-
nvkm_info(&pmu->subdev, "hw bug workaround enabled\n");
84
+
if (nvkm_boolopt(device->cfgopt, "War00C800_0", true)) {
87
85
switch (device->chipset) {
88
86
case 0xe4:
89
87
magic(device, 0x04000000);
+1
-5
drivers/gpu/drm/radeon/cik.c
+1
-5
drivers/gpu/drm/radeon/cik.c
···
4173
4173
control |= ib->length_dw | (vm_id << 24);
4174
4174
4175
4175
radeon_ring_write(ring, header);
4176
-
radeon_ring_write(ring,
4177
-
#ifdef __BIG_ENDIAN
4178
-
(2 << 0) |
4179
-
#endif
4180
-
(ib->gpu_addr & 0xFFFFFFFC));
4176
+
radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFFC));
4181
4177
radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);
4182
4178
radeon_ring_write(ring, control);
4183
4179
}
+48
-48
drivers/gpu/drm/radeon/radeon_vce.c
+48
-48
drivers/gpu/drm/radeon/radeon_vce.c
···
361
361
362
362
/* stitch together an VCE create msg */
363
363
ib.length_dw = 0;
364
-
ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
365
-
ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
366
-
ib.ptr[ib.length_dw++] = handle;
364
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
365
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
366
+
ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
367
367
368
-
ib.ptr[ib.length_dw++] = 0x00000030; /* len */
369
-
ib.ptr[ib.length_dw++] = 0x01000001; /* create cmd */
370
-
ib.ptr[ib.length_dw++] = 0x00000000;
371
-
ib.ptr[ib.length_dw++] = 0x00000042;
372
-
ib.ptr[ib.length_dw++] = 0x0000000a;
373
-
ib.ptr[ib.length_dw++] = 0x00000001;
374
-
ib.ptr[ib.length_dw++] = 0x00000080;
375
-
ib.ptr[ib.length_dw++] = 0x00000060;
376
-
ib.ptr[ib.length_dw++] = 0x00000100;
377
-
ib.ptr[ib.length_dw++] = 0x00000100;
378
-
ib.ptr[ib.length_dw++] = 0x0000000c;
379
-
ib.ptr[ib.length_dw++] = 0x00000000;
368
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */
369
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */
370
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
371
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042);
372
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a);
373
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
374
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000080);
375
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000060);
376
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
377
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
378
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c);
379
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
380
380
381
-
ib.ptr[ib.length_dw++] = 0x00000014; /* len */
382
-
ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
383
-
ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
384
-
ib.ptr[ib.length_dw++] = dummy;
385
-
ib.ptr[ib.length_dw++] = 0x00000001;
381
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
382
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
383
+
ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
384
+
ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
385
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
386
386
387
387
for (i = ib.length_dw; i < ib_size_dw; ++i)
388
-
ib.ptr[i] = 0x0;
388
+
ib.ptr[i] = cpu_to_le32(0x0);
389
389
390
390
r = radeon_ib_schedule(rdev, &ib, NULL, false);
391
391
if (r) {
···
428
428
429
429
/* stitch together an VCE destroy msg */
430
430
ib.length_dw = 0;
431
-
ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
432
-
ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
433
-
ib.ptr[ib.length_dw++] = handle;
431
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
432
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
433
+
ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
434
434
435
-
ib.ptr[ib.length_dw++] = 0x00000014; /* len */
436
-
ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
437
-
ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
438
-
ib.ptr[ib.length_dw++] = dummy;
439
-
ib.ptr[ib.length_dw++] = 0x00000001;
435
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
436
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
437
+
ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
438
+
ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
439
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
440
440
441
-
ib.ptr[ib.length_dw++] = 0x00000008; /* len */
442
-
ib.ptr[ib.length_dw++] = 0x02000001; /* destroy cmd */
441
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000008); /* len */
442
+
ib.ptr[ib.length_dw++] = cpu_to_le32(0x02000001); /* destroy cmd */
443
443
444
444
for (i = ib.length_dw; i < ib_size_dw; ++i)
445
-
ib.ptr[i] = 0x0;
445
+
ib.ptr[i] = cpu_to_le32(0x0);
446
446
447
447
r = radeon_ib_schedule(rdev, &ib, NULL, false);
448
448
if (r) {
···
699
699
{
700
700
uint64_t addr = semaphore->gpu_addr;
701
701
702
-
radeon_ring_write(ring, VCE_CMD_SEMAPHORE);
703
-
radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
704
-
radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
705
-
radeon_ring_write(ring, 0x01003000 | (emit_wait ? 1 : 0));
702
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_SEMAPHORE));
703
+
radeon_ring_write(ring, cpu_to_le32((addr >> 3) & 0x000FFFFF));
704
+
radeon_ring_write(ring, cpu_to_le32((addr >> 23) & 0x000FFFFF));
705
+
radeon_ring_write(ring, cpu_to_le32(0x01003000 | (emit_wait ? 1 : 0)));
706
706
if (!emit_wait)
707
-
radeon_ring_write(ring, VCE_CMD_END);
707
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
708
708
709
709
return true;
710
710
}
···
719
719
void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
720
720
{
721
721
struct radeon_ring *ring = &rdev->ring[ib->ring];
722
-
radeon_ring_write(ring, VCE_CMD_IB);
723
-
radeon_ring_write(ring, ib->gpu_addr);
724
-
radeon_ring_write(ring, upper_32_bits(ib->gpu_addr));
725
-
radeon_ring_write(ring, ib->length_dw);
722
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_IB));
723
+
radeon_ring_write(ring, cpu_to_le32(ib->gpu_addr));
724
+
radeon_ring_write(ring, cpu_to_le32(upper_32_bits(ib->gpu_addr)));
725
+
radeon_ring_write(ring, cpu_to_le32(ib->length_dw));
726
726
}
727
727
728
728
/**
···
738
738
struct radeon_ring *ring = &rdev->ring[fence->ring];
739
739
uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
740
740
741
-
radeon_ring_write(ring, VCE_CMD_FENCE);
742
-
radeon_ring_write(ring, addr);
743
-
radeon_ring_write(ring, upper_32_bits(addr));
744
-
radeon_ring_write(ring, fence->seq);
745
-
radeon_ring_write(ring, VCE_CMD_TRAP);
746
-
radeon_ring_write(ring, VCE_CMD_END);
741
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_FENCE));
742
+
radeon_ring_write(ring, cpu_to_le32(addr));
743
+
radeon_ring_write(ring, cpu_to_le32(upper_32_bits(addr)));
744
+
radeon_ring_write(ring, cpu_to_le32(fence->seq));
745
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_TRAP));
746
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
747
747
}
748
748
749
749
/**
···
765
765
ring->idx, r);
766
766
return r;
767
767
}
768
-
radeon_ring_write(ring, VCE_CMD_END);
768
+
radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
769
769
radeon_ring_unlock_commit(rdev, ring, false);
770
770
771
771
for (i = 0; i < rdev->usec_timeout; i++) {
+1
-1
drivers/gpu/drm/ttm/ttm_lock.c
+1
-1
drivers/gpu/drm/ttm/ttm_lock.c
+1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
···
1233
1233
1234
1234
vmw_fp->locked_master = drm_master_get(file_priv->master);
1235
1235
ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
1236
+
vmw_kms_legacy_hotspot_clear(dev_priv);
1236
1237
if (unlikely((ret != 0))) {
1237
1238
DRM_ERROR("Unable to lock TTM at VT switch.\n");
1238
1239
drm_master_put(&vmw_fp->locked_master);
+1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
+1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
···
925
925
uint32_t num_clips);
926
926
int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
927
927
struct drm_file *file_priv);
928
+
void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv);
928
929
929
930
int vmw_dumb_create(struct drm_file *file_priv,
930
931
struct drm_device *dev,
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
···
390
390
else if (ctx_id == SVGA3D_INVALID_ID)
391
391
ret = vmw_local_fifo_reserve(dev_priv, bytes);
392
392
else {
393
-
WARN_ON("Command buffer has not been allocated.\n");
393
+
WARN(1, "Command buffer has not been allocated.\n");
394
394
ret = NULL;
395
395
}
396
396
if (IS_ERR_OR_NULL(ret)) {
+51
-13
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+51
-13
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
···
133
133
vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
134
134
}
135
135
136
-
int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
137
-
uint32_t handle, uint32_t width, uint32_t height)
136
+
137
+
/*
138
+
* vmw_du_crtc_cursor_set2 - Driver cursor_set2 callback.
139
+
*/
140
+
int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
141
+
uint32_t handle, uint32_t width, uint32_t height,
142
+
int32_t hot_x, int32_t hot_y)
138
143
{
139
144
struct vmw_private *dev_priv = vmw_priv(crtc->dev);
140
145
struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
141
146
struct vmw_surface *surface = NULL;
142
147
struct vmw_dma_buffer *dmabuf = NULL;
148
+
s32 hotspot_x, hotspot_y;
143
149
int ret;
144
150
145
151
/*
···
157
151
*/
158
152
drm_modeset_unlock_crtc(crtc);
159
153
drm_modeset_lock_all(dev_priv->dev);
154
+
hotspot_x = hot_x + du->hotspot_x;
155
+
hotspot_y = hot_y + du->hotspot_y;
160
156
161
157
/* A lot of the code assumes this */
162
158
if (handle && (width != 64 || height != 64)) {
···
195
187
vmw_dmabuf_unreference(&du->cursor_dmabuf);
196
188
197
189
/* setup new image */
190
+
ret = 0;
198
191
if (surface) {
199
192
/* vmw_user_surface_lookup takes one reference */
200
193
du->cursor_surface = surface;
201
194
202
195
du->cursor_surface->snooper.crtc = crtc;
203
196
du->cursor_age = du->cursor_surface->snooper.age;
204
-
vmw_cursor_update_image(dev_priv, surface->snooper.image,
205
-
64, 64, du->hotspot_x, du->hotspot_y);
197
+
ret = vmw_cursor_update_image(dev_priv, surface->snooper.image,
198
+
64, 64, hotspot_x, hotspot_y);
206
199
} else if (dmabuf) {
207
200
/* vmw_user_surface_lookup takes one reference */
208
201
du->cursor_dmabuf = dmabuf;
209
202
210
203
ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
211
-
du->hotspot_x, du->hotspot_y);
204
+
hotspot_x, hotspot_y);
212
205
} else {
213
206
vmw_cursor_update_position(dev_priv, false, 0, 0);
214
-
ret = 0;
215
207
goto out;
216
208
}
217
209
218
-
vmw_cursor_update_position(dev_priv, true,
219
-
du->cursor_x + du->hotspot_x,
220
-
du->cursor_y + du->hotspot_y);
210
+
if (!ret) {
211
+
vmw_cursor_update_position(dev_priv, true,
212
+
du->cursor_x + hotspot_x,
213
+
du->cursor_y + hotspot_y);
214
+
du->core_hotspot_x = hot_x;
215
+
du->core_hotspot_y = hot_y;
216
+
}
221
217
222
-
ret = 0;
223
218
out:
224
219
drm_modeset_unlock_all(dev_priv->dev);
225
220
drm_modeset_lock_crtc(crtc, crtc->cursor);
···
250
239
drm_modeset_lock_all(dev_priv->dev);
251
240
252
241
vmw_cursor_update_position(dev_priv, shown,
253
-
du->cursor_x + du->hotspot_x,
254
-
du->cursor_y + du->hotspot_y);
242
+
du->cursor_x + du->hotspot_x +
243
+
du->core_hotspot_x,
244
+
du->cursor_y + du->hotspot_y +
245
+
du->core_hotspot_y);
255
246
256
247
drm_modeset_unlock_all(dev_priv->dev);
257
248
drm_modeset_lock_crtc(crtc, crtc->cursor);
···
347
334
ttm_bo_unreserve(bo);
348
335
}
349
336
337
+
/**
338
+
* vmw_kms_legacy_hotspot_clear - Clear legacy hotspots
339
+
*
340
+
* @dev_priv: Pointer to the device private struct.
341
+
*
342
+
* Clears all legacy hotspots.
343
+
*/
344
+
void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
345
+
{
346
+
struct drm_device *dev = dev_priv->dev;
347
+
struct vmw_display_unit *du;
348
+
struct drm_crtc *crtc;
349
+
350
+
drm_modeset_lock_all(dev);
351
+
drm_for_each_crtc(crtc, dev) {
352
+
du = vmw_crtc_to_du(crtc);
353
+
354
+
du->hotspot_x = 0;
355
+
du->hotspot_y = 0;
356
+
}
357
+
drm_modeset_unlock_all(dev);
358
+
}
359
+
350
360
void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
351
361
{
352
362
struct drm_device *dev = dev_priv->dev;
···
387
351
du->cursor_age = du->cursor_surface->snooper.age;
388
352
vmw_cursor_update_image(dev_priv,
389
353
du->cursor_surface->snooper.image,
390
-
64, 64, du->hotspot_x, du->hotspot_y);
354
+
64, 64,
355
+
du->hotspot_x + du->core_hotspot_x,
356
+
du->hotspot_y + du->core_hotspot_y);
391
357
}
392
358
393
359
mutex_unlock(&dev->mode_config.mutex);
+5
-2
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
+5
-2
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
···
159
159
160
160
int hotspot_x;
161
161
int hotspot_y;
162
+
s32 core_hotspot_x;
163
+
s32 core_hotspot_y;
162
164
163
165
unsigned unit;
164
166
···
195
193
void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
196
194
u16 *r, u16 *g, u16 *b,
197
195
uint32_t start, uint32_t size);
198
-
int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
199
-
uint32_t handle, uint32_t width, uint32_t height);
196
+
int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
197
+
uint32_t handle, uint32_t width, uint32_t height,
198
+
int32_t hot_x, int32_t hot_y);
200
199
int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
201
200
int vmw_du_connector_dpms(struct drm_connector *connector, int mode);
202
201
void vmw_du_connector_save(struct drm_connector *connector);
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
···
297
297
static struct drm_crtc_funcs vmw_legacy_crtc_funcs = {
298
298
.save = vmw_du_crtc_save,
299
299
.restore = vmw_du_crtc_restore,
300
-
.cursor_set = vmw_du_crtc_cursor_set,
300
+
.cursor_set2 = vmw_du_crtc_cursor_set2,
301
301
.cursor_move = vmw_du_crtc_cursor_move,
302
302
.gamma_set = vmw_du_crtc_gamma_set,
303
303
.destroy = vmw_ldu_crtc_destroy,
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
···
533
533
static struct drm_crtc_funcs vmw_screen_object_crtc_funcs = {
534
534
.save = vmw_du_crtc_save,
535
535
.restore = vmw_du_crtc_restore,
536
-
.cursor_set = vmw_du_crtc_cursor_set,
536
+
.cursor_set2 = vmw_du_crtc_cursor_set2,
537
537
.cursor_move = vmw_du_crtc_cursor_move,
538
538
.gamma_set = vmw_du_crtc_gamma_set,
539
539
.destroy = vmw_sou_crtc_destroy,
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
+1
-1
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
···
1043
1043
static struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
1044
1044
.save = vmw_du_crtc_save,
1045
1045
.restore = vmw_du_crtc_restore,
1046
-
.cursor_set = vmw_du_crtc_cursor_set,
1046
+
.cursor_set2 = vmw_du_crtc_cursor_set2,
1047
1047
.cursor_move = vmw_du_crtc_cursor_move,
1048
1048
.gamma_set = vmw_du_crtc_gamma_set,
1049
1049
.destroy = vmw_stdu_crtc_destroy,
+4
-2
drivers/gpu/vga/vgaarb.c
+4
-2
drivers/gpu/vga/vgaarb.c
···
395
395
set_current_state(interruptible ?
396
396
TASK_INTERRUPTIBLE :
397
397
TASK_UNINTERRUPTIBLE);
398
-
if (signal_pending(current)) {
399
-
rc = -EINTR;
398
+
if (interruptible && signal_pending(current)) {
399
+
__set_current_state(TASK_RUNNING);
400
+
remove_wait_queue(&vga_wait_queue, &wait);
401
+
rc = -ERESTARTSYS;
400
402
break;
401
403
}
402
404
schedule();